JP2000277739A - Manufacture of thin-film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve fine precision making, the characteristics, and reliability of a thin-film transistor on a glass substrate by preventing the shape deformation of the glass substrate generated in a heating furnace annealing process for heating the whole substrate, or the diffusion of impurity from the substrate. SOLUTION: Lamp annealing is carried out with light sources of visible and near infrared rays from the back of a substrate so that a polycrystalline silicon film 30 can be selectively annealed maintaining the temperature of a glass substrate 10, while lower than the softening point. Thus, a polycrystalline thin-film transistor with improved characteristics and reliability is obtained, without generating deformation of the substrate or the diffusion of impurity from the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a polycrystalline thin film transistor.

[0002]

2. Description of the Related Art Active matrix type liquid crystal display devices using thin film transistors as switching elements are now widely used in digital still cameras, digital video cameras, car navigation systems, notebook personal computers and the like.

In particular, in recent years, polycrystalline silicon thin film transistors using polycrystalline silicon having a higher mobility than amorphous silicon as a semiconductor layer have been actively developed. Since a polycrystalline silicon thin film transistor has much higher mobility than an amorphous silicon thin film transistor using amorphous silicon for a semiconductor layer, not only a pixel transistor used for liquid crystal switching but also a driving circuit for driving the pixel transistor is formed on a glass substrate. Can be formed. However, on the other hand, since a glass substrate having a low softening point is used, there is a disadvantage that high-temperature processing of 1000 ° C. or more for activating and removing doping damage cannot be performed as in a MOS transistor on a silicon substrate. . However, insufficient activation or removal of the above-mentioned damage causes deterioration of transistor characteristics and deterioration of reliability. Therefore, it is necessary to perform annealing at as high a temperature as possible. Therefore, conventionally, heating furnace annealing has been performed at about 600 ° C., which is just before the softening point of glass, for a long time.

[0004]

SUMMARY OF THE INVENTION
By annealing at about 00 ° C., damage due to doping and plasma damage can be removed to some extent. However, in annealing with a heating furnace, since the entire substrate is annealed for a long time at a high temperature near the softening point of the glass substrate, shape deformation such as distortion or expansion and contraction occurs on the glass substrate,
Fine processing becomes difficult. Further, as the glass substrate softens during annealing, impurities diffuse from the glass substrate into the polycrystalline silicon film via the undercoat insulating film.
The intrusion of the impurities causes deterioration of transistor characteristics and reliability.

Accordingly, an object of the present invention is to provide a lamp annealing process capable of selectively heating only the polycrystalline silicon film, thereby maintaining the glass substrate at a low temperature so as not to be softened. On the other hand, by performing a high-temperature heat treatment at a temperature higher than the softening point of the glass, the damage due to doping and plasma damage is removed, and the polycrystalline silicon film and the interface between the polycrystalline silicon and the gate insulating film are reformed to obtain transistor characteristics. And a method of manufacturing a thin film transistor with improved reliability.

[0006]

In order to solve this problem, according to the present invention, a light source (for example, a halogen source) adapted from the rear surface of a transparent substrate and adapted to a wavelength region where the transparent substrate has little absorption and is mainly absorbed by polycrystalline silicon. Lamp annealing with a lamp.

By selectively heating the polycrystalline silicon film by performing lamp annealing, damage due to doping and plasma damage can be removed. Further, in lamp annealing, only the polycrystalline silicon film can be annealed at a temperature higher than the softening point of glass, so that the lamp annealing improves the crystallinity of the polycrystalline silicon. Further, when the polycrystalline semiconductor layer is heated, the interface between the polycrystalline semiconductor and the insulating film is modified, and the interface level is reduced. As a result of these changes, improvements in transistor characteristics such as an increase in on-current, a decrease in off-current, and an improvement in sub-threshold characteristics are realized, and reliability against electric stress is also improved. In addition, since the polycrystalline silicon film is selectively heated instead of heating the entire substrate as in annealing in a heating furnace, the glass substrate does not reach the softening point. Therefore, the impurity does not diffuse from the glass substrate to the polycrystalline silicon film due to the annealing, and the deterioration of the transistor characteristics and the reliability do not occur. Further, since the shape deformation of the substrate does not occur, the precision of fine processing is improved. Also,
If annealing is performed from the surface of the substrate after the formation of the gate electrode, the channel portion will be shadowed by the gate electrode, so that heat treatment of the channel portion cannot be performed.However, by performing lamp annealing from the back surface of the substrate, the channel portion can also be annealed. it can. Thereby, the doping damage generated in the channel portion can be removed at the same time as the recovery of the doping damage in the source region and the drain region in the polycrystalline silicon film. In addition, the polycrystalline silicon film can be modified and the interface between the polycrystalline silicon and the insulating film can be improved at the same time.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

(Embodiment 1) Embodiment 1 according to the present invention will be described with reference to FIG. First, the glass substrate 10
In order to prevent impurities from the glass substrate, an SiO ₂ film is formed as an undercoat insulating film 20 by a CVD method to a thickness of 2000.
From 4000Å. Then, amorphous silicon is deposited thereon by 500 法 to 1000Å by the CVD method,
Crystallization is performed by excimer laser annealing to form a high-quality polycrystalline silicon film 30. After patterning the polycrystalline silicon film, SiO ₂ is deposited as a gate insulating film 40 by a CVD method at about 1000 °. Next, for example, Ta is formed as the gate electrode 50 by a 2000 ° sputtering method, and patterning is performed. Gate electrode 5
After forming 0, doping of impurities such as P and B is performed, and the source region 30a and the drain region 30 are self-aligned.
b is formed. CVD of SiO ₂ as interlayer insulating film 60
After deposition by the method, a contact hole is opened, a source electrode 70 and a drain electrode 80 are formed, and SiN _x is deposited thereon as a passivation film 90 by about 3000 °.

Finally, lamp annealing is performed in a nitrogen atmosphere from the back surface of the substrate. In the lamp annealing step, light from near-infrared light to visible light, preferably from 0.5 μm to
Annealing is performed with light having a wavelength of 4 μm. In this embodiment, a halogen lamp was used as a light source. Annealing temperature is from 400 ° C to 600 ° C, heating rate is from 10 ° C / sec to 7
The annealing was performed at 0 ° C./sec and the annealing time was as short as 1 minute or less. The temperature was detected by a thermocouple in contact with a glass substrate, and this was fed back to a light source to control the light source. Since light having a wavelength of 0.5 μm to 4 μm is hardly absorbed by the glass substrate 10 and is absorbed by the polycrystalline silicon film 30, the polycrystalline silicon film 30 can be selectively annealed. Further, the channel region of the polycrystalline silicon film 30 is not shielded by the gate electrode 50 by performing lamp annealing from the back surface of the substrate.
Since the thermocouple for controlling the annealing light source detects the temperature of the glass substrate 10, the polycrystalline silicon film 30 is annealed at a temperature much higher than the set annealing temperature.
As a result, damage due to doping and plasma damage during the formation of the insulating film are recovered. Also, by annealing the polycrystalline silicon at a high temperature, the polycrystalline silicon itself is modified and the polycrystalline silicon and the gate insulating film 40 are formed.
Interface is also modified, and the interface state decreases. As a result, improvements in transistor characteristics such as an increase in on-state current, a decrease in off-state current, and an improvement in sub-threshold characteristics are realized. Further, the resistance to electric stress is increased and the reliability is improved. In the lamp annealing, since the polycrystalline silicon film 30 is annealed at a high temperature while keeping the glass substrate 10 at a softening point or lower, no impurity is diffused from the glass substrate 10 and deterioration of transistor characteristics and reliability do not occur. .

The rate of temperature rise during lamp annealing is related to the annealing temperature. However, if the temperature is too high, the polycrystalline silicon film 30 is rapidly heated, and cracks and peeling occur in the insulating film. In addition, the overshoot becomes large and the glass substrate 10 is annealed at a temperature equal to or higher than the set temperature, and the glass substrate 10 undergoes shape deformation such as distortion or expansion and contraction, and the precision of fine processing decreases. In addition, the glass substrate 10
The impurity diffuses into the polycrystalline silicon film 30 from the substrate, which causes deterioration of transistor characteristics and reliability.

In this embodiment, lamp annealing is performed in a nitrogen atmosphere, but the same effect can be obtained in another gas atmosphere such as hydrogen or ammonia. In this embodiment, lamp annealing is performed after forming SiN _x as the passivation film 90.
This is to prevent hydrogen terminating unpaired bonds of 0 from being released by lamp annealing.

(Embodiment 2) Embodiment 2 according to the present invention will be described with reference to FIG. The steps up to the formation of the gate electrode 50 are performed in the same manner as in the first embodiment. And the gate electrode 5
The source region 30a and the drain region 30b are formed in a self-aligned manner by doping impurities using 0 as a mask. Thereafter, lamp annealing is performed from the back surface of the substrate under the same annealing conditions as in the first embodiment. However, lamp annealing is performed in a hydrogen atmosphere. This is because the passivation film 90
This is because _{if the} lamp annealing is performed before the SiN _x film is formed, the hydrogen in the polycrystalline silicon film 30 escapes and the number of dangling bonds increases. When lamp annealing is performed in a hydrogen atmosphere, hydrogen gas terminates dangling bonds, so that an increase in dangling bonds due to lamp annealing can be prevented. As a result, the same effect as in the first embodiment is obtained, and the transistor characteristics and reliability of the polycrystalline thin film transistor are improved. In this embodiment, the lamp annealing is performed after the impurity is doped. However, the lamp annealing may be performed after the formation of the interlayer insulating film, and any gas may be used as long as the gas terminates the dangling bond.

In the case where lamp annealing is performed in nitrogen, an inert gas, or a vacuum, hydrogen plasma treatment is performed after the lamp annealing to terminate the dangling bonds in polycrystalline silicon increased by the lamp annealing. can do.

In the above description, the non-LDD structure has been described as an example of the structure of the polycrystalline thin film transistor. However, other structures such as an LDD structure and a GOLD structure can be similarly implemented. In addition, by preheating the glass substrate before performing the lamp annealing, a change in heat of the glass substrate can be reduced, and a change in shape of the glass substrate and cracks generated in the thin film can be suppressed.

[0016]

As described above, according to the present invention, by selectively heating the polycrystalline silicon film, the shape of the substrate and the diffusion of impurities from the substrate do not occur.
The polycrystalline silicon film can be modified and the interface between the polycrystalline silicon film and the insulating film can be modified, and the advantageous effects of improving the fine processing accuracy, the transistor characteristics of the thin film transistor, and its reliability can be obtained. .

[Brief description of the drawings]

FIG. 1 is a diagram for explaining Embodiment 1 of the present invention;

FIG. 2 is a view for explaining Embodiment 2 of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Glass substrate 20 Undercoat insulating film 30 Polycrystalline silicon film 30a Source region 30b Drain region 40 Gate insulating film 50 Gate electrode 60 Interlayer insulating film 70 Source electrode 80 Drain electrode 90 Passivation 100 Lamp light

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F110 CC02 DD02 DD13 DD24 EE04 EE44 FF02 FF29 GG02 GG13 GG25 HJ01 HJ13 HJ23 HM15 HM20 NN02 NN04 NN24 NN40 PP03 QQ11

Claims (7)

[Claims] In a method of manufacturing a top gate type polycrystalline silicon thin film transistor on a transparent substrate, after forming SiN _x as a passivation film, the transparent substrate absorbs little from the back surface of the transparent substrate and is mainly absorbed by polycrystalline silicon. A lamp annealing with a light source suitable for a wavelength region to be processed. 2. A method for manufacturing a top gate type polycrystalline silicon thin film transistor on a transparent substrate, wherein the polycrystalline silicon is mainly absorbed by the transparent substrate from the back side of the transparent substrate during the period from the impurity doping step to the passivation film forming step. A step of performing lamp annealing with a light source adapted to a wavelength region to be absorbed by the substrate, and performing an annealing process in hydrogen plasma after the lamp annealing. 3. The method according to claim 1, wherein the lamp annealing is performed in a gas atmosphere of hydrogen, nitrogen, inert gas or the like.
Or the method for manufacturing a polycrystalline silicon thin film transistor according to item 2. 4. The method according to claim 1, wherein the lamp annealing is performed at a temperature of 400.degree.
The method according to claim 1, wherein the annealing is performed at an annealing temperature of 0 ° C. and a heating rate of 10 ° C./sec to 70 ° C./sec. 5. The method of manufacturing a polycrystalline silicon thin film transistor according to claim 1, wherein said lamp annealing step includes a step of preheating the substrate. 6. The method of manufacturing a polycrystalline silicon thin film transistor according to claim 1, wherein the lamp annealing is performed at a temperature rising rate of 70 ° C./sec or more and an annealing time of 1 second or less. 7. The method according to claim 1, wherein the lamp annealing is performed while rotating the substrate.