GB2447992A - Proportional to absolute temperature circuit - Google Patents

Abstract

A circuit for use in a current source or a proportional to absolute temperature (PTAT) sensor or in a bandgap regulator comprises a PTAT cell having two parallel current branches each including at least one transistor and at least one resistor, and a control circuit for determining the relationship between the driving currents through the two branches. Transistor QND in the first branch has a higher effective current density than that of a second transistor QNW in the second branch so as to develop control voltages (VBE) across the first and second transistors whose difference ( W VBE) is regulated by the voltage across a regulating resistor RNW in the second branch. A further regulating resistor RPW is provided in the first branch, the voltage drop across which regulates the effective difference in current densities between a third transistor QPW and a reference transistor. Substantially the whole of at least one W VBE voltage is developed across a regulating resistor or resistors in each of the two branches for each full VBE of potential that is needed to bias the circuit into its operating condition. The reference transistor may either be the first transistor (fig 7, QD) or a fourth transistor QPD, and may use opposite polarity transistors. The transistors may be bipolar types or field effect transisitors (FET). Currents in both branches generate voltages across the regulating resistors which allow an improved signal to noise ratio for the circuit.

Description

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TEMPERATURE SENSITIVE CIRCUIT

Field of the invention

The present invention relates to a temperature sensor, in particular to a temperature sensor that develops a current that is proportional to absolute temperature. The invention equally relates to the provision of a bandgap Voltage reference circuit (see for example US 4,447,784, US o 3,617,859)

Background of the invention

The principle of using transistors to develop a current that is proportional to absolute temperature (a!VPTAT!I current) has been known since at least 1971, when patent US 3,617,859 by Widlar and Dobkin was published. The appended Figure la shows a circuit of the latter patent. The operating currents in two transistors QD and QW are controlled by a feedback circuit "mir" so that the current in one Transistor QD is a fixed multiple of the current in the other Transistor QW. In addition, the transistors are fabricated with different effective areas, so that the collector current density in the Transistor QW is substantially lower than the collector current density in Transistor QW. Under these conditions, the magnitude of the Voltage between the base and emitter of QW is smaller than the Voltage between the base and emitter of Transistor QD.

For ideal transistors, the difference delta (V) between these Voltages is given by delta(V) = k.T./q.log((I(QD)/A(QD))/(I(QW)/A(QW)) where k is Boltzmann's constant, T is the absolute or Kelvin temperature, q is the electronic charge, and I(Qx) and A(Qx) are the Collector current and Effective Area of the Transistor Qx. Clearly, this Voltage is proportional to the absolute temperature T. Widlar and Dobkin arranged the circuit so that the control current is generated in Transistor QW, by directly connecting the bases of the transistors QD and QW, and placing a resistor RW between the emitters of QD and QW such that the PTAT Voltage is generated across RW. It is to be noted that because RW is generally manufactured in an integrated circuit technology, its value is generally not independent of temperature, and the current generated will not be strictly proportional to absolute temperature; however, in accordance with accepted practice, both the Voltage and the current will be described as PTAT in the remainder of this document.

Figure lb shows the PTAT cell in association with its feedback circuit. In Figure ib, the basic current mirror of figure la combined with circuitry to maintain the currents.

This also is based on US 3,617,859. The arrangement is designed for use in a bandgap regulator, with output Vreg of about 1.2-Volts. The ratio of the resistor values Rsnsl:Rsns2 sets the ratio of the currents I(QW):I(QD), and thus the Voltage across RW. The current through Rsns2 is substantially the current in RW, so the voltage across RW together with the ratio Rsns2:RW sets the PTAT Voltage that is added to the baseemitter Voltage of Qctrl to generate the output Voltage. One limitation in the accuracy of such a cell is that the collector current of the Transistor QW is not exactly equal to the emitter current that is generated in RW. This error is due to the finite current gain (known as the beta of the Transistor, "Beta") that requires current to flow into the base of the Transistor in order to maintain the collector current. This error may be compensated by the base current of Qctrl, which is set by the current in Rsns3 and the Beta of Qctrl. In this way, the error due to finite Beta can be corrected, limited primarily by the natching of the Beta between the different transistors.

Although this arrangement can work well from the aspect of accuracy, it requires significant additional current to effect the Beta compensation. This was addressed by Brokaw in US 3,887,863 in 1975 which proposed a circuit as shown in the appended Figure 2. Instead of using the sensed current from the collectors where it has been modified by the Beta of the transistors, the current in the emitters is used directly, and the collector current serves only as a part of the feedback circuit that maintains the current ratios. One should note that the nomenclature QD has been maintain, although it loses the significance of having a diode connection that pertains to the other circuits herein.

Amplifiers are illustrated as Voltage-controlled current-sources, as this arrangement is common for low-drop--out is regulators; however, other styles of amplifier are used, and this representation is not to be seen as limiting the arrangement.

Another route was initiated by Frederikseri in US 3,659,121, published in 1972. The basic current mirror is in this case shown in the appended Figure 3. Here, a resistor RF is placed between the collector and the base of the Transistor QD and the Transistor QD is connected such that its collector current passes through RF. This produces a reduced potential that is suitable for controlling the base of a second Transistor QF to generate a relatively low output current. An additional feature of this configuration is that when the resistor RF is chosen to be equal to the slope resistance of QD, the dependence of the output current Igen on the input current Ibia becomes locally zero. This makes it simple to generate a reasonably constant output current over a modest supply range using just two resistors and two transistors. Clearly, the arrangement also has PTAT characteristics when combined with circuitry that maintains the current ratio I(QF):I(QD). One useful feature of this arrangement is that, in contrast to the arrangement of Widlar and Dobkin, the output current increases as Beta reduces (and the base current increases) . Accordingly, it was not long before a combined arrangement appeared in a bandgap reference circuit -the LM113 shown in simplified form in figure 4. Here, the resistor RF serves to simplify the stabilisation of the part against oscillation by providing a constant bias to the base of QW; it also provides a measure of compensation for the finite Beta, but this is clearly insufficient, as evidenced by the use of the resistor RC.

Definitions Some definitions will not be set out of the terms used in the present specification while others will be given in the relevant sections of the text where they first occur.

In line with earlier generic patents, all illustrations show PTAT arrangements using bipolar transistors; however, this is not to be seen as restricting the application to

bipolar implementations. For example, field effect

transistors ("FET5") in weak inversion also provide PTAT characteristics, and FET5 in strong inversion provide a usefully controlled output current using the same techniques, even though the drain current does not depend exponentially on the gate-to-source potential; accordingly, the term transistor ("Transistor") is to be taken to mean any electronic device which provides characteristics for which the techniques herein described provide a useful current source or voltage reference or regulator, and emitter ("Emitter") and base ("Base") refer to the control terminals of any such device for which the output current flowing between the Emitter and a third terminal referred to as the "Collector" depends in operation primarily on the potential difference between the control terminals, with the current passing through the Base (the "Base Current") being substantially smaller than the similarly defined "Emitter Current" and "Collector Current". In the same vein, the term "PTAT" is used to apply to the current-generation arrangements, regardless of whether the control potentials or the output currents are PTAT in practice.

The Transistor polarity refers to the relative potentials of the emitter and collector terminals. When the voltage in operation is higher at the Emitter is higher than at the collector, it is referred to as a PNP Transistor, when the Emitter potential is lower than the Collector potential in operation, it is referred to as an NPN Transistor. PNP and NPN Transistors are referred to as having opposite polarity or being complementary.

The techniques described herein are most widely understood when used with devices where the current under identical bias voltage conditions depends substantially linearly on a physical area. This is typically the case for traditional vertical bipolar transistors, where the relevant area is the physical area of the emitter junction. However, the equivalent parameter for FET5 would be the quotient width/length, where the width of the FET is the effective gate dimension in the direction perpendicular to the current flow, and the length is the effective gate dimension along the direction of current flow. The same criterion would apply to lateral bipolar transistors where the physical depth of the active base region is independent of the lateral dimensions, as is broadly the case for many lateral PNP transistors whose base is defined by a MOSFET gate.

Similarly, vertical bipolar transistors of substantially different construction can provide characteristics that are suitable for use in such circuits. Accordingly, the terms "Effective Area", "Area Ratio", and "Relative Area" are to be taken hereafter to indicate the relationship between the currents of such devices when operated at the identical potentials, rather than to the physical areas of the devices.

The term resistor "Resistor" is to describe a circuit element or elements that provide the described function. It may be an individual resistor structure, or part or all of a network. Specifically, a number of resistors of equivalent function may be merged into a single structure, so a defined Resistor may not provide external terminals at that correspond to the defined potentials. This is specifically the case for the some of the Resistors equivalent to RW of figure la, when PTAT circuits using complementary Transistors are arranged with the emitters of the reference transistors adjacent or separated only by resistors.

A Branch of a PTAT circuit is defined as a section of the circuit whose currents are provided substantially from a set of Collectors, and includes all Transistors whose Collectors provide current into that Branch, as well as the resistors through which the currents in those Transistors flow.

A "Regulating" Resistor is a Resistor through which current in one of the PTAT branches creates a potential difference whose value directly "Regulates" the potentials on the Control terminal of a Transistor. Referring to Figures 2 and 4, the resistors RF and RW are Regulating Resistors, but the resistors Rsnsl and Rsns2 are not.

Object of the invention While the prior art PTAT circuits can provide well-behaved PTAT output current and the bandgap references can provide reasonably constant output Voltage with respect to changing temperature, the relatively low Voltage available across the resistors RN and/or RF means that the thermal noise current that is generated limits the short-term stability. In the prior art described above, the signal-to-noise ratio can only be improved by increasing the operating current, and or by increasing the ratio of the Transistor areas. As the Voltage across the resistors RW and/or RF in Figures la, 2, and 3 depends only logarithmically on the current density ratio between the transistors QD:QW or QD:QF, it can be seen that the returns on increasing the Area Ratio become quite low once the current-density ratio is large. The present invention seeks to improve the signal-to-noise and does so by improving the utilisation of the available currents.

Summary of the invention

According to the present invention, there is provided a circuit as hereinafter set forth in Claim 1 of the appended claims. Preferred features of the invention are set forth in the dependent claims 2 to 7.

Erief description of the drawings

The invention will now be described further, by way of o example, with reference to the accompanying drawings, in which:-Figures 1 to 4 are circuit described above detailing

different prior art proposals, and

Figures 5 to 16 show different circuits embodying the present invention Detailed description of the preferred embodiment(s) If one considers any of the prior art arrangements, one can see that the current output of QW is at best replicated (with attenuation or multiplication) in the Transistor QD.

In principle, this merely adds coherent noise.

Figure 5 shows an arrangement according to the invention where the input current Ibia of Figure la, and shown again in figure 3, is supplied by the output of a similar but complementary PTAT cell. If the arrangement is symmetrical between the NPN and PNP sides, it effectively provides a 3-dE noise advantage in the output noise over a circuit that comprises a single bandgap cell and a noiseless current mirror or replicator. Clearly, the absence of additional noise due to the replication is an additional advantage of this arrangement. One limitation of this circuit is that it requires additional bias Voltage to prevent the transistors QNF and QPF going into saturation (as generally defined for bipolar transistors) or into the triode region of operation (as generally defined for FET's) This can be ameliorated by the potential across the resistors RNF and RPF, but the benefit will be limited as the circuit generally becomes unstable when this potential is more than 2.k.T/q greater than the potential across RNW, RPW. Nevertheless, this circuit can provide a 3-dB noise advantage compared with prior art at the expense of an additional bias requirement in the order of 150-mV. The ground pin is shown separated from the PTAT generator to indicate that the circuit is in essence a floating current source.

The circuit of Figure 6a shows one method by which the additional bias Voltage required by the circuit of Figure 5 may be removed. In practice, the Voltage sources VNbi and VPbi will usually be replaced by more complex circuitry that advantageously derives the base current from the emitter connections of the transistors QPW, QNW, and a small amount of power from some other supply -though the latter will not be necessary if suitable FET's are available.

An example of a simple circuit configuration that uses FETs to bias the transistors is shown in Figure 6b.

Different FET types are shown controlling the NPN and the PNP to illustrate bias for exemplary reasons only. It is noted in passing that the high impedance at the collectors of the Transistor pairs QND, QPW and QPD, QNW means that the arrangement is relatively non-critical as regards the noise Voltage of the bias arrangements VNbi and VPbi of Figure 5 and NMOS D and PJFET D of figure 6.

In principle, one can stack the composite current sources of Figures 5 and 6 to further improve the noise performance. This requires the output impedances of the component sources of Figures 5 and 6 to be similar in order for the total output noise not to be dominated by the noise of either one. This will be considered later, but first arrangements according to the present invention will be considered that can further improve the noise within headroom similar to that required by the circuit of Figure 5.

Regarding the arrangements of Figures 5 and 6, it may be seen that the noise advantage is obtained by virtue of sensing the current in each main current branch using Resistors that exploit the full difference between the base-emitter Voltages "VBE" of the respective pairs of Transistors QND and QNWF or QNW, and QPD and QPWF or QW.

Other ways of viewing this are that the arrangements increase the total Voltage across the sensing resistors, or that the arrangements stabilise the currents in each of the current branches separately by using the full difference between the base emitter Voltages of the Transistors QND and QPD and the other illustrated Transistors of the same polarity.

Essentially, the principle underlying all embodiments of the invention resides in the use of currents in both the Branches to generate voltages across the Regulating Resistors to generate a total power in the Regulating Resistors that exceeds the power that could be achieved in Regulating Resistors that could be incorporated in a single side of a Current Source. Indeed, given that the signal to noise ratio in the sensor (or Regulator) Resistors themselves is given by the signal power (12.R) divided by -10 -the thermal noise, one can see that the power dissipated in the Regulator resistors must form an absolute limit to the noise performance of the PTAT generator; the additional constraint to be met is that the signals generated in these Resistors are combined in the appropriate phase to maximise the correction signals. It is noted that the signals generated in the equivalent resistance of the Transistor Emitters will always be in the wrong phases relative to each other to contribute a net Regulation signal, so the transistors only contribute noise in this regard.

Figure 7 shows an arrangement according to the invention that utilises Transistors of a single polarity.

It may be seen that the currents in QND and QNW are used to generate control Voltages in separate resistors RNW and RNF, and that these control separate contributors to the output current. Because RNN does not carry the full current in the branch Iou, one should not expect the full 3-dE noise improvemeht that was achieved by the circuits of Figures 5 and 6. In practice, improvements compared with the arrangement of Widlar and Dobkin or that of Brokaw are in the region of 2.4-dB when RNE is zero and the circuit values are configured for first-order Beta compensation. Addition of RNE allows both first and second order compensation of base current (dependency on 1/Beta) to be attained at the cost of minimal additional noise, but it is likely that mismatches in Beta will mean that this is not worthwhile in practice.

Figure 8 illustrates a combination of the methods of Figures 5 and 7. This shows an improvement of up to 5.5 dE relative to prior art, but it does not appear that the approximately 200-mV additional headroom requirement compared with a single height circuit can usefully be removed using the methods of Figure 6.

-11 -Figure 9 shows the method of figure 7 applied to Brokaw' s arrangement.

Figures 10 and 11 show ways of utilising series groups based on the arrangement of Figure 7 to produce lower noise currents than would be available from a circuit that occupies a single diode height.

Figure 12 shows the methods of figures 10 and 11 incorporated jointly with that of Figure 5 in a new bandgap regulator. The regulator is configured to produce an output Voltage that is equal to three silicon bandgaps plus one Schottky bandgap, or about 3.8 Volts. The forward Voltage of the Schottky diode may advantageously be incorporated into the input offset Voltage of the amplifier by placing it within the amplifiers input stage. It is to be understood that this is a portmanteau implementation, and that any of the arrangements incorporated may be omitted or replaced with other PTAT of amplification arrangements in order to match a particular output requirement.

Figure 13 shows an arrangement that is essentially two of the Figure 8 arrangements stacked. The version as shown uses the symmetry of the arrangement to allow the connections shown as ctrlF, ctrlD and ctrlW, which have be joined in the arrangement of Figure 8, to be separated. If the Transistors of like polarity match precisely, the current noise will be 3-dB lower than the arrangement of Figure 8. However, mismatches will generally cause the equilibrium current in the upper or lower half to be greater than that in the other; the half with the greater equilibrium current will then saturate, and the performance will be little if any better than the performance of the PTAT of Figure 8. Accordingly, some form of feedback is required to render both stages in the proper operational region and achieve the desired noise improvement.

-12 -A simple arrangement that provides the required stabilisation is to provide feedback resistors around the Collector-Base terminals of some or all of the transistors QPFh, QnF'h, QPFi and QNFi, the requirement being that the arrangements for the top and bottom halves result in the halves having similar dynamic impedances. The downside of this is that the resistors contribute both to the supply sensitivity and also additional noise. If a suitable external bias point is available, resistors may be connected between the terminals ctrlF, ctrlD and ctrlW such as to equalise the currents of the cells; such resistors will contribute negligible noise provided that the gain is corrected to account for their effects, and both halves of the circuit are maintained in their proper operating condition. Noise on the external bias point will also be well attenuated, at least at low frequencies. Alternatively, the signals from some or all the ports ctrlF, ctrlD and ctrlw may be used to generate currents that are injected into some other point in the cells; an example would be the bases of QPFh and QNFi. these signals would be antiphase currents.

Figure 14 shows an arrangement derived from figure 8 that is particularly suitable for use in bandgap regulators.

An amplifier Amp with an inbuilt input offset Voltage Vos that is shown external to the amplifier is used to set up the Voltage between the collector and the emitter of the transistor QNW such that the current from the collector to the emitter is adequately maintained. Advantageously, this could be a PTAT Voltage generated by running the amplifiers input transistors at different current densities. The PTAT current generated is passed through the resistor RPTAT to generate the major contribution to the PTAT Voltage that compensates the temperature coefficient of the transistor base-to-emitter Voltage. The Voltage across RNW also contributes to the PTAT Voltage; this can provide a further -13 -noise advantage, as the transistors that drive RNW present a relatively low impedance.

Note that, if the Voltage between the collector and emitter of QNW is held to a suitable potential, current generating circuits can be stacked as in figure 13 with the ports of figure 13 ctrlF, ctrLD, ctrlW connected, and the reduced ouptut impedance of the current generating blocks used to distribute the currents between the PTAT generator sections that are based on figure 8.

Figure 15 extends the principle of figure 14, using the Voltage across RPW and the base to emitter Voltage of Qsns to provide bias for QNW. Qsns serves as the first amplification stage of the bias circuit, and in principle can provide lower input noise Voltage than would an input pair that was operated at the same current. An additional advantage is that the relatively low noise Voltages that the circuit applies to both RNW and RPW contribute to the final bandgap potential.

Figure 16 shows an exemplary arrangement that places two of the bandgap circuits of figure 15 effectively in series. As shown, the regulation current from the amplifier Amp can provide current to drive external load, and the amplifier output AmpH corrects the bias for the upper circuit. Clearly, the choice of which amplifier provides the external load current will depend on the design of the amplifiers, and the arrangement is readily adapted for higher output Voltages.

Claims (13)

-14 - CLAIMS

1. A circuit for use in a current source or a proportional to absolute temperature sensor or in a bandgap regulator conducting a current, the circuit comprising two parallel current branches each including at least one transistor and at least one resistor, and a control circuit for determining the relationship between the driving currents through the two branches, wherein a first transistor in the first branch has a higher effective current density flowing in use through its conductive area than the effective current density flowing in use through the conductive area of a second transistor in the second branch so as to develop control voltages (V1) across the control terminals of the first and second transistors which differ from one another, the difference (VpE) between the two control voltages (VRr) being regulated by the voltage across at least a regulating resistor in the second branch, characterised in that at least a further regulating resistor is provided in the first branch, the voltage drop across which resistor regulates the effective difference in current densities between a third transistor and a reference transistor, and substantially the whole of at least one voltage is developed across a regulating resistor or resistors in each of the two branches for each full VR]. of potential that is needed to bias the circuit into its operating condition, overlapping portions of the VRI,: voltages across the resistors in a single branch being discounted from the calculation of the total AV voltage.

2. A circuit as claimed in claim 1, wherein the first transistor in the first branch also serves as the reference transistor for the third transistor.

-15 -

3. A circuit as claimed in claim 1, wherein the reference transistor is a fourth transistor in the second branch.

4. A circuit as claimed in claim 3, wherein the third and fourth transistors are of opposite polarity to the first and second transistors, configured such that one transistor pair of each polarity, together with its associated regulating resistor or resistors, serves as the control circuit for determining the relationship between the branch driving currents of the circuit of the opposite polarity.

5. A circuit as claimed in claim 3, wherein the regulating resistor that regulates the between the first and the second transistor is located in the second branch, the first transistor serves as the reference transistor for a fifth transistor in the second branch, the fifth transistor being operated at low current density compared with the first, and the regulating resistor that regulates the VB between the first and the fifth transistor is located in the first branch.

6. A circuit as claimed in claim 5 wherein the fourth transistor serves as the reference transistor for a sixth transistor in the first branch, the sixth transistor being operated at low current density compared with the fourth, and the regulating resistor that regulates the VB between the fourth and the sixth transistor is located in the second branch.

7. A circuit as claimed in claim 2, wherein the control circuit for determining the relationship between the driving currents through the two branches comprises a fourth transistor in the second branch and fifth and sixth transistors in the first branch each having lower effective current density than the fourth transistor, and a third regulating resistor in the first branch that regulates the -16 -current in the fifth transistor, and a fourth regulating resistor in the first branch that regulates the current in the sixth transistor, wherein the fourth fifth and sixth transistors are of opposite polarity to the first second and third transistors, and the part of the circuit comprising the fourth fifth and sixth transistors and its associated regulating resistors is constructed in topological point symmetry with the circuit comprising the first three transistors and their associated regulating resistors.

8. A circuit as claimed in claim 2, wherein a fourth transistor of opposite polarity to the first transistor is located in the first branch serves as the reference transistor for fifth and sixth transistors in the second branch that are of the same polarity as the fourth transistor, and the fifth and sixth transistors are operated at lower current density than the fourth transistor, wherein the emitters of the first transistor and the fourth transistor are connected in a series configuration, and there are a regulating resistor that regulates the VBE between the fourth transistor and the fifth transistor in the second branch, and a regulating resistor that regulates the between the fourth transistor and the sixth transistor in the first branch.

9. A circuit as claimed in claim 2, wherein a fourth transistor is connected in series with the parallel connected emitters of the first and the third transistors and a fifth transistor is connected as a diode in series :30 with the emitter of the second transistor, wherein the AV between the fourth transistor and a sixth transistor in the second branch is by an additional regulating resistor in the first branch, and the effective current densities in the fifth and sixth transistors are lower than that *in the fourth transistor, and at least the first four transistors and the sixth transistor are of the same polarity.

-17 -

10. A circuit as claimed in claim 2, wherein a fourth transistor is connected in series with the emitter of the first transistor and a fifth transistor is connected as a diode in series with the emitter of the second transistor ad the associated regulating resistor, wherein the V1 between the fourth transistor and a sixth transistor in the second branch whose operating current is regulated by a regulating resistor in the first branch, and a seventh transistor is connected as a diode in series with the emitter of the third 1C) transistor, wherein the effective current densities in the fifth sixth and seventh transistors are lower than that in the fourth transistor, and at least the first four transistors and the sixth transistor are of the same polarity.

11. A circuit as claimed in claim 9, wherein the regulating resistor in the first branch that regulates the AVr between the first transistor also regulates the AVBI between the first transistor and a seventh transistor in the second branch, and an eighth transistor is connected as a diode in series with the emitter of the seventh transistor, the effective current density in the seventh transistor being smaller than the current density in the second transistor, and the effective current density in the eighth transistor being smaller than the current density in the fourth transistor.

12. A first circuit as claimed in claim 7, wherein a further circuit or circuits as claimed in claim 7 are operated in series with the first circuit and with each other, wherein the nodes at which the exemplars are joined may either be single nodes or may be separated in the manner of the join between the transistors of opposite polarity in the sixth embodiment, together with biasing circuitry that simultaneously constrains all exemplars to their proper region of operation and delivers the average of their operating currents to the external terminals, and wherein -18 -the biasing circuitry optionally comprises feedback resistors between the collectors and bases of some or all of third and sixth tranistors of each of the series-configured exemplars, or circuitry that constrains some or all of the nodes at which the circuits are joined and delivers the current required to constrain the nodes in equal proportions to adjacent nodes or in appropriate proportions to the current output terminal or terminals of the circuit.

13. A circuit for use in a temperature sensor or a bandgap regulator constructed and adapted to operate substantially as hereinbefore described with reference to and as illustrated in any one of Figures 5 to 16 of the accompanying drawings.