FR3097993B1 - Dot product operator of floating-point numbers that performs correct rounding - Google Patents
Dot product operator of floating-point numbers that performs correct rounding Download PDFInfo
- Publication number
- FR3097993B1 FR3097993B1 FR1906887A FR1906887A FR3097993B1 FR 3097993 B1 FR3097993 B1 FR 3097993B1 FR 1906887 A FR1906887 A FR 1906887A FR 1906887 A FR1906887 A FR 1906887A FR 3097993 B1 FR3097993 B1 FR 3097993B1
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- FR
- France
- Prior art keywords
- point numbers
- floating
- dot product
- product operator
- performs correct
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/485—Adding; Subtracting
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/487—Multiplying; Dividing
- G06F7/4876—Multiplying
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49936—Normalisation mentioned as feature only
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
- G06F7/49947—Rounding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/14—Conversion to or from non-weighted codes
- H03M7/24—Conversion to or from floating-point codes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computing Systems (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Complex Calculations (AREA)
- Executing Machine-Instructions (AREA)
Abstract
Opérateur de produit scalaire de nombres à virgule flottante réalisant un arrondi correct L’invention est relative à un opérateur matériel de calcul de produit scalaire, comprenant plusieurs multiplieurs (10) recevant chacun deux multiplicandes (a, b) sous forme de nombres à virgule flottante codés dans un premier format de précision (fp16) ; un circuit d’alignement (12) associé à chaque multiplieur, configuré pour, sur la base des exposants des multiplicandes correspondants, convertir le résultat de la multiplication en un nombre à virgule fixe respectif ayant un nombre de bits suffisant (80) pour couvrir toute la dynamique de la multiplication ; et un multi-additionneur (30) configuré pour additionner sans perte les nombres à virgule fixe provenant des multiplieurs, fournissant une somme sous forme de nombre à virgule fixe. Figure pour l’abrégé : Fig. 6The invention relates to a hardware operator for calculating a scalar product, comprising several multipliers (10) each receiving two multiplicands (a, b) in the form of floating point numbers encoded in a first precision format (fp16); an alignment circuit (12) associated with each multiplier, configured to, based on the exponents of the corresponding multiplicands, convert the result of the multiplication into a respective fixed point number having a sufficient number of bits (80) to cover any the dynamics of multiplication; and a multi-adder (30) configured to add losslessly the fixed-point numbers from the multipliers, providing a sum as a fixed-point number. Figure for the abstract: Fig. 6
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1906887A FR3097993B1 (en) | 2019-06-25 | 2019-06-25 | Dot product operator of floating-point numbers that performs correct rounding |
EP20178996.3A EP3757756A1 (en) | 2019-06-25 | 2020-06-09 | Operator for scalar product of numbers with floating comma for performing correct rounding off |
CN202010578649.7A CN112130803A (en) | 2019-06-25 | 2020-06-23 | Floating-point dot-product arithmetic unit with correct rounding |
US16/946,526 US11294627B2 (en) | 2019-06-25 | 2020-06-25 | Floating point dot-product operator with correct rounding |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1906887A FR3097993B1 (en) | 2019-06-25 | 2019-06-25 | Dot product operator of floating-point numbers that performs correct rounding |
FR1906887 | 2019-06-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3097993A1 FR3097993A1 (en) | 2021-01-01 |
FR3097993B1 true FR3097993B1 (en) | 2021-10-22 |
Family
ID=68987763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1906887A Active FR3097993B1 (en) | 2019-06-25 | 2019-06-25 | Dot product operator of floating-point numbers that performs correct rounding |
Country Status (4)
Country | Link |
---|---|
US (1) | US11294627B2 (en) |
EP (1) | EP3757756A1 (en) |
CN (1) | CN112130803A (en) |
FR (1) | FR3097993B1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3097992B1 (en) * | 2019-06-25 | 2021-06-25 | Kalray | Merged addition and multiplication operator for mixed precision floating point numbers for correct rounding |
US11663000B2 (en) * | 2020-01-07 | 2023-05-30 | SK Hynix Inc. | Multiplication and accumulation(MAC) operator and processing-in-memory (PIM) device including the MAC operator |
TW202141290A (en) | 2020-01-07 | 2021-11-01 | 韓商愛思開海力士有限公司 | Processing-in-memory (pim) system and operating methods of the pim system |
US20220229633A1 (en) | 2020-01-07 | 2022-07-21 | SK Hynix Inc. | Multiplication and accumulation(mac) operator and processing-in-memory (pim) device including the mac operator |
CN117389511A (en) * | 2023-10-18 | 2024-01-12 | 上海合芯数字科技有限公司 | Rounding method, rounding system and rounding computer equipment for decimal operation |
CN117762375B (en) * | 2023-12-22 | 2024-10-29 | 摩尔线程智能科技(北京)有限责任公司 | Data processing method, device, computing device, graphics processor, and storage medium |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7346643B1 (en) * | 1999-07-30 | 2008-03-18 | Mips Technologies, Inc. | Processor with improved accuracy for multiply-add operations |
GB2412986B (en) | 2001-03-14 | 2005-11-30 | Micron Technology Inc | Arithmetic pipeline |
TWI235948B (en) * | 2004-02-11 | 2005-07-11 | Via Tech Inc | Accumulatively adding device and method |
US20090164544A1 (en) * | 2007-12-19 | 2009-06-25 | Jeffrey Dobbek | Dynamic range enhancement for arithmetic calculations in real-time control systems using fixed point hardware |
US8166091B2 (en) * | 2008-11-10 | 2012-04-24 | Crossfield Technology LLC | Floating-point fused dot-product unit |
FR2974645A1 (en) * | 2011-04-28 | 2012-11-02 | Kalray | MIXED PRECISION FUSIONED MULTIPLICATION AND ADDITION OPERATOR |
US8626813B1 (en) * | 2013-08-12 | 2014-01-07 | Board Of Regents, The University Of Texas System | Dual-path fused floating-point two-term dot product unit |
US9298082B2 (en) | 2013-12-25 | 2016-03-29 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Mask plate, exposure method thereof and liquid crystal display panel including the same |
US9507565B1 (en) * | 2014-02-14 | 2016-11-29 | Altera Corporation | Programmable device implementing fixed and floating point functionality in a mixed architecture |
US10216479B2 (en) * | 2016-12-06 | 2019-02-26 | Arm Limited | Apparatus and method for performing arithmetic operations to accumulate floating-point numbers |
US10474458B2 (en) * | 2017-04-28 | 2019-11-12 | Intel Corporation | Instructions and logic to perform floating-point and integer operations for machine learning |
US10643297B2 (en) * | 2017-05-05 | 2020-05-05 | Intel Corporation | Dynamic precision management for integer deep learning primitives |
US10338919B2 (en) | 2017-05-08 | 2019-07-02 | Nvidia Corporation | Generalized acceleration of matrix multiply accumulate operations |
US11010131B2 (en) * | 2017-09-14 | 2021-05-18 | Intel Corporation | Floating-point adder circuitry with subnormal support |
US10747502B2 (en) * | 2018-09-19 | 2020-08-18 | Xilinx, Inc. | Multiply and accumulate circuit |
US20210263993A1 (en) * | 2018-09-27 | 2021-08-26 | Intel Corporation | Apparatuses and methods to accelerate matrix multiplication |
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2019
- 2019-06-25 FR FR1906887A patent/FR3097993B1/en active Active
-
2020
- 2020-06-09 EP EP20178996.3A patent/EP3757756A1/en active Pending
- 2020-06-23 CN CN202010578649.7A patent/CN112130803A/en active Pending
- 2020-06-25 US US16/946,526 patent/US11294627B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP3757756A1 (en) | 2020-12-30 |
US20200409661A1 (en) | 2020-12-31 |
FR3097993A1 (en) | 2021-01-01 |
CN112130803A (en) | 2020-12-25 |
US11294627B2 (en) | 2022-04-05 |
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