FR2593624A1 - Method for optimising the memory storage of video signals in a digital image converter, and digital image converter implementing such a method - Google Patents

Abstract

The subject of the invention is a digital image converter comprising an intermediate memory, called block memory, between the radial memory and the image memory. In the block memory, the pixels to be displayed are grouped together in blocks, the blocks being transferred in parallel to the image memory when they are totally filled. Moreover, the blocks of the block memory correspond to those of the image memory in such a way that they can each be used several times for a single antenna rotation.

Description

METHOD FOR OPTIMIZING SIGNAL STORAGE
VIDEOS IN A DIGITAL TRANSFORMER
IMAGE AND DIGITAL IMAGE TRANSFORMER
IMPLEMENTING SUCH A PROCESS
The object of the present invention is a method of optimizing the storage of video signals in a digital image transformer. It also relates to a digital image transformer, often called TDI (for Transformer
Digital d'Images), using this process.

It is recalled that a TDI is a device which admits video information expressed in polar coordinates to enable it to be viewed on a scanning screen in television mode. Such information may for example be the video signal received by a radar: this signal is assigned to each of the successive directions of the radar antenna, angularly identified (Gi) with respect to a reference direction (generally North), and it is displayed along the rays of the same circle, having as its center the radar center (CR); the information thus displayed on a department is called "radial". To fulfill this function, a TDI mainly comprises:
- means for digitizing incident information;
means of memorizing this digital information, called "image memory" and containing at all times the image as it is to be viewed on the screen, a certain number of bits of this memory being assigned to each of the points of the screen, called "pixels", considered as distinct;
- means for converting coordinates: in fact, information to be displayed on a television-type screen must be expressed in Cartesian coordinates;
- so-called artificial remanence circuits, ensuring an aging of the information stored according to a predefined law.

When the quantity of information to be displayed becomes large, which is the case for example when the speed of rotation of the radar antenna increases, there is a problem in terms of access times to the image memory: in fact, this memory must be of large capacity, which excludes for economic reasons the use of very fast memories. The memory access charge is as follows:
- reading from memory, at a rate imposed by the television scanning screen;
- memory refresh, generally imposed by the technologies used for large capacity memories;
- writing of the video signal in the memory.

In addition, in a TDI, the conversion process takes place along the radials and, in the vicinity of the radar center, it appears that the converted points are extremely close to each other and often fall on the same pixel, which multiplies memory accesses. For example, for a square screen of 1024 x 1024 pixels, if we have an image (centered) comprising 8192 radials per antenna revolution, each radial comprising 512 points, we see that writing an image requires 8192 x 512 * 4.106 accesses per revolution, while the writing of 1024 x 1024 pixels requires in principle only about access per revolution.

 One solution would be to allow access to several pixels in parallel for writing to the image memory. However, since the incident points do not have a regular structure with respect to the organization of the memory, such a parallelism is quite difficult and fairly cumbersome to implement.

 Another solution consists in interposing an intermediate memory, called block memory, between the incident information and the Image memory. The organization of this intermediate memory is identical to that of the image memory but the adjacent pixels are also grouped in blocks, or blocks, and these blocks are transferred in parallel in the image memory when they are completely filled, which allows to reduce the write load of the image memory.

 The problem which the invention proposes to solve is the dimensioning and organization of such a block memory.

The present invention therefore relates to a method for optimizing the storage of video signals in a TDI, which consists in using a block memory:
- where the pixels will be recorded as the radar video signal is received and the coordinates converted into a Cartesian coordinate system;
- whose size is much smaller than the size of the image memory, equal to at least 4N blocks if the image memory contains N2, the same blocks being re-used several times during the same antenna turn according to the process following: the blocks of the block memory are grouped into 2N pairs, one of the blocks of a pair being read in parallel to the image memory while the other block receives the incident information; in addition, if we consider the concentric diamonds that form all the blocks of the screen, the blocks of the same pair are assigned to the same diamond as follows at a given time, the radial being memorized crosses a block of row i on a given diamond; the corresponding information is written in the first block of the pair assigned to this diamond; during this time, the second block of the pair is read; when the reading is finished, this second block is available to receive the information which will be memorized when the radials cross the following block, of row i + l, of the same diamond. At this name, the first block will be read, etc. .

Other objects, features and results of the invention will emerge from the following description, given by way of nonlimiting example and illustrated by the appended drawings, which represent:
- Figure 1, the block diagram of a TDl;
- Figure 2, the block diagram of a TDI comprising a block memory;
- Figure 3, an explanatory diagram of the organization of the block memory according to the invention;
- Figure 4, a first embodiment of the TDI according to the invention;
- Figure 5, an embodiment of one of the elements of the previous figure;
- Figure 6, an embodiment of another element of Figure 4
- Figure 7, an embodiment of the TDI according to the invention comprising a set of variants capable of being implemented independently.

 In these different figures, the same references relate to the same elements.

The TDI shown in the diagram of FIG. 1 mainly comprises:
- a television monitor 7, on which the radar information is displayed;
- an image memory 4, containing in digital form the image which will be displayed on the monitor 7
a set 1 of circuits for processing video signals from the radar and received by the TDI; this assembly mainly comprises a sampling circuit of the analog signal received, which ensures its digital conversion, and a memory 10, called radial memory, which successively contains the different radials; in general, set contains two radial memories working alternately in writing and in reading; to simplify, we will generally speak, in the following description, that of memory 10; the assembly 1 may further comprise circuits for mixing the incident radar video with other signals to be displayed on the screen 7;
- a set 3 ensuring the conversion of polar coordinates into Cartesian coordinates; for this purpose, the set 3 receives the value of the angle g it ensures the addressing in writing of the image memory 4, the set 1 providing, via a set 2, the video information to write in image memory 4 in synchronism with the addressing ;;
a set 2 of artificial remanence circuits, which therefore has the role of creating, for the digital information stored in memory 4, for which there are no modifications due to aging, a remanence effect comparable to that which is produced on a residual tube where the brightness of a point begins to decrease as soon as it is registered;
a set 5 of reading circuits in television mode, ensuring the addressing in reading of the image memory 4;
a set 6 of output circuits in television mode, which receives the information contained in the image memory 4 as addressed by the set 5, ensures the digital to analog conversion thereof to generate a television video signal intended for the monitor 7, thus than the generation of conventional television sync signals.

 The circuit assemblies shown in FIG. 1 work under the control and synchronization of a central control circuit, not shown, produced for example using a microprocessor, which receives both the radar video signals and antenna rotation signals.

 FIG. 2 represents a partial block diagram of a TDI comprising a block memory.

 In this figure, we find the radial memory 10, the coordinate conversion assembly 3, the remanence assembly 2 and the image memory 4 of the previous figure.

 This block diagram further comprises a block memory 8, interposed between the radial memory 10 and the remanence assembly 2. Its function, as mentioned above, is to memorize the video as it is reception and corresponding coordinate conversions, according to a structure such as that of the image memory 4, that blocks corresponding to adjacent pixel blocks can be transmitted in parallel to the image memory 4, via the remanence circuits 2.

The TDI then also includes addressing circuits 9 responsible for developing, from the x and y coordinates of the successive points of the radials, supplied by the conversion assembly 3:
the write addresses of the block memory 8, that is to say determine the number of the block which is being written;
- the read addresses of this same block memory;
- the address in the image memory where the block which is read in the block memory must be written.

 In addition, as mentioned above, one of the reasons for the overload in access to the image memory comes from the fact that the same pixel is addressed several times during the same antenna turn by several radials successive, in areas near the radar center. One of the advantages of inserting the block memory 8 is that it makes it possible to avoid these multiple accesses to the image memory for the same pixel; this is achieved by operating a grouping in the memory of blocks of incident information corresponding to the same pixel, and this before any transfer to the image memory. For this, the incident radials, coming from the radial memory 10, pass through a grouping circuit 11 before reaching the block memory 8. The grouping circuit 11, on receipt of each of the points of the incident radial, receives simultaneously the information possibly already stored in the block memory for the pixel considered; a grouping of this information, incidental and already memorized, is then carried out, in general by a maximum function. It is the grouped video information which will be recorded in the block memory in place of the incidental radial.

 FIG. 3 is a diagram explaining the correspondence retained between the blocks of the block memory 8 and the blocks of the image memory 4.

 In FIG. 3, an orthonormal reference frame x y of origin CR, radar center, has been shown. From the radar center, the area covered by the radar is divided into blocks, arranged in rows and columns and each comprising the same number of pixels. By way of example, the description below will be made in the context of square blocks comprising A2 pixels each. These blocks have their sides respectively parallel to the x and y axes. It is assumed that the television screen (7 in FIG. 1) has (N.A) pixels, that is to say N2 blocks. The image memory 4 must therefore have a capacity of (NA) 2 words of ç bits each, if p is the number of bits assigned to each pixel. We also recall that the part of the area covered by the radar which is displayed on the the screen is not necessarily centered on the CR radar center.

 We have shown in dotted lines in FIG. 3 a set of "diamonds" marked Lg, Ll ... Li ... LN ..., the first (Lg) being confused with the origin CR. We can consider that the different blocks of Figure 3 form concentric diamonds L0 ... LN, the different blocks being connected to their rhombus by one of their vertices. The blocks are identified below by the number of the diamond to which they belong, alternately assigned an A or B index for the reasons explained below. The pixel blocks of the screen correspond to blocks of bits in memory which, for simplicity, will be identified by the same reference.

 There is also shown a radial Rj making an angle g with the axis y.

 As mentioned above, a block corresponding to a block crossed by a radial R. (for example the block LiB in the figure) should not be transferred to the image memory until the radials no longer cross the block LiB; this is checked as soon as angle 8.

reaches the block which is adjacent to it, at 450 down to the right for the first quadrant for example, that is to say the block LiA which is adjacent to it on the same diamond (Li). In block memory, the first entry in the next block (LiA) can therefore trigger the reading of the previous block (LiB) of the same diamond (Li).

 Furthermore, when the content of the read block (LiB for example) is fully transferred to the image memory 4, this last block can be re-used for another block. The block chosen is precisely the one in which a write triggers the reading of the LiA block. According to the invention, the blocks of the block memory are therefore grouped in pairs (index A, index B), each of the pairs being assigned to a distinct diamond (Li), one of the blocks of the pair (LiA for example ) being read in parallel to the image memory while the other block (LiB) receives the incidental information, and the blocks being alternately used to reconstruct the different blocks of the same diamond. Conventionally, for a positive angle Gj and close to zero, the blocks are of type A. In this way, the type (A or B) of a block in writing is only a function of x.

 The maximum number of diamonds that can cross a screen whose side is equal to N blocks, is equal to 2N-2. As shown above, the block memory must contain two blocks for each of the diamonds, which makes a minimum number of blocks, for the block memory, of 4N-4, which can be rounded at 4N.

 I1 appears that the size of the block memory is therefore much smaller than that of the image memory (N2 blocks).

 Regarding the size of the blocks (A2 pixels each), his choice is the result of a compromise between different parameters.

 First, the size of the block memory, in pixels, is equal to B = 4NxA2; if we designate by E the dimension of the screen side (always in pixels), we have N = E / A hence B = 4EA. The size of the memory of the blocks therefore increases as A, that is to say as that of the blocks.

 In addition, in order to be able to transfer the A pixels in parallel from the block memory to the image memory in a single image memory access, the latter must generally have A2 independently addressable boxes.

 These two aspects lead to limiting the size of the pavers.

 In addition, the blocks being transmitted to the image memory only once completely filled, there is a delay in viewing which is a function of the size of the blocks (it increases with the size of the blocks) and, at a given size , the distance from the block to the radar center (it is maximum towards the radar center). This delay also leads to limiting the size of the pavers. However, to minimize this latter limitation, two solutions are possible. The first consists in cutting the blocks into sub-blocks and, in the areas close to the radar center, applying the read-write process described above to the sub-blocks and no longer to the blocks. The second solution consists in using several distinct block memories, each having blocks of different size and relating to a particular zone of the screen: the size of the blocks decreases towards the radar center. For the sake of simplicity, the zones are then formed of nested squares, centered on CR. The final image is then formed in the image memory using the principle of medallions, described below. The second solution performs better than the first, but requires more memory boxes.

 On the contrary, the number of addresses of the blocks being equal to 4 N and therefore inversely proportional to the side (A) of the blocks, to limit the number of addresses, we are led not to give them too small a size .

 In addition, in the same direction, too small blocks limit the possibilities of eccentricity of the displayed part. Indeed, very eccentric images are formed by portions of radials very distant from each other; However, correct operation of the process described above requires that all of the blocks have at least one radial crossed, which is no longer the case when the distance between two radials, at x for example, becomes too large relative to the side A of the block, that is to say in practice close to A.

 FIG. 4 represents an embodiment of the TDI according to the invention.

 In this figure, there are elements of FIG. 2, namely the radial memory 10, the grouping circuit 11, the block memory 8, the coordinate conversion assembly 3 and the address assembly 9.

 The block diagram of FIG. 4 also comprises a set of buffer memories of the FIFO type (for First In First Out), one (21) interposed on the path of the video between the block memory 8 and the remanence circuits 2 and the other (22), on the route of the addresses between the assembly 9 and the image memory 4.

 In fact, as mentioned above, the image memory is read according to cycles imposed by the display in television mode; it must also undergo refresh cycles and, in the remaining time, it can accept writing from the blocks from the block memory. It is therefore the image memory which imposes the rhythm of its writing. However, the organization of the block storage method described above does not take account of the requirements of the image memory. It is therefore necessary to have buffers: in accordance with what is said above, when the writing of a block of the memory 8 is finished, it is read bound for the FIFO memory 21 or it is memorized while waiting to be transferred to the image memory 4, via the remanence circuits 2, when the latter is available. Likewise for the addresses, developed according to a process described below.

The set of addresses 9 comprises a first circuit, marked 91, which provides the write and read addressing of the blocks of the memory 8 from the x and y coordinates provided by the set of coordinate conversions 3. As we As seen above (Figure 3), the block memory 8 must consist of at least two separate parts (two boxes), one containing the type A blocks and the other containing the type B blocks. In each of these boxes, the address of a block is the same: it consists of the number of the diamond to which it belongs. This number is given by the following expression:
L = X + Y with: X = x / A
Y = y / A, x and y being the coordinates of a point expressed relative to the radar center CR and A being the number of pixels on each side of a block; X and Y therefore express the coordinates of a block with respect to CR, or more precisely the coordinates of a point characteristic of this block, called base point: that of its vertices which is located on the rhombus to which it belongs. Circuit 91 therefore ensures the calculation of expression L.

According to an alternative embodiment, given that the maximum number of diamonds crossing a square screen of N2 blocks is equal to 2N - 2, the address of the block modulo 2N can be expressed for simplicity; the address in block memory will then be:
L = X + Y (mod. 2N)
Circuit 91 also provides a bit denoted LA / LB which has the value 1 for example when the system writes in a block of type A and the value 0 when it writes in a block of type B. This bit is addressed in particular to the block memory 8, to validate the write and read orders alternately for the boxes containing the blocks of type A and of type B, respectively.

 The assembly 9 also comprises a circuit 93, which also receives the coordinates x and y, or only the least significant bits thereof, and provides the address in the block of each of the pixels to be memorized, for the purpose from memory 8.

The transmission of a block from the block memory 8 to the image memory 4, via the buffer memories 20, consists of:
- the transmission of video information from each of
A2 block pixels; the transmission takes place in parallel and makes it possible to benefit at the level of the image memory from the organized structure of the blocks;
- the transmission of the coordinates of the block considered in the TV screen; this calculation is made by a circuit 92 of the assembly 9.

To this end, the circuit 92 receives the previous x and y coordinates, as well as the coordinates of the center of the screen C e with respect to the radar center CR and that the information of the quadrant to which the block in reading belongs. Circuit 92 then calculates the coordinates Xexc, Yexc of the block considered in the screen, expressed with respect to the screen center. For example, for the first quadrant:
X
exc = XE + 1 - xe
Yexc = YE + 1 - Ye with (XE, YE) coordinates of the base point of the block in writing with respect to the radar center and (xe, ye) coordinates of the screen center Ce
We proceed in a similar way for the other quadrants. When passing the coordinate axes, we have for example for the positive part of the x axis:
Xexc = XE - xe
exc = XE - Xe
Yexc =
Likewise for the passage of the other coordinate axes.

 However, the foregoing, which is advantageous in its simplicity, is only possible if the quadrant has been taken into account when placing the video in the blocks; otherwise, a rotation of the blocks on reading is necessary, before transmission to the image memory. In a preferred embodiment, the quadrant is therefore taken into account to inscribe the video in the blocks; this is done at circuit 93, which receives the quadrant Q information for this purpose.

 In FIG. 4, a circuit 12 for chronometry of the block memory 8 has also been represented, which controls the calculation of the screen coordinates by the circuit 92, writing and reading, alternately, in the two boxes of the block memory 8 , as well as writing to the FIFO memories 20, by means of a circuit 14 described below.

 Finally, FIG. 4 also shows a circuit 13 for chronometry of the image memory which, in addition to the write and read command of the image memory, also controls the reading of the FIFO memories 20.

 The chronometry circuits 12 and 13 are produced in a conventional manner, using clocks and logic circuits, and synchronized by the microprocessor ensuring the control of the entire TDI.

 We have described above the grouping of video signals corresponding to the same pixel. This grouping implies that the incident video is compared with the video stored in the block memory 8 if, and only if, it is not the first writing relating to the pixel considered. If this is the first writing, this must be done directly, without comparison. To this end, two solutions are possible: either the fact is memorized, for each pixel, that a first writing has been carried out, which requires storage means; either we carry out the reset to zero of each block after its reading. This latter solution, shown diagrammatically by block 14 in FIG. 4, is described below in relation to FIG. 5.

 Block 14 includes a memory 23, addressed by block 91 (address L) and which contains the bit LA / LB, for each of the diamonds; this bit is also supplied to it by block 91 of FIG. 4.

 At each top provided by the timing block 12, the content of the memory 23 for the diamond in question is read and then the new value of the bit LA / LB is written there. The incident value LA / LB as well as the memorized value of this same bit are sent to two logic circuits 24 and 25. When these two bits are different, which means that the incident video is written in a new block (LB for example ), the circuit 25 sends a control signal on the one hand to the block memory 8 so that the block corresponding to the address L is read bound for the FIFO memories 20 and, on the other hand, bound for these memories 20 so that they can write to the content currently being read from memory 8. On the contrary, when the bits LA / LB are equal, which means that the incident video is always written in the same block (LA in the 'previous example), the reading of the LB block having already been carried out, the Lob block is reset; for this purpose the circuit 24 delivers a reset signal to the block memory 8.

 FIG. 6 represents an embodiment of the coordinate conversion assembly 3 of the preceding figures.

 This set therefore has the function of providing Cartesian coordinates (x and y) from the angle a made by the radar beam with the reference direction (North). The principle used is that of accumulation: starting, for example, from the point closest to the CR radar center, the coordinates of which are provided in block 3 (entry "init."), The coordinates of each of the points d are successively calculated. 'the same radial.

- si 450 < g < 900, l'incrément en x entre Ii 1 et Ii est pris égal à l'unité; on a alors:

Two methods are known: sine-cosine accumulation and tangent accumulation. By way of example, the tangent accumulation is described below. In this case, a distinction must be made depending on whether the angle a is less than or greater than n / 4 in the first quadrant, J and symmetrically in the others: - if 0 <g <450, increment in y between Ii-l and Ii is taken equal to unity; we then have:

- if 450 <g <900, the increment in x between Ii 1 and Ii is taken equal to unity; we then have:

To this end, the assembly 3 comprises: - a table 33 of the different values of the tangents of each of the angles 9j respectively defining the radials; this table preferably consists of a memory, for example addressed the successive values (j) of the angle G
a first accumulator 35, responsible for drawing up the coordinate at which an accumulation in tg X must be made, that is to say x in a half-quadrant and y in the other half-quadrant of the same quadrant, (cf. expressions (1) and (2) above); this coordinate is denoted V; for this purpose, the accumulator 35 receives from the previous table (33) the value tg a as well as the initialization value, that is to say the coordinate (denoted VO) of the first point of the radial displayed; the accumulator 35 is constituted by an adder 42 surrounded by an input register 41, receiving for each radial the value of tg a, and an output register 43; this latter register receives the initial coordinate VO its output, on the one hand, supplies the current coordinate V along the radial during the accumulations and, on the other hand, is also directed towards the adder 42;
- A second accumulator 34, responsible for developing the other coordinate, denoted U, which must be subjected to an accumulation equal to +1, that is to say y in the first half-quadrant and x in the second half quadrant of the first quadrant; this second accumulator can be constituted simply by a counter, receiving as initial value the coordinate (Uo) of the first point of the radial;
- a set of circuits 36, receiving the coordinates U and V developed by the accumulators 34 and 35, as well as the information of the half-quadrant to which the angle considered belongs, which allows it to develop the Cartesian coordinates (x and y) points of the radial with respect to the radar center
All of the circuits in block 3 shown in FIG. 6 are, as mentioned above, controlled and synchronized by the TDI control device, which in particular ensures the accumulation commands and the supply of the initial values.

 FIG. 7 represents a general block diagram of the TDI according to the invention, comprising with respect to FIG. 4 a certain number of variants capable of being implemented independently of each other.

In FIG. 7, we find the different elements of FIG. 4, namely:
- The grouping set there
- the block memory X, subdivided into two boxes, 81 and 82, respectively containing the blocks of type A and of type B;
- the set of 9 addresses;
- the set 20 of FIFO memories;
- timings 12 and 13.

 It should be noted that the coordinates received by the set 9 are no longer x and y but U and V, the elaboration of the first from the seconds being here integrated into the set 9.

 To these elements was first added a memory 1f, known as zone memory.

 This memory is used in the case where one wishes to form "medallions" on the screen. It will be recalled that the term "medallion" means a part of the radar coverage area, belonging to or not belonging to the image displayed on the screen, which is enlarged with respect to this image; this possibility is for example used when the operator wishes to examine a particular detail. To form these medallions on the screen, the zone memory 15 receives the coordinates of the block in writing, as well as the indication of belonging or not belonging to the image to be displayed of the block in reading (arrow 150 coming from the device TDI).

 In addition, an AND circuit 16 is interposed on the command to read the block memory 8 and write the FIFO memories 20, command coming from the timing block 12. An input of this AND gate 16 is connected to the output of the zone memory 15 in this way, a block capable of being read in the block memory can effectively be read, intended for the FIFO memories, only if it is recognized by the zone memory 15 as having to belong to the image finally visualized.

 Finally, to form a maximum of m medallions on the screen, it is necessary to have m additional circuits such as circuit 92, their switching being also ensured by the TDI control device (arrow 151).

 In addition, a zone memory is necessary, even in the absence of a medallion, when the image displayed on the screen constitutes only part of the zone covered by the radar, in order to be able to determine in the same way whether a block susceptible to be read in block memory must belong or not to the image formed on the screen.

 The diagram of FIG. 7 has also been modified with respect to the diagram of FIG. 4 to allow the homogenization of the image by filling (also called in the Anglo-Saxon literature "pixel filling").

Remember that when the coordinate conversion and / or visualization process is quantified, as is the case for a
TDI, it may happen that the conversion causes dark spots to appear in the middle of a bright area, especially in the parts far from the radar center. This "moth" aspect of the image is corrected by "filling" the dark spots, that is to say by assigning them a non-zero brightness.

 According to the invention, this filling is carried out at the level of the video received in polar coordinates, by creating fictitious radials between the real radials and by assigning to them each a video signal depending on the video signal of the neighboring real radials and, preferably; the video signal of the points of the neighboring real radials which are located at the same module as the fictitious point. These fictitious radials are then converted into Cartesian coordinates and fill the previously unreached pixels.

 In addition to circuits specific to the generation of fictitious radials and to their conversion, such a filling function requires, compared to the diagram in FIG. 4, first of all a duplication of the grouping function 11. FIG. 7 shows, inside the assembly 11, a first block 111 which is assigned to the grouping of the real video (IR) and a second block 112 which receives on the one hand, like the previous block, the video stored in the block memory 8 but which receives, on the other hand, no longer the actual incident video but the video produced by the filling function, denoted IF. The grouped video, whether it comes from the real radials or from the fictitious filling radials, is directed as before for memorization to the block memory 8.

 However, in order to allow simultaneous processing of real and fictitious radials, the video signals to be written having to be, at a given instant, located in different boxes, it may be necessary to subdivide the block memory 8 into a plurality of boxes of smaller capacity, organized diagonally.

 Furthermore, a block must not be transferred to the image memory, via the FIFO memories, unless the real radials and the fictitious filling radials have left it. This verification is carried out by a comparison circuit 17, which receives the coordinates developed by the coordinate conversion system for the different real and fictitious radials and which provides or not a transfer authorization to the AND circuit 16, depending on the result of the comparison. More precisely, in the case where the coordinates are calculated by the tangent accumulation method described above, we note that the real radial and the fictitious radial have an identical coordinate: the coordinate U, which is independent of the polar angle a It then suffices to compare together the coordinates VR of the real radial and VF of the fictitious radial and, more precisely, one of the bits of this coordinate, to know whether the two points considered belong to the same block or not; this is what is done by circuit 17, which is a logic circuit the result of the comparison is noted LR = LF.

 This information LR = LF is also transmitted to the set 14 for resetting the blocks of memory 8 to zero in order to inhibit the writing of the information LA / LB in memory 23 when the radials IF and IR do not belong in the same block. Indeed, in this case, the reading of the block in memory 8 has been inhibited and it is necessary to correlatively inhibit the reset to zero of the block concerned.

 The advantage of this configuration is the lightness of implementation of the filling function which, in particular, does not increase the number of blocks to be transmitted to the image memory, although the number of radials is increased.

 What is described above is necessary in the case where it is desired to carry out a "synchronous" filling, that is to say when the real radials and the fictitious radials are transmitted simultaneously to the image memory.

 On the contrary, when the radials, real or fictitious, are sent one after the other to the image memory ("asynchronous" filling), the splitting of the grouping function (and the comparison circuit (17) is not necessary.

Claims (10)

 1. Method for optimizing the storage of video signals in a digital image transformer, the video signals being supplied in polar coordinates in the form of a succession of radials and forming an image, the transformer comprising:  - a television scanning screen (7) on which the video signals are displayed;  - at least one radial memory (10), successively memorizing the radials i  - a set (3) of circuits ensuring the conversion of polar coordinates into Cartesian coordinates;  - an image memory (4), containing the video signals digitized according to an organization which is identical to that of the screen (7)  - a block memory (8), interposed between the radial memory (10) and the screen memory (4); the process being characterized by the fact:  - that the video signals are transmitted from the radial memory (10) to the block memory (8) as and when the coordinates of each of the points of the radial considered are converted into Cartesian coordinates by the conversion unit ( 3);  - that the block memory (8) is organized like the screen memory (4) and divided into blocks, each of the blocks corresponding to a block of adjacent points on the screen, the blocks being grouped in pairs (type A, type B ), one of the blocks of the same pair being read in parallel intended for the image memory (4) while the other block receives in writing the video signals coming from the radial memory (10) ;;  - that, if we consider the concentric diamonds (Li) that form all the blocks of the screen, the pairs of blocks are assigned respectively to the diamonds,  - and that the first write in a block triggers the reading of the second block of the same pair.  2. Method according to claim 1, characterized in that the second writing in the same block triggers the reset to zero of the second block of the same pair.  3. Method according to one of the preceding claims, characterized in that, before writing a point in a block of the block memory (8), the content of this memory (8) for the point considered is read, the information entered in block memory then resulting from the grouping (11) of the information previously read and the information coming from the radial memory (10).  4. Method according to claim 3, characterized in that the function applied during the grouping (11) is a maximum function.  5. Method according to one of the preceding claims, characterized in that the address of a block in block memory (8) consists of the sequence number L of the diamond to which it belongs, this number being formed by starting from the coordinates (x, y) of one of the vertices of the block as follows: L = X + Y with: X = x / A  Y = ylA where A is the number of points per side of the block.  6. Digital image transformer for implementing the method according to one of the preceding claims, characterized in that it also comprises a set (9) - of addressing circuits receiving the Cartesian coordinates (x, y) developed by the conversion unit (3) and comprising:  - first means (9 I) ensuring the calculation of the address (L) of the block in the block memory (8)  - second means (93) ensuring the calculation of the point number in the block;  - third means (92) ensuring the calculation of the coordinates in the screen (7) of the block being read from the block memory (8).  7. Digital image transformer according to claim 6, characterized in that it further comprises two sets of FIFO type buffer memories (20), the first (21) for video signals and the second (22) for the addresses, interposed between the block memory (8) and the image memory (4).  8. Digital image transformer according to one of claims 6 or 7, characterized in that it further comprises means for creating fictitious radials, intended to homogenize by filling the image formed on the screen (7 ), means for grouping (112) the fictitious radials with the content of the block memory (8), and comparison means (17) determining whether the points of a fictitious radial belong or not to the same block as the points from the previous real radial.  9. Digital image transformer according to one of claims 6 or 8, characterized in that it further comprises means (14) for resetting blocks of the block memory (8).  10. Digital image transformer according to one of claims 6 or 9, characterized in that it further comprises a zone memory (15), determining whether a block in reading of the block memory (8) belongs or not to the image which must be displayed on the screen (7).