FR2249435B1 - - Google Patents

Info

Publication number: FR2249435B1
Authority: FR; France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired

Application number

FR7435903A

Other versions

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Signetics Corp

Original Assignee

Signetics Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1973-10-26

Filing date

1974-10-25

Publication date

1978-06-16

1974-10-25 Application filed by Signetics Corp filed Critical Signetics Corp

1975-05-23 Publication of FR2249435A1 publication Critical patent/FR2249435A1/fr

1978-06-16 Application granted granted Critical

1978-06-16 Publication of FR2249435B1 publication Critical patent/FR2249435B1/fr

Status Expired legal-status Critical Current

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Microelectronics & Electronic Packaging (AREA)
Condensed Matter Physics & Semiconductors (AREA)
General Physics & Mathematics (AREA)
Manufacturing & Machinery (AREA)
Computer Hardware Design (AREA)
Power Engineering (AREA)
High Energy & Nuclear Physics (AREA)
Toxicology (AREA)
Health & Medical Sciences (AREA)
Chemical & Material Sciences (AREA)
Inorganic Chemistry (AREA)
Bipolar Transistors (AREA)
Element Separation (AREA)

FR7435903A 1973-10-26 1974-10-25 Expired FR2249435B1 (fr)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US409903A US3928081A (en)	1973-10-26	1973-10-26	Method for fabricating semiconductor devices using composite mask and ion implantation

Publications (2)

Publication Number	Publication Date
FR2249435A1 FR2249435A1 (fr)	1975-05-23
FR2249435B1 true FR2249435B1 (fr)	1978-06-16

Family

ID=23622431

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FR7435903A Expired FR2249435B1 (fr)	1973-10-26	1974-10-25

Country Status (7)

Country	Link
US (1)	US3928081A (fr)
JP (1)	JPS5342663B2 (fr)
CA (1)	CA1087322A (fr)
DE (1)	DE2450881A1 (fr)
FR (1)	FR2249435B1 (fr)
GB (1)	GB1457169A (fr)
NL (1)	NL7414007A (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
DE2453134C3 (de) *	1974-11-08	1983-02-10	Deutsche Itt Industries Gmbh, 7800 Freiburg	Planardiffusionsverfahren
US4153487A (en) *	1974-12-27	1979-05-08	Tokyo Shibaura Electric Co., Ltd.	Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4151019A (en) *	1974-12-27	1979-04-24	Tokyo Shibaura Electric Co., Ltd.	Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
JPS51127682A (en) *	1975-04-30	1976-11-06	Fujitsu Ltd	Manufacturing process of semiconductor device
US4018627A (en) *	1975-09-22	1977-04-19	Signetics Corporation	Method for fabricating semiconductor devices utilizing oxide protective layer
USRE30282E (en) *	1976-06-28	1980-05-27	Motorola, Inc.	Double master mask process for integrated circuit manufacture
US4110126A (en) *	1977-08-31	1978-08-29	International Business Machines Corporation	NPN/PNP Fabrication process with improved alignment
US4219369A (en) *	1977-09-30	1980-08-26	Hitachi, Ltd.	Method of making semiconductor integrated circuit device
US4215418A (en) *	1978-06-30	1980-07-29	Trw Inc.	Integrated digital multiplier circuit using current mode logic
US4244752A (en) *	1979-03-06	1981-01-13	Burroughs Corporation	Single mask method of fabricating complementary integrated circuits
US4243435A (en) *	1979-06-22	1981-01-06	International Business Machines Corporation	Bipolar transistor fabrication process with an ion implanted emitter
DE2945854A1 (de) *	1979-11-13	1981-05-21	Deutsche Itt Industries Gmbh, 7800 Freiburg	Ionenimplantationsverfahren
JPS56135121A (en) *	1980-03-27	1981-10-22	Nec Corp	Electronic integration-type flow meter with auxiliary pipe
US4335504A (en) *	1980-09-24	1982-06-22	Rockwell International Corporation	Method of making CMOS devices
JPS5786718A (en) *	1980-11-19	1982-05-29	Ricoh Co Ltd	Integrating flowmeter with electronic auxiliary pipe
DE3115029A1 (de) *	1981-04-14	1982-11-04	Deutsche Itt Industries Gmbh, 7800 Freiburg	"verfahren zur herstellung eines integrierten bipolaren planartransistors"
EP0062725B1 (fr) *	1981-04-14	1984-09-12	Deutsche ITT Industries GmbH	Procédé pour la fabrication d'un transistor planaire intégré
DE3136731A1 (de) *	1981-09-16	1983-03-31	Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt	Verfahren zum herstellen einer halbleiteranordnung
DE3137813A1 (de) *	1981-09-23	1983-03-31	Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt	Verfahren zum herstellen einer halbleiteranordnung
JPS58127374A (ja) *	1982-01-25	1983-07-29	Hitachi Ltd	半導体装置の製造方法
US4450021A (en) *	1982-02-22	1984-05-22	American Microsystems, Incorporated	Mask diffusion process for forming Zener diode or complementary field effect transistors
JPS6353970A (ja) *	1986-08-22	1988-03-08	Sanken Electric Co Ltd	半導体装置の製造方法
JPH07120631B2 (ja) *	1988-09-06	1995-12-20	富士電機株式会社	半導体装置の製造方法
GB2237445B (en) *	1989-10-04	1994-01-12	Seagate Microelectron Ltd	A semiconductor device fabrication process

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
GB1150834A (en) *	1966-10-05	1969-05-07	Rca Corp	Method of fabricating semiconductor devices
DE2032838A1 (de) *	1970-07-02	1972-01-13	Licentia Gmbh	Verfahren zum Herstellen einer Halb leiterzone durch Diffusion
US3756861A (en) *	1972-03-13	1973-09-04	Bell Telephone Labor Inc	Bipolar transistors and method of manufacture

1973
- 1973-10-26 US US409903A patent/US3928081A/en not_active Expired - Lifetime
1974
- 1974-10-01 GB GB4261074A patent/GB1457169A/en not_active Expired
- 1974-10-02 CA CA210,560A patent/CA1087322A/fr not_active Expired
- 1974-10-25 DE DE19742450881 patent/DE2450881A1/de not_active Ceased
- 1974-10-25 FR FR7435903A patent/FR2249435B1/fr not_active Expired
- 1974-10-25 JP JP12324874A patent/JPS5342663B2/ja not_active Expired
- 1974-10-25 NL NL7414007A patent/NL7414007A/xx not_active Application Discontinuation

Also Published As

Publication number	Publication date
JPS5342663B2 (fr)	1978-11-14
US3928081A (en)	1975-12-23
NL7414007A (nl)	1975-04-29
GB1457169A (en)	1976-12-01
FR2249435A1 (fr)	1975-05-23
DE2450881A1 (de)	1975-04-30
CA1087322A (fr)	1980-10-07
JPS5075367A (fr)	1975-06-20

Publication	Publication Date	Title
AU476761B2 (fr)	1976-09-30
AU474593B2 (fr)	1976-07-29
AU474511B2 (fr)	1976-07-22
FR2249435B1 (fr)	1978-06-16
AU474838B2 (fr)	1976-08-05
AU471343B2 (fr)	1976-04-15
AU465453B2 (fr)	1975-09-25
AU476714B2 (fr)	1976-09-30
AU476696B2 (fr)	1976-09-30
AU466283B2 (fr)	1975-10-23
AU472848B2 (fr)	1976-06-03
AU477823B2 (fr)	1975-06-19
AU495839B2 (fr)	1975-01-16
AU476873B1 (fr)	1975-01-09
AU477824B2 (fr)	1975-07-17
AU471461B2 (fr)	1976-04-29
CH565647A5 (fr)	1975-08-29
AU470923A (fr)	1976-04-01
AU479458A (fr)	1975-02-20
CH567230A5 (fr)	1975-09-30
CH566806A5 (fr)	1975-09-30
CH564335A5 (fr)	1975-07-31
CH563549A5 (fr)	1975-06-30
CH563011A5 (fr)	1975-06-13
CH561719A5 (fr)	1975-05-15

Legal Events

Date	Code	Title	Description
1994-08-26	ST	Notification of lapse