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DE102015117994B8 - Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion - Google Patents

Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion Download PDF

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Publication number
DE102015117994B8
DE102015117994B8 DE102015117994.6A DE102015117994A DE102015117994B8 DE 102015117994 B8 DE102015117994 B8 DE 102015117994B8 DE 102015117994 A DE102015117994 A DE 102015117994A DE 102015117994 B8 DE102015117994 B8 DE 102015117994B8
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Germany
Prior art keywords
channel region
power semiconductor
semiconductor transistor
fully depleted
depleted channel
Prior art date
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DE102015117994.6A
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English (en)
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DE102015117994A1 (de
DE102015117994B4 (de
Inventor
Anton Mauder
Franz-Josef Niedernostheide
Christian Philipp Sandow
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Infineon Technologies AG
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Infineon Technologies AG
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Priority to DE102015117994.6A priority Critical patent/DE102015117994B8/de
Priority to US15/331,415 priority patent/US9859408B2/en
Priority to CN201610918118.1A priority patent/CN106847908B/zh
Priority to CN202110052644.5A priority patent/CN112614885B/zh
Publication of DE102015117994A1 publication Critical patent/DE102015117994A1/de
Priority to US15/854,478 priority patent/US10326009B2/en
Application granted granted Critical
Publication of DE102015117994B4 publication Critical patent/DE102015117994B4/de
Publication of DE102015117994B8 publication Critical patent/DE102015117994B8/de
Priority to US16/424,968 priority patent/US10665706B2/en
Priority to US16/864,608 priority patent/US11276772B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
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    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
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    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623Buried supplementary region, e.g. buried guard ring
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    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856Source regions
    • H01L29/0865Disposition
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
    • H01L29/66348Vertical insulated gate bipolar transistors with a recessed gate
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    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/66734Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE102015117994.6A 2015-10-22 2015-10-22 Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion Active DE102015117994B8 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE102015117994.6A DE102015117994B8 (de) 2015-10-22 2015-10-22 Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion
CN201610918118.1A CN106847908B (zh) 2015-10-22 2016-10-21 具有完全耗尽的沟道区的功率半导体晶体管
CN202110052644.5A CN112614885B (zh) 2015-10-22 2016-10-21 具有完全耗尽的沟道区的功率半导体晶体管
US15/331,415 US9859408B2 (en) 2015-10-22 2016-10-21 Power semiconductor transistor having fully depleted channel region
US15/854,478 US10326009B2 (en) 2015-10-22 2017-12-26 Power semiconductor transistor having fully depleted channel region
US16/424,968 US10665706B2 (en) 2015-10-22 2019-05-29 Power semiconductor transistor
US16/864,608 US11276772B2 (en) 2015-10-22 2020-05-01 Power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102015117994.6A DE102015117994B8 (de) 2015-10-22 2015-10-22 Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion

Publications (3)

Publication Number Publication Date
DE102015117994A1 DE102015117994A1 (de) 2017-04-27
DE102015117994B4 DE102015117994B4 (de) 2018-07-12
DE102015117994B8 true DE102015117994B8 (de) 2018-08-23

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US (4) US9859408B2 (de)
CN (2) CN106847908B (de)
DE (1) DE102015117994B8 (de)

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US9024413B2 (en) 2013-01-17 2015-05-05 Infineon Technologies Ag Semiconductor device with IGBT cell and desaturation channel structure
DE102015117994B8 (de) * 2015-10-22 2018-08-23 Infineon Technologies Ag Leistungshalbleitertransistor mit einer vollständig verarmten Kanalregion
DE102016112016A1 (de) 2016-06-30 2018-01-04 Infineon Technologies Ag Leistungshalbleiter mit vollständig verarmten Kanalregionen
DE102017124872B4 (de) * 2017-10-24 2021-02-18 Infineon Technologies Ag Verfahren zur Herstellung eines IGBT mit dV/dt-Steuerbarkeit
CN109755298B (zh) * 2017-11-01 2020-10-16 苏州东微半导体有限公司 一种沟槽型igbt功率器件
DE102017128241B3 (de) * 2017-11-29 2019-02-07 Infineon Technologies Austria Ag Layout für einen Nadelzellengraben-MOSFET und Verfahren zu dessen Verarbeitung
DE102017130092A1 (de) * 2017-12-15 2019-06-19 Infineon Technologies Dresden Gmbh IGBT mit vollständig verarmbaren n- und p-Kanalgebieten
DE102018100237B4 (de) * 2018-01-08 2022-07-21 Infineon Technologies Austria Ag Leistungshalbleiterbauelement mit dU/dt Steuerbarkeit und Verfahren zum Herstellen eines Leistungshalbleiterbauelements
DE102018124737A1 (de) * 2018-10-08 2020-04-09 Infineon Technologies Ag Halbleiterbauelement mit einem sic halbleiterkörper und verfahren zur herstellung eines halbleiterbauelements
KR20220032924A (ko) 2020-09-08 2022-03-15 삼성전자주식회사 모스 트랜지스터들을 포함하는 집적 회로 소자
JPWO2023140253A1 (de) * 2022-01-20 2023-07-27
CN114420745B (zh) * 2022-03-30 2022-06-28 深圳芯能半导体技术有限公司 一种碳化硅mosfet及其制备方法

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DE102011052731A1 (de) 2010-08-30 2012-03-01 Infineon Technologies Austria Ag Verfahren zum Bilden einer Halbleitervorrichtung und Halbleitervorrichtung mit einer integrierten Polydiode

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US20190296135A1 (en) 2019-09-26
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DE102015117994A1 (de) 2017-04-27
US10326009B2 (en) 2019-06-18
US10665706B2 (en) 2020-05-26
US11276772B2 (en) 2022-03-15
US9859408B2 (en) 2018-01-02
CN106847908B (zh) 2021-02-09
US20180138301A1 (en) 2018-05-17
US20200259007A1 (en) 2020-08-13
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US20170117397A1 (en) 2017-04-27
DE102015117994B4 (de) 2018-07-12

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