CN203849370U - Boundary scan testing apparatus - Google Patents
Boundary scan testing apparatus Download PDFInfo
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- CN203849370U CN203849370U CN201420156542.3U CN201420156542U CN203849370U CN 203849370 U CN203849370 U CN 203849370U CN 201420156542 U CN201420156542 U CN 201420156542U CN 203849370 U CN203849370 U CN 203849370U
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- 238000012360 testing method Methods 0.000 title claims abstract description 60
- 238000004891 communication Methods 0.000 claims abstract description 11
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- 239000013078 crystal Substances 0.000 claims description 6
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- 238000013461 design Methods 0.000 description 3
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Abstract
The utility model discloses a boundary scan testing apparatus, comprising a USB module, used for performing data communication with an external control computer; a circuit adhesion module connected with the USB module, used for performing chip selection control on a device in each module of the boundary scan testing apparatus and performing time sequence coupling on signals between the chips; a single-chip microcomputer module connected with the circuit adhesion module, used for controlling working state in each module of the boundary scan testing apparatus; a control module connected with the circuit adhesion module, used for generating the signals of the boundary scan testing. According to the utility model, efficiency of boundary scan testing is improved.
Description
Technical field
The utility model relates to Circuit Measurement Technology field, relates in particular to a kind of boundary scan testing device.
Background technology
Boundary scan testing was developed the nineties in last century, appearance along with large scale integrated circuit, printed-circuit board manufacturing technology is to little, micro-, thin development, and traditional measurement jig (In Circuit Test, ICT) cannot meet the test request of current circuit board product.Because the pin of chip is many, components and parts volume is little, and the density of circuit board is large especially, has no idea to carry out lower probe test at all.In this case, a kind of new measuring technology has produced, and it is boundary scan testing that joint test behavior group (Joint Test Action Group, JTAG) defines this new method of testing.
The domestic circuit that carries out boundary scan testing adopts RS232 interface and host computer to communicate mostly at present, and the speed of its communication is slower, and the compatibility of circuit is poor, but cost is but very high, and function upgrading is extremely inconvenient again.
Utility model content
The purpose of this utility model is to propose a kind of boundary scan testing device, to improve the efficiency of boundary scan testing.
The utility model provides a kind of device of boundary scan testing, and described device comprises:
USB module, for carrying out data communication with external control computing machine;
The circuit adhesion module being connected with described USB module, for carrying out sheet selected control system and the signal of chip chamber being carried out to sequential coupling to the device of described each module of boundary scan testing device;
The one-chip computer module being connected with described circuit adhesion module, for controlling the duty of described each module of boundary scan testing device;
The control module being connected with described circuit adhesion module, for generation of the signal of boundary scan testing.
Optionally, described USB module comprises USB chip.
Optionally, described USB module is connected with outside control computing machine.
Optionally, described circuit adhesion module comprises complicated programmable logic device chip.
Optionally, described one-chip computer module comprises singlechip chip.
Optionally, described control module comprises JTAG chip, interface isolating chip and level transferring chip.
Optionally, the output terminal of described control module is connected with outside tested boundary scan test circuit.
Optionally, described boundary scan testing device, also comprises the 40M crystal oscillator being connected respectively with described one-chip computer module with described circuit adhesion module, is used to described circuit adhesion module and described one-chip computer module that clock signal is provided.
The device of a kind of boundary scan testing that the utility model provides, adopt USB module and outer computer to carry out data communication, compared to adopting the communication of RS232 interface, compare, the speed of data communication is higher, adopting CPLD chip is core devices, make boundary scan testing device design more flexible, upgrading is convenient, in control module, add interface isolating chip, level is compatible better, makes the efficiency of boundary scan testing higher, the cost of boundary scan testing device, and volume is smaller and more exquisite, apply more extensive.
Accompanying drawing explanation
Fig. 1 is the structural representation of the boundary scan testing device that provides of the utility model embodiment.
Embodiment
In order to make technical matters that the utility model solves,, the technical scheme of employing and the technique effect that reaches are clearer, below in conjunction with drawings and Examples, the utility model is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the utility model, but not to restriction of the present utility model.It also should be noted that, for convenience of description, in accompanying drawing, only show the part relevant to the utility model but not full content.
Fig. 1 is the structural representation of the boundary scan testing device that provides of the utility model embodiment.As shown in Figure 1, the device that the utility model embodiment provides comprises: USB module 101, the circuit adhesion module 102 being connected with described USB module, the one-chip computer module 103 being connected with described circuit adhesion module and the control module 104 being connected with described circuit adhesion module.
Wherein, described USB module 101, for carrying out data communication with external control computing machine; Described circuit adhesion module 102, for carrying out sheet selected control system and the signal of chip chamber being carried out to sequential coupling to the device of described each module of boundary scan testing device; Described one-chip computer module 103, for controlling the duty of described each module of boundary scan testing device; Described control module 104, for generation of the signal of boundary scan testing.
In such scheme, optional, described USB module 101 comprises USB chip.Described USB module 101 is connected with outside control computing machine.Described USB module 101 can realize outside control computing machine and the data-switching of described boundary scan testing device by USB chip.For example, the Data Analysis transmission of external control computing machine being come by chip CH372 becomes the data of 8 and passes to circuit adhesion module 102, and wherein, chip CH372 can provide clock signal by the passive crystal oscillator of 12M.Described USB module 101 can also be powered for the boundary scan testing device that the utility model embodiment provides, by USB mouth in described USB module, to described boundary scan testing device, provide 5V voltage, through stabilized voltage supply chip ADP3339-3.3 output 3.3V voltage, power to described circuit adhesion module 102, described one-chip computer module 103 and described control module 104.
Optionally, described circuit adhesion module 102 comprises complicated programmable logic device chip (Complex Programmable Logic Device, CPLD).Described circuit adhesion module 102 also can realize the sequential control to described boundary scan testing device.
Optionally, described one-chip computer module 103 comprises singlechip chip.Wherein, described one-chip computer module 103 can also comprise static RAM chip (Static random access memory, SRAM), and described static RAM chip can be preserved the data message in boundary scan testing process.For example, by single chip computer AT 89C52ED2, can complete exchanges data, by static RAM chip, LY62256 can preserve the data message in boundary scan testing process.
Optionally, described control module 104 comprises JTAG chip, interface isolating chip and level transferring chip.Wherein, level transferring chip can be used for carrying out level conversion, as being the required 3.3V of boundary scan testing by the voltage transitions of 5V.For example, by chip SN74LVT8980, can produce the signal of boundary scan testing.
Optionally, the output terminal of described control module 104 is connected with outside tested boundary scan test circuit.Concrete, the signal of the boundary scan testing that the output terminal of described control module 104 produces boundary scan testing device is input to tested boundary scan test circuit, to survey boundary scan testing.The signal of the boundary scan testing preferably, by power interface chip, boundary scan testing device being produced is input to the JTAG mouth of tested boundary scan test circuit.
Optionally, described boundary scan testing device, also comprises the 40M crystal oscillator being connected respectively with described one-chip computer module with described circuit adhesion module, is used to described circuit adhesion module and described one-chip computer module that clock signal is provided.Preferably, this 40M crystal oscillator can carry out clock signal distribution by clock distribution chip CY2305.Meanwhile, this 40M crystal oscillator also can provide clock signal for chip SN74LVT8980.
Each module can be carried out the transmission of data and address signal by data line or control line above.
The boundary scan testing device that the present embodiment provides, adopt USB module and outer computer to carry out data communication, compared to adopting the communication of RS232 interface, compare, the speed of data communication is higher, adopting CPLD chip is core devices, make boundary scan testing device design more flexible, upgrading is convenient, in control module, add interface isolating chip, level is compatible better, makes the efficiency of boundary scan testing higher, the cost of boundary scan testing device, and volume is smaller and more exquisite, apply more extensive.
Note, foregoing is only preferred embodiment of the present utility model.Skilled person in the art will appreciate that the utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various obvious variations, readjust and substitute and can not depart from protection domain of the present utility model.Therefore, although the utility model is described in further detail by above embodiment, but the utility model is not limited only to above embodiment, in the situation that not departing from the utility model design, can also comprise more other equivalent embodiment, and scope of the present utility model is determined by appended claim scope.
Claims (8)
1. a boundary scan testing device, is characterized in that, comprising:
USB module, for carrying out data communication with external control computing machine;
The circuit adhesion module being connected with described USB module, for carrying out sheet selected control system and the signal of chip chamber being carried out to sequential coupling to the device of described each module of boundary scan testing device;
The one-chip computer module being connected with described circuit adhesion module, for controlling the duty of described each module of boundary scan testing device;
The control module being connected with described circuit adhesion module, for generation of the signal of boundary scan testing.
2. device according to claim 1, is characterized in that, described USB module comprises USB chip.
3. device according to claim 1 and 2, is characterized in that, described USB module is connected with outside control computing machine.
4. device according to claim 1, is characterized in that, described circuit adhesion module comprises complicated programmable logic device chip.
5. device according to claim 1, is characterized in that, described one-chip computer module comprises singlechip chip.
6. device according to claim 1, is characterized in that, described control module comprises JTAG chip, interface isolating chip and level transferring chip.
7. according to the device described in claim 1 or 6, it is characterized in that, the output terminal of described control module is connected with outside tested boundary scan test circuit.
8. device according to claim 1, it is characterized in that, described boundary scan testing device, also comprises the 40M crystal oscillator being connected respectively with described one-chip computer module with described circuit adhesion module, is used to described circuit adhesion module and described one-chip computer module that clock signal is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420156542.3U CN203849370U (en) | 2014-04-01 | 2014-04-01 | Boundary scan testing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420156542.3U CN203849370U (en) | 2014-04-01 | 2014-04-01 | Boundary scan testing apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203849370U true CN203849370U (en) | 2014-09-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420156542.3U Expired - Lifetime CN203849370U (en) | 2014-04-01 | 2014-04-01 | Boundary scan testing apparatus |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104133171A (en) * | 2014-07-31 | 2014-11-05 | 中国人民解放军空军预警学院 | Simple boundary scan test system and method based on single-chip microcomputer |
| CN110780183A (en) * | 2019-10-16 | 2020-02-11 | 中国航空工业集团公司洛阳电光设备研究所 | Interface circuit for JTAG boundary scan test |
| CN110794289A (en) * | 2019-11-26 | 2020-02-14 | 英业达科技有限公司 | Boundary scanning and function testing method and device for mainboard |
-
2014
- 2014-04-01 CN CN201420156542.3U patent/CN203849370U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104133171A (en) * | 2014-07-31 | 2014-11-05 | 中国人民解放军空军预警学院 | Simple boundary scan test system and method based on single-chip microcomputer |
| CN110780183A (en) * | 2019-10-16 | 2020-02-11 | 中国航空工业集团公司洛阳电光设备研究所 | Interface circuit for JTAG boundary scan test |
| CN110794289A (en) * | 2019-11-26 | 2020-02-14 | 英业达科技有限公司 | Boundary scanning and function testing method and device for mainboard |
| CN110794289B (en) * | 2019-11-26 | 2021-12-24 | 英业达科技有限公司 | Boundary scanning and function testing method and device for mainboard |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
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| CX01 | Expiry of patent term |
Granted publication date: 20140924 |
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| CX01 | Expiry of patent term |