CN113496876B - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN113496876B CN113496876B CN202010252542.3A CN202010252542A CN113496876B CN 113496876 B CN113496876 B CN 113496876B CN 202010252542 A CN202010252542 A CN 202010252542A CN 113496876 B CN113496876 B CN 113496876B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 title claims description 276
- 239000000463 material Substances 0.000 claims abstract description 209
- 230000008569 process Effects 0.000 claims description 221
- -1 polysiloxane Polymers 0.000 claims description 86
- 229920001296 polysiloxane Polymers 0.000 claims description 80
- 238000005530 etching Methods 0.000 claims description 70
- 239000000178 monomer Substances 0.000 claims description 69
- 239000000758 substrate Substances 0.000 claims description 54
- 239000011368 organic material Substances 0.000 claims description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 39
- 229910052710 silicon Inorganic materials 0.000 claims description 39
- 239000010703 silicon Substances 0.000 claims description 39
- 238000001039 wet etching Methods 0.000 claims description 36
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 34
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 34
- 230000005291 magnetic effect Effects 0.000 claims description 33
- 230000007704 transition Effects 0.000 claims description 27
- 238000002955 isolation Methods 0.000 claims description 22
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 21
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 21
- 239000011259 mixed solution Substances 0.000 claims description 17
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 16
- 239000000243 solution Substances 0.000 claims description 16
- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 claims description 12
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 10
- 229920000642 polymer Polymers 0.000 claims description 8
- 238000004528 spin coating Methods 0.000 claims description 8
- 238000006136 alcoholysis reaction Methods 0.000 claims description 6
- 238000001914 filtration Methods 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 6
- 239000002994 raw material Substances 0.000 claims description 6
- 239000002904 solvent Substances 0.000 claims description 6
- 238000006467 substitution reaction Methods 0.000 claims description 6
- DWAWYEUJUWLESO-UHFFFAOYSA-N trichloromethylsilane Chemical compound [SiH3]C(Cl)(Cl)Cl DWAWYEUJUWLESO-UHFFFAOYSA-N 0.000 claims description 6
- 238000005507 spraying Methods 0.000 claims description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 4
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 3
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 claims description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 3
- 239000003054 catalyst Substances 0.000 claims description 3
- 238000002156 mixing Methods 0.000 claims description 3
- DOAMZWOPDPPKJS-UHFFFAOYSA-N oxiran-2-ol Chemical compound OC1CO1 DOAMZWOPDPPKJS-UHFFFAOYSA-N 0.000 claims description 3
- 238000006068 polycondensation reaction Methods 0.000 claims description 3
- 230000004048 modification Effects 0.000 abstract description 19
- 238000012986 modification Methods 0.000 abstract description 19
- 238000001312 dry etching Methods 0.000 description 39
- 229920002120 photoresistant polymer Polymers 0.000 description 16
- 230000003667 anti-reflective effect Effects 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 10
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 9
- 229910010272 inorganic material Inorganic materials 0.000 description 9
- 239000011147 inorganic material Substances 0.000 description 9
- 238000002360 preparation method Methods 0.000 description 9
- 239000003989 dielectric material Substances 0.000 description 8
- 238000004132 cross linking Methods 0.000 description 7
- 125000003700 epoxy group Chemical group 0.000 description 7
- 239000005416 organic matter Substances 0.000 description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 6
- 229910052799 carbon Inorganic materials 0.000 description 6
- 239000007772 electrode material Substances 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 6
- 125000006850 spacer group Chemical group 0.000 description 5
- ZDZZPLGHBXACDA-UHFFFAOYSA-N [B].[Fe].[Co] Chemical compound [B].[Fe].[Co] ZDZZPLGHBXACDA-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 239000003302 ferromagnetic material Substances 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 4
- 238000007517 polishing process Methods 0.000 description 4
- 229910052715 tantalum Inorganic materials 0.000 description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- FQMNUIZEFUVPNU-UHFFFAOYSA-N cobalt iron Chemical compound [Fe].[Co].[Co] FQMNUIZEFUVPNU-UHFFFAOYSA-N 0.000 description 2
- XBCSKPOWJATIFC-UHFFFAOYSA-N cobalt iron nickel Chemical compound [Fe][Ni][Fe][Co] XBCSKPOWJATIFC-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- UGKDIUIOSMUOAW-UHFFFAOYSA-N iron nickel Chemical compound [Fe].[Ni] UGKDIUIOSMUOAW-UHFFFAOYSA-N 0.000 description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- 239000000395 magnesium oxide Substances 0.000 description 2
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A semiconductor structure, comprising: a layer to be etched; the first modified sacrificial layer is positioned in the initial sacrificial layer, the material of the initial sacrificial layer comprises a photosensitive material, and the first modified sacrificial layer is obtained after modification treatment of part of the initial sacrificial layer. The pattern formed by the semiconductor structure has higher accuracy.
Description
Technical Field
The present disclosure relates to semiconductor manufacturing, and more particularly, to a semiconductor structure and a method for forming the semiconductor structure.
Background
With the increasing demand for high-capacity semiconductor memory devices, the integration density of semiconductor memory devices has been receiving attention, and in order to increase the integration density of semiconductor memory devices, many different methods have been adopted in the prior art, and self-aligned multiple patterning technology is a solution widely accepted and applied in the manufacturing process of semiconductor devices.
Along with further reduction of semiconductor technology nodes, in order to meet the requirement of smaller-size patterns, various organic materials are introduced as materials for forming patterns in the prior art, the organic materials can be modified under proper conditions, and the chemical properties of the modified materials are greatly different from those of the original organic materials, so that under certain conditions, the modified organic materials and the original organic materials have a large etching selection ratio, and therefore, ordered patterns of nano-size structural units can be formed, and patterns of semiconductor structures to be formed are formed.
However, as the semiconductor technology node further decreases, existing methods employing modification of organic materials as patterned semiconductor structures remain to be improved.
Disclosure of Invention
The invention solves the technical problem of providing a semiconductor structure and a method for forming the semiconductor structure so as to improve the pattern accuracy of the formed semiconductor structure.
In order to solve the above technical problems, the present invention provides a semiconductor structure, including: a layer to be etched; the first modified sacrificial layer is positioned in the initial sacrificial layer, the material of the initial sacrificial layer comprises a photosensitive material, and the first modified sacrificial layer is obtained after modification treatment of part of the initial sacrificial layer.
Optionally, the photosensitive material comprises a crosslinkable organic material.
Optionally, the organic material comprises a crosslinkable polysiloxane; the crosslinkable polysiloxane is a polymer of a first monomer and a second monomer.
Optionally, the molecular formula of the first monomer includes C 7H10O2.
Optionally, the molecular formula of the second monomer includes C 4H8O2.
Optionally, the material of the first modified sacrificial layer comprises a cross-linked polysiloxane.
Optionally, the thickness of the initial sacrificial layer ranges from 30 nanometers to 80 nanometers.
Optionally, the layer to be etched includes a substrate and a transition layer located on the substrate.
Optionally, the material of the transition layer includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride.
Optionally, the layer to be etched includes a substrate and a conductive layer on the substrate.
Optionally, the layer to be etched includes a substrate, the substrate includes a base and a device layer located on the base, the device layer includes an isolation structure and a device structure located in the isolation structure, and the device structure includes a bottom electrode layer; a layer of magnetic tunnel structure material on the substrate.
Correspondingly, the technical scheme of the invention also provides a method for forming the semiconductor structure, which comprises the following steps: providing a layer to be etched; forming an initial sacrificial layer on the layer to be etched, wherein the material of the initial sacrificial layer comprises a photosensitive material; forming a first mask structure on the initial sacrificial layer, wherein part of the surface of the initial sacrificial layer is exposed by the first mask structure; modifying the exposed initial sacrificial layer by taking the first mask structure as a mask to form a first modified sacrificial layer, wherein the material of the first modified sacrificial layer is different from that of the initial sacrificial layer; removing the initial sacrificial layer after forming the first modified sacrificial layer; and etching the layer to be etched by taking the first modified sacrificial layer as a mask.
Optionally, the photosensitive material comprises a crosslinkable organic material.
Optionally, the organic material comprises a crosslinkable polysiloxane.
Optionally, the crosslinkable polysiloxane preparation method comprises: mixing a first monomer and a second monomer in a ratio of 1:1, and adding a small amount of ammonia water as a catalyst to enable the first monomer and the second monomer to undergo polycondensation reaction to synthesize crosslinkable polysiloxane; the molecular formula of the first monomer comprises C 7H10O2; the molecular formula of the second monomer includes C 4H8O2.
Optionally, the preparation method of the first monomer comprises the following steps: taking trichloromethylsilane and phenol as initial raw materials and chloroform as a solvent, and carrying out substitution reaction under the heating condition to generate a first monomer intermediate; and filtering and purifying the first monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate the first monomer.
Optionally, the preparation method of the second monomer comprises the following steps: taking trichloromethylsilane and 2-hydroxy ethylene oxide as initial raw materials, and chloroform as solvent, and carrying out substitution reaction under heating condition to generate a second monomer intermediate; and filtering and purifying the second monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate a second monomer.
Optionally, the material of the first modified sacrificial layer comprises a cross-linked polysiloxane.
Optionally, the modification treatment process comprises an ultraviolet treatment process.
Optionally, the parameters of the ultraviolet treatment process are as follows: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
Optionally, the process of removing the initial sacrificial layer includes a wet etching process.
Optionally, the etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide.
Optionally, the thickness of the initial sacrificial layer ranges from 30 nanometers to 80 nanometers.
Optionally, the forming process of the initial sacrificial layer includes a spraying process or a spin coating process.
Optionally, the layer to be etched includes a substrate and a conductive layer on the substrate.
Optionally, after forming the first modified sacrificial layer, before removing the initial sacrificial layer, the method further includes: forming a second mask structure on the initial sacrificial layer and the modified sacrificial layer, wherein the second mask structure exposes part of the surface of the initial sacrificial layer; and modifying the exposed initial sacrificial layer by taking the second mask structure as a mask to form a second modified sacrificial layer, wherein the material of the second modified sacrificial layer is different from that of the initial sacrificial layer.
Optionally, after removing the initial sacrificial layer, etching the conductive layer by using the first modified sacrificial layer and the second modified sacrificial layer as masks.
Optionally, the layer to be etched includes a substrate and a transition layer located on the substrate.
Optionally, the material of the transition layer includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride.
Optionally, after forming the first modified sacrificial layer, before removing the initial sacrificial layer, the method further includes: forming a third mask structure on the initial sacrificial layer and the first modified sacrificial layer, wherein a part of the surface of the initial sacrificial layer and the surface of the first modified sacrificial layer are exposed by the third mask structure; etching the initial sacrificial layer and the first modified sacrificial layer by taking the third mask structure as a mask until the surface of the transition layer is exposed, forming first grooves in the first modified sacrificial layer and the initial sacrificial layer, and exposing part of the side wall surfaces of the initial sacrificial layer and the side wall surfaces of the first modified sacrificial layer by the first grooves; and forming a side wall on the side wall of the first groove.
Optionally, after forming the side wall, removing the initial sacrificial layer, and forming a second groove in the first modified sacrificial layer; and after the initial sacrificial layer is removed, the side wall and the first modified sacrificial layer are used as masks to etch the layer to be etched.
Optionally, the method for forming the side wall includes: forming a side wall material layer on the inner wall of the first groove, the surface of the initial sacrificial layer and the surface of the first modified sacrificial layer; and etching the side wall material layer until the surface of the transition layer is exposed, and forming a side wall on the side wall of the first groove.
Optionally, the material of the side wall is different from the material of the first modified sacrificial layer, and the material of the side wall is different from the material of the initial sacrificial layer.
Optionally, the material of the side wall includes one or more of titanium oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride and silicon oxycarbonitride.
Optionally, the layer to be etched includes a substrate, the substrate includes a base and a device layer located on the base, the device layer includes an isolation structure and a device structure located in the isolation structure, and the device structure includes a bottom electrode layer; a layer of magnetic tunnel structure material over the device layer.
Optionally, the method for etching the layer to be etched includes: and etching the magnetic tunnel structure material layer by taking the first modified sacrificial layer as a mask until the top surface of the bottom electrode layer is exposed, and forming a magnetic tunnel structure on the surface of the bottom electrode.
Optionally, after forming the magnetic tunnel structure, forming a dielectric layer on the substrate, wherein the magnetic tunnel structure is located in the dielectric layer; forming a fourth mask structure on the dielectric layer, wherein the fourth mask structure exposes part of the surface of the dielectric layer on the magnetic tunnel structure; etching the dielectric layer by taking the fourth mask structure as a mask until the top surface of the magnetic tunnel structure is exposed, and forming a third groove in the dielectric layer; a top electrode is formed within the third recess.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
In the semiconductor structure in the technical scheme of the invention, the material of the initial sacrificial layer comprises a photosensitive material, and the first modified sacrificial layer is obtained by modifying part of the initial sacrificial layer, so that the initial sacrificial layer and the first modified sacrificial layer have larger etching selection ratio, and the damage to the first modified sacrificial layer by the process of removing the initial sacrificial layer later is smaller, so that the first modified sacrificial layer can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and the pattern is transferred to the layer to be etched, thereby forming the semiconductor structure with better dimensional uniformity.
According to the forming method of the technical scheme, the initial sacrificial layer is formed on the layer to be etched, the material of the initial sacrificial layer comprises a photosensitive material, the first mask structure is used as a mask, modification treatment is conducted on the exposed initial sacrificial layer, and the first modified sacrificial layer is formed, so that the material of the initial sacrificial layer is different from the material of the first modified sacrificial layer. And then removing the initial sacrificial layer, and etching the layer to be etched by taking the first modified sacrificial layer as a mask. The material of the initial sacrificial layer is different from the material of the first modified sacrificial layer, so that the first modified sacrificial layer and the initial sacrificial layer have larger etching selection ratio, the damage of the process for removing the initial sacrificial layer to the first modified sacrificial layer is smaller, the first modified sacrificial layer can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and the pattern is transferred to the layer to be etched, so that a semiconductor structure with better dimensional uniformity is formed.
Further, the material of the initial sacrificial layer comprises a crosslinkable organic material comprising a crosslinkable polysiloxane; the modification treatment process comprises an ultraviolet treatment process. The ultraviolet treatment process can enable epoxy groups of the crosslinkable polysiloxane to undergo a crosslinking reaction to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a large etching selection ratio, and a first modified sacrificial layer with high dimensional accuracy and good morphology can be formed on the surface of the layer to be etched by the crosslinked polysiloxane.
Further, the process of removing the initial sacrificial layer comprises a wet etching process, an etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide, the crosslinkable polysiloxane can be dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, and the crosslinked polysiloxane is not dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, so that the wet etching process can be used for removing the initial sacrificial layer, and the damage to the first modified sacrificial layer is small, so that the first modified sacrificial layer with high dimensional accuracy and good morphology can be formed on the surface of the layer to be etched.
Drawings
FIGS. 1 through 3 are schematic cross-sectional views illustrating a semiconductor structure forming process in one embodiment;
FIGS. 4-11 are schematic cross-sectional views illustrating a semiconductor structure forming process according to an embodiment of the present invention;
Fig. 12-22 are schematic cross-sectional views illustrating a semiconductor structure forming process according to an embodiment of the present invention;
fig. 23 to 29 are schematic cross-sectional views illustrating a semiconductor structure forming process according to another embodiment of the present invention.
Detailed Description
As described in the background, there is a need for improvement in existing methods that employ modification of organic materials as patterned semiconductor structures. The analysis will now be described with reference to specific examples.
Fig. 1 to 3 are schematic cross-sectional views illustrating a semiconductor structure forming process in an embodiment.
Referring to fig. 1, a layer to be etched 100 is provided; forming a transition layer 101 on the layer to be etched 100; forming an initial sacrificial layer 102 on the transition layer 101; forming a liner layer 103 on the initial sacrificial layer 102; forming an anti-reflection layer 104 on the liner layer 103; a patterned photoresist layer 105 is formed over the antireflective layer 104.
Referring to fig. 2, the patterned photoresist layer 105 is used as a mask to etch the anti-reflection layer 104 and the liner layer 103 until the surface of the initial sacrificial layer 102 is exposed; the exposed initial sacrificial layer 102 is subjected to a modification treatment to form a modified sacrificial layer 106.
Referring to fig. 3, the anti-reflection layer 104, the liner layer 103 and the initial sacrificial layer 102 are removed; and etching the transition layer 101 and the layer to be etched 100 by taking the modified sacrificial layer 106 as a mask to form a semiconductor structure 107.
In the process of forming the semiconductor structure, the modification treatment process of the exposed initial sacrificial layer 102 is an ion implantation process. Along with the shrinking of the semiconductor structure size, the size of the modified sacrificial layer 106 is smaller and smaller, and the requirement on the size accuracy of the modified sacrificial layer 106 is higher and higher, so that the ion implantation area of the ion implantation process is smaller and smaller, and the process difficulty of the ion implantation is improved; in addition, the implanted ions are easy to diffuse, so that the formed modified sacrificial layer 106 is poor in dimensional accuracy and uniformity, and when the semiconductor structure is formed by etching the layer to be etched by taking the modified sacrificial layer 106 as a mask, the semiconductor structure is also poor in dimensional accuracy and uniformity, so that the requirement of the semiconductor structure with high dimensional accuracy cannot be met, and the performance of the semiconductor structure is further affected.
In order to solve the problems, the technical scheme of the invention provides a semiconductor structure and a method for forming the semiconductor structure, wherein an initial sacrificial layer is formed on a layer to be etched, a part of the initial sacrificial layer is subjected to ultraviolet treatment to form a modified sacrificial layer, then the initial sacrificial layer is removed, and the layer to be etched is etched by taking the modified sacrificial layer as a mask. The modified sacrificial layer obtained by ultraviolet treatment has higher dimensional accuracy, so that a semiconductor structure with better dimensional uniformity can be formed.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 4 to 11 are schematic cross-sectional views illustrating a semiconductor structure forming process according to an embodiment of the present invention.
Referring to fig. 4, a layer to be etched is provided.
The layer to be etched includes a substrate 200 and a conductive layer 201 on the substrate 200.
The substrate 200 includes a base (not shown) and a device layer (not shown) on the base, the device layer including an isolation structure and a device structure within the isolation structure, the device structure including a transistor, a resistor, an inductor, a capacitor, or a conductive structure. The device structure is not limited in this embodiment.
The substrate material comprises monocrystalline silicon, polycrystalline silicon, germanium, silicon germanium, gallium arsenide, or silicon-on-insulator. The material of the conductive layer 201 includes a metal including one or more of titanium nitride, copper, aluminum, tungsten, tantalum, and tantalum nitride.
In this embodiment, the material of the substrate includes monocrystalline silicon; the material of the conductive layer 201 includes titanium nitride. The conductive layer 201 is electrically connected to the device structure.
Referring to fig. 5, an initial sacrificial layer 202 is formed on a layer to be etched.
The material of the initial sacrificial layer 202 includes a photosensitive material including a crosslinkable organic material.
In this embodiment, the organic material comprises a crosslinkable polysiloxane. The crosslinkable polysiloxane is a polymer of a first monomer and a second monomer, and the preparation process of the crosslinkable polysiloxane is specifically shown in fig. 6.
The epoxy group of the crosslinkable polysiloxane can undergo a crosslinking reaction under the treatment of ultraviolet rays to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a large etching selection ratio, and a first modified sacrificial layer with high dimensional accuracy can be formed on the surface of the layer to be etched by the crosslinked polysiloxane.
The thickness of the initial sacrificial layer 202 ranges from 30 nm to 80 nm.
If the thickness of the initial sacrificial layer 202 is too thin, the thickness of the first modified sacrificial layer formed by modification treatment is too thin, and when the first modified sacrificial layer is used for pattern transmission, if the first modified sacrificial layer is damaged, the appearance of the pattern is also easy to change, so that the transmission of the pattern is not facilitated; if the thickness of the initial sacrificial layer 202 is too thick, larger process conditions are required when the initial sacrificial layer 202 is modified and the formed first modified sacrificial layer is removed, thereby wasting the process.
The initial sacrificial layer 202 is formed by a spray coating process or a spin coating process. In this embodiment, the forming process of the initial sacrificial layer 202 includes a spin-coating process, which can rapidly form the initial sacrificial layer 202 with a relatively thick and uniform thickness.
With continued reference to fig. 5, a first mask structure is formed on the initial sacrificial layer 202, and the first mask structure exposes a portion of the surface of the initial sacrificial layer 202.
The first mask structure includes: a liner layer 203; an anti-reflection layer 204 on the liner layer 203; a photoresist layer 205 located on the anti-reflective layer 204.
The method for forming the first mask structure comprises the following steps: forming a spacer material layer (not shown) on the initial sacrificial layer 202; forming an anti-reflection material layer (not shown) on the spacer material layer; forming a patterned photoresist layer 205 over the anti-reflective material layer; and etching the anti-reflection material layer and the lining material layer by taking the patterned photoresist layer 205 as a mask until the surface of the initial sacrificial layer 202 is exposed, so as to form the first mask structure.
The material of the pad layer 203 includes an organic material or an inorganic material; the organic material comprises a carbon-containing organic matter or a silicon-containing organic matter; the inorganic material includes one or more combinations of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, and silicon carbide nitride. The material of the anti-reflection layer 204 includes an organic material including a silicon-containing organic material or an inorganic material including silicon nitride, silicon carbide nitride, or titanium nitride. The process of etching the anti-reflective material layer and the liner material layer includes one or a combination of a dry etching process and a wet etching process.
In this embodiment, the material of the liner layer 203 includes a carbon-containing organic matter; the material of the anti-reflection layer 204 includes silicon nitride. The process of etching the anti-reflection material layer and the liner material layer comprises a dry etching process, and the dry etching process can form a first mask structure with good side wall morphology, so that the size of the initial sacrificial layer 202 exposed by the first mask structure can be accurately controlled, and the size accuracy of a pattern formed later is good.
Referring to fig. 6, the crosslinkable polysiloxane preparation method includes: mixing the first monomer and the second monomer in a ratio of 1:1, and adding a small amount of ammonia water as a catalyst to enable the first monomer and the second monomer to undergo polycondensation reaction to synthesize the crosslinkable polysiloxane.
In this embodiment, the molecular formula of the first monomer includes C 7H10O2; the molecular formula of the second monomer includes C 4H8O2.
The preparation method of the first monomer comprises the following steps: taking trichloromethylsilane and phenol as initial raw materials and chloroform as a solvent, and carrying out substitution reaction under the heating condition to generate a first monomer intermediate; and filtering and purifying the first monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate the first monomer.
In this embodiment, the molecular formula of the first monomer intermediate includes C 7H9OCl2.
The preparation method of the second monomer comprises the following steps: taking trichloromethylsilane and 2-hydroxy ethylene oxide as initial raw materials, and chloroform as solvent, and carrying out substitution reaction under heating condition to generate a second monomer intermediate; and filtering and purifying the second monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate a second monomer.
In this embodiment, the molecular formula of the second monomeric intermediate includes C 4H7OCl2.
Referring to fig. 7, the exposed initial sacrificial layer 202 is modified by using the first mask structure as a mask, so as to form a first modified sacrificial layer 206, where a material of the first modified sacrificial layer 206 is different from a material of the initial sacrificial layer 202.
In this embodiment, the modification treatment process includes an ultraviolet treatment process. The ultraviolet treatment process can enable epoxy groups of the crosslinkable polysiloxane to undergo a crosslinking reaction to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a larger etching selection ratio, and the crosslinked polysiloxane can form a first modified sacrificial layer 206 with higher dimensional accuracy on the surface of the layer to be etched.
In this embodiment, the material of the first modified sacrificial layer 206 includes a cross-linked polysiloxane.
The material of the first modified sacrificial layer 206 is different from the material of the initial sacrificial layer 202, so that the first modified sacrificial layer 206 and the initial sacrificial layer 202 have a larger etching selection ratio, and the damage of the process for removing the initial sacrificial layer 202 to the first modified sacrificial layer 206 is smaller, so that the first modified sacrificial layer 206 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and the pattern is transferred to the layer to be etched, so that a semiconductor structure with better dimensional uniformity is formed.
In this embodiment, the parameters of the ultraviolet treatment process are as follows: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
The ultraviolet treatment process under the process parameter conditions can enable the initial sacrificial layer 202 with the thickness ranging from 30 nanometers to 80 nanometers to fully react to form the first modified sacrificial layer 206, so that in the subsequent process of removing the initial sacrificial layer, the pattern formed by the first modified sacrificial layer 206 is good in appearance, the situation that the first modified sacrificial layer 206 formed by insufficient reaction of the initial sacrificial layer is damaged by the removing process is avoided, and the dimensional accuracy of the pattern formed by the first modified sacrificial layer 206 is improved.
Referring to fig. 8, after the first modified sacrificial layer 206 is formed, the first mask structure is removed.
The process of removing the first mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the first mask structure includes a dry etching process.
Referring to fig. 9, after the first mask structure is removed, a second mask structure is formed on the initial sacrificial layer 202 and the first modified sacrificial layer 206, and the second mask structure exposes a portion of the surface of the initial sacrificial layer 202; and modifying the exposed initial sacrificial layer 202 by taking the second mask structure as a mask to form a second modified sacrificial layer 210, wherein the material of the second modified sacrificial layer 210 is different from that of the initial sacrificial layer 202.
The second mask structure includes: a liner layer 207; an anti-reflection layer 208 on the liner layer 207; a photoresist layer 209 over the anti-reflective layer 208. The specific description of the method, process and material for forming the second mask structure refers to the first mask structure described in fig. 5, and will not be repeated here.
In this embodiment, the modification treatment process includes an ultraviolet treatment process. The material of the second modified sacrificial layer 210 includes a cross-linked polysiloxane. The second modified sacrificial layer 210 is formed of the same material and in the same process as the first modified sacrificial layer 206, and the process of forming the first modified sacrificial layer 206 shown in fig. 7 is not described herein.
In this embodiment, the parameters of the ultraviolet treatment process include: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
A first mask structure is formed on the initial sacrificial layer 202, the first mask structure is used as a mask to modify the initial sacrificial layer 202 to form a first modified sacrificial layer 206, a second mask structure is formed on the initial sacrificial layer 202 and the first modified sacrificial layer 206, the second mask structure is used as a mask to modify the initial sacrificial layer 202 to form a second modified sacrificial layer 210, the two mask structures and the two modification processes form the second modified sacrificial layer 210 and the first modified sacrificial layer 206, the second modified sacrificial layer 210 and the first modified sacrificial layer 206 have smaller pattern sizes and smaller distances, and meanwhile have better morphology, so that the process for forming the second modified sacrificial layer 210 and the first modified sacrificial layer 206 can be suitable for semiconductor processes requiring smaller pattern transfer.
Referring to fig. 10, after forming the second modified sacrificial layer 210, the second mask structure is removed; after removing the second mask structure, the initial sacrificial layer 202 is removed.
The process of removing the second mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the second mask structure includes a dry etching process.
The process of removing the initial sacrificial layer 202 includes a combination of one or more of a wet etching process and a dry etching process.
In this embodiment, the process of removing the initial sacrificial layer 202 includes a wet etching process, and the etching solution of the wet etching process includes a mixed solution of sulfuric acid and hydrogen peroxide.
The etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide, the crosslinkable polysiloxane can be dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, and the crosslinked polysiloxane is not dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, so that the wet etching process can be used for removing the initial sacrificial layer 202, and the first modified sacrificial layer 206 and the second modified sacrificial layer 210 are less damaged, so that the first modified sacrificial layer 206 and the second modified sacrificial layer 210 with higher dimensional accuracy and better morphology can be formed on the surface of the layer to be etched, and a semiconductor structure with better dimensional uniformity is formed when the pattern is transferred to the layer to be etched.
Referring to fig. 11, the conductive layer 201 is etched with the first modified sacrificial layer 206 and the second modified sacrificial layer 210 as masks, so as to form a conductive structure 211.
The process of etching the conductive layer 201 using the first modified sacrificial layer 206 and the second modified sacrificial layer 210 as masks includes one or more combinations of a dry etching process and a wet etching process.
In this embodiment, the process of etching the conductive layer 201 includes a dry etching process, and the dry etching process can form the conductive structure 211 with good sidewall morphology and uniform size, so that the contact position is accurate and the conductive structure has good conductive performance when the conductive structure is subsequently used as a connection between the substrate and other devices.
Correspondingly, an embodiment of the present invention further provides a semiconductor structure, referring to fig. 8, including: a layer to be etched; an initial sacrificial layer 202 and a first modified sacrificial layer 206 are located on the surface of the layer to be etched, the first modified sacrificial layer 206 is located in the initial sacrificial layer, and the material of the initial sacrificial layer 202 is different from the material of the first modified sacrificial layer 206.
In this embodiment, the material of the initial sacrificial layer 202 includes a photosensitive material including a crosslinkable organic material.
In this embodiment, the organic material comprises a crosslinkable polysiloxane; the crosslinkable polysiloxane is a polymer of a first monomer and a second monomer.
In this embodiment, the molecular formula of the first monomer includes C 7H10O2.
In this embodiment, the molecular formula of the second monomer includes C 4H8O2.
In the present embodiment, the thickness of the initial sacrificial layer 202 ranges from 30 nm to 80 nm
In this embodiment, the material of the first modified sacrificial layer 206 includes a cross-linked polysiloxane.
In this embodiment, the layer to be etched includes a substrate 200 and a conductive layer 201 on the substrate 200.
The substrate 200 includes a base (not shown) and a device layer (not shown) on the base, the device layer including an isolation structure and a device structure within the isolation structure, the device structure including a transistor, a resistor, an inductor, a capacitor, or a conductive structure. The device structure is not limited in this embodiment.
The material of the conductive layer 201 includes a metal including one or more of titanium nitride, copper, aluminum, tungsten, tantalum, and tantalum nitride.
In this embodiment, the material of the conductive layer 201 includes titanium nitride. The conductive layer 201 is electrically connected to the device structure.
In the semiconductor structure, the material of the initial sacrificial layer 202 includes a photosensitive material, the first modified sacrificial layer 206 is obtained after modifying a portion of the initial sacrificial layer 202, and the materials of the initial sacrificial layer 202 and the first modified sacrificial layer 206 are different, so that the initial sacrificial layer 202 and the first modified sacrificial layer 206 have a larger etching selection ratio, and therefore, the damage to the first modified sacrificial layer 206 caused by the subsequent process of removing the initial sacrificial layer 202 is smaller, and therefore, the first modified sacrificial layer 206 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and then transfer the pattern to the layer to be etched, thereby forming a semiconductor structure with better dimensional uniformity.
Fig. 12-22 are schematic cross-sectional views illustrating a semiconductor structure forming process according to an embodiment of the present invention.
Referring to fig. 12, a layer to be etched is provided.
The layer to be etched includes a substrate 300 and a transition layer 301 on the substrate 300.
The material of the transition layer 301 includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride. In this embodiment, the material of the transition layer 301 includes silicon nitride, and the transition layer 301 is used to stably transfer the pattern to the substrate, so as to form a semiconductor structure with better morphology.
The substrate 300 includes a base (not shown) and a device layer (not shown) on the base, the device layer including an isolation structure and a device structure within the isolation structure, the device structure including a transistor, a resistor, an inductor, a capacitor, or a conductive structure. The device structure is not limited in this embodiment.
The substrate material comprises monocrystalline silicon, polycrystalline silicon, germanium, silicon germanium, gallium arsenide, or silicon-on-insulator. In this embodiment, the material of the substrate comprises monocrystalline silicon.
Referring to fig. 13 and 14, fig. 14 is a top view of fig. 13, fig. 13 is a schematic cross-sectional structure of fig. 14, in which the photoresist layer 305 and the anti-reflection layer 304 are omitted along a cross-sectional line AA', and an initial sacrificial layer 302 is formed on the layer to be etched; a first mask structure is formed over the initial sacrificial layer 302, the first mask structure exposing a portion of the surface of the initial sacrificial layer 302.
The material of the initial sacrificial layer 302 includes a photosensitive material including a crosslinkable organic material.
In this embodiment, the organic material comprises a crosslinkable polysiloxane, which is a polymer of a first monomer and a second monomer.
The preparation method of the crosslinkable polysiloxane is shown in fig. 6, and will not be described herein.
The epoxy group of the crosslinkable polysiloxane can undergo a crosslinking reaction under the treatment of ultraviolet rays to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a large etching selection ratio, and a first modified sacrificial layer with high dimensional accuracy can be formed on the surface of the layer to be etched by the crosslinked polysiloxane.
The thickness of the initial sacrificial layer 302 ranges from 30 nm to 80 nm.
If the thickness of the initial sacrificial layer 302 is too thin, the thickness of a first modified sacrificial layer formed by modification treatment in the following process is too thin, and when the first modified sacrificial layer is used for pattern transmission, if the first modified sacrificial layer is damaged, the appearance of the pattern is also easy to change, so that the transmission of the pattern is not facilitated; if the thickness of the initial sacrificial layer 302 is too thick, larger process conditions are required when the initial sacrificial layer 302 is modified and the first modified sacrificial layer formed is removed, thereby wasting the process.
The initial sacrificial layer 302 is formed by a spray coating process or a spin coating process. In this embodiment, the forming process of the initial sacrificial layer 302 includes a spin-coating process, which can rapidly form the initial sacrificial layer 302 with a relatively thick and uniform thickness.
The first mask structure includes: a liner layer 303; an anti-reflection layer 304 on the liner layer 303; a photoresist layer 305 is located over the anti-reflective layer 304.
The method for forming the first mask structure comprises the following steps: forming a spacer material layer (not shown) on the initial sacrificial layer 302; forming an anti-reflection material layer (not shown) on the spacer material layer; forming a patterned photoresist layer 305 over the layer of antireflective material; and etching the anti-reflection material layer and the lining material layer by taking the patterned photoresist layer 305 as a mask until the surface of the initial sacrificial layer 302 is exposed, so as to form the first mask structure.
The material of the cushion layer 303 includes an organic material or an inorganic material; the organic material comprises a carbon-containing organic matter or a silicon-containing organic matter; the inorganic material includes one or more combinations of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, and silicon carbide nitride. The material of the anti-reflection layer 304 includes an organic material including a silicon-containing organic material or an inorganic material including silicon nitride, silicon carbide nitride, or titanium nitride. The process of etching the anti-reflective material layer and the liner material layer includes one or a combination of a dry etching process and a wet etching process.
In this embodiment, the material of the liner layer 303 includes a carbon-containing organic substance; the material of the anti-reflection layer 304 comprises silicon nitride. The process of etching the anti-reflection material layer and the liner material layer comprises a dry etching process, and the dry etching process can form a first mask structure with good side wall morphology, so that the size of the initial sacrificial layer 302 exposed by the first mask structure can be accurately controlled, and the size accuracy of a pattern formed later is good.
With continued reference to fig. 13 and 14, the exposed initial sacrificial layer 302 is modified by using the first mask structure as a mask, so as to form a first modified sacrificial layer 306, where a material of the first modified sacrificial layer 306 is different from a material of the initial sacrificial layer 302.
In this embodiment, the modification treatment process includes an ultraviolet treatment process. The ultraviolet treatment process can enable epoxy groups of the crosslinkable polysiloxane to undergo a crosslinking reaction to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a larger etching selection ratio, and the crosslinked polysiloxane can form a first modified sacrificial layer 306 with higher dimensional accuracy on the surface of the layer to be etched.
In this embodiment, the material of the first modified sacrificial layer 306 includes a cross-linked polysiloxane.
The material of the first modified sacrificial layer 306 is different from the material of the initial sacrificial layer 302, so that the first modified sacrificial layer 306 and the initial sacrificial layer 302 have a larger etching selection ratio, the damage of the process for removing the initial sacrificial layer 302 to the first modified sacrificial layer 306 is smaller, and therefore, the first modified sacrificial layer 306 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and the pattern is transferred to the layer to be etched, so that a semiconductor structure with better dimensional uniformity is formed.
In this embodiment, the parameters of the ultraviolet treatment process are as follows: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
The ultraviolet treatment process under the process parameter conditions can enable the initial sacrificial layer 302 with the thickness ranging from 30 nanometers to 80 nanometers to fully react to form the first modified sacrificial layer 306, so that in the subsequent process of removing the initial sacrificial layer, the pattern formed by the first modified sacrificial layer 306 is good in appearance, the situation that the first modified sacrificial layer 306 formed by insufficient reaction of the initial sacrificial layer is damaged by the removing process is avoided, and the dimensional accuracy of the pattern formed by the first modified sacrificial layer 306 is improved.
Referring to fig. 15, fig. 15 is a schematic view of fig. 13, after forming the first modified sacrificial layer 306, the first mask structure is removed.
The process of removing the first mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the first mask structure includes a dry etching process.
Referring to fig. 16 and 17, fig. 17 is a top view of fig. 16, and fig. 16 is a schematic cross-sectional structure diagram of fig. 17, in which the photoresist layer 309 and the anti-reflection layer 308 are omitted along the cross-sectional line BB', and a third mask structure is formed on the initial sacrificial layer 302 and the first modified sacrificial layer 306, and exposes a portion of the surface of the initial sacrificial layer 302 and the surface of the first modified sacrificial layer 306.
The third mask structure includes: a liner layer 307; an anti-reflection layer 308 on the liner layer 307; a photoresist layer 309 on the anti-reflective layer 308. The specific description of the method, process and material for forming the third mask structure refers to the first mask structure described in fig. 13 and 14, and will not be repeated here.
Referring to fig. 18 and 19, fig. 19 is a top view of fig. 18, fig. 18 is a schematic diagram of a cross-sectional structure of fig. 19 along a section line CC', the initial sacrificial layer 302 and the first modified sacrificial layer 306 are etched by using the third mask structure as a mask until the surface of the transition layer 301 is exposed, and a first groove 310 is formed in the first modified sacrificial layer 306 and in the initial sacrificial layer 302, wherein the first groove 310 exposes a portion of the sidewall surface of the initial sacrificial layer 302 and a portion of the sidewall surface of the first modified sacrificial layer 306.
The process of etching the initial sacrificial layer 302 and the first modified sacrificial layer 306 includes a combination of one or more of a dry etching process and a wet etching process.
In this embodiment, the process of etching the initial sacrificial layer 302 and the first modified sacrificial layer 306 includes a dry etching process, and the dry etching process can form the first groove 310 with good sidewall morphology and high dimensional accuracy.
After the first recess 310 is formed, the third mask structure is removed.
The process of removing the third mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the third mask structure includes a dry etching process.
With continued reference to fig. 18 and 19, a sidewall 311 is formed on the sidewall of the first recess 310.
The method for forming the side wall 311 includes: forming a side wall material layer (not shown) on the inner wall of the first groove 310, the surface of the initial sacrificial layer 302 and the surface of the first modified sacrificial layer 306; and etching the side wall material layer until the surface of the transition layer 301 is exposed, and forming a side wall 311 on the side wall of the first groove 310.
The material of the side wall 311 is different from the material of the first modified sacrificial layer 306, and the material of the side wall 311 is different from the material of the initial sacrificial layer 302.
The material of the side wall 311 is different from the material of the first modified sacrificial layer 306, and the material of the side wall 311 is different from the material of the initial sacrificial layer 302, so that when the side wall material layer is etched back to form the side wall 311, the damage to the surface of the initial sacrificial layer 302 and the first modified sacrificial layer 306 is smaller, and the situation that the pattern morphology formed by the side wall 311 and the first modified sacrificial layer 306 is changed when the to-be-etched layer is etched by taking the side wall 311 and the first modified sacrificial layer 306 as masks is avoided.
The material of the side wall 311 includes one or more of titanium oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride and silicon oxycarbonitride. In this embodiment, the material of the sidewall 311 includes titanium oxide.
Referring to fig. 20 and 21, fig. 21 is a top view of fig. 20, fig. 20 is a schematic cross-sectional structure of fig. 21 along a cross-sectional line DD', after forming the sidewall 311, the initial sacrificial layer 302 is removed, and a second recess 312 is formed in the first modified sacrificial layer 306.
The process of removing the initial sacrificial layer 302 includes a combination of one or more of a wet etching process and a dry etching process.
In this embodiment, the process of removing the initial sacrificial layer 302 includes a wet etching process, and the etching solution of the wet etching process includes a mixed solution of sulfuric acid and hydrogen peroxide.
The etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide, the crosslinkable polysiloxane can be dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, and the crosslinked polysiloxane is not dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, so that the wet etching process can be used for removing the initial sacrificial layer 302, the damage to the first modified sacrificial layer 306 is smaller, the first modified sacrificial layer 306 with higher dimensional accuracy and better morphology can be formed on the surface of the layer to be etched, and a semiconductor structure with better dimensional uniformity is formed when the pattern is transferred to the layer to be etched.
The first modified sacrificial layer 306 is obtained after modifying a portion of the initial sacrificial layer 302, and the material of the first modified sacrificial layer 306 is different from the material of the initial sacrificial layer 302, so that the first modified sacrificial layer 306 and the initial sacrificial layer 302 have a larger etching selection ratio, and the damage of the process for removing the initial sacrificial layer 302 to the first modified sacrificial layer 306 is smaller, so that the first modified sacrificial layer 306 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and a semiconductor structure with better dimensional uniformity can be formed when the side wall 311 and the first modified sacrificial layer 306 are used as masks for etching the layer to be etched later.
The material of the side wall 311 is different from the material of the initial sacrificial layer 302, so that the damage of the process of removing the initial sacrificial layer 302 to the side wall 311 is small, the side wall 311 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and a semiconductor structure with good dimensional uniformity can be formed when the side wall 311 and the first modified sacrificial layer 306 are used as masks for etching the layer to be etched subsequently.
Referring to fig. 22, fig. 22 is a schematic diagram of fig. 21, in which the transition layer 301 is etched using the sidewall 311 and the first modified sacrificial layer 306 as masks, and a pattern is formed on the substrate 300.
The process of etching the transition layer 301 using the sidewall 311 and the first modified sacrificial layer 306 as masks includes one or more combinations of a dry etching process and a wet etching process.
In this embodiment, the process of etching the transition layer 301 includes a dry etching process, and the dry etching process can form a pattern with good sidewall morphology and accurate dimension, so that the dimension precision of the subsequently formed semiconductor structure is better.
After etching the transition layer 301, the first modified sacrificial layer 306 is removed.
In this embodiment, the process of removing the first modified sacrificial layer 306 includes a dry etching process.
Correspondingly, an embodiment of the present invention further provides a semiconductor structure, referring to fig. 15, including: a layer to be etched; an initial sacrificial layer 302 and a first modified sacrificial layer 306 are located on the surface of the layer to be etched, the first modified sacrificial layer 306 is located in the initial sacrificial layer 302, and materials of the initial sacrificial layer 302 and the first modified sacrificial layer 306 are different.
In this embodiment, the material of the initial sacrificial layer 302 comprises a photosensitive material comprising a crosslinkable organic material.
In this embodiment, the organic material comprises a crosslinkable polysiloxane; the crosslinkable polysiloxane is a polymer of a first monomer and a second monomer.
In this embodiment, the molecular formula of the first monomer includes C 7H10O2.
In this embodiment, the molecular formula of the second monomer includes C 4H8O2.
In this embodiment, the material of the first modified sacrificial layer 306 includes a cross-linked polysiloxane.
In this embodiment, the thickness of the initial sacrificial layer 302 ranges from 30 nm to 80 nm.
In this embodiment, the layer to be etched includes a substrate 300 and a transition layer 301 on the substrate 300.
The substrate 300 includes a base (not shown) and a device layer (not shown) on the base, the device layer including an isolation structure and a device structure within the isolation structure, the device structure including a transistor, a resistor, an inductor, a capacitor, or a conductive structure. The device structure is not limited in this embodiment.
In this embodiment, the material of the transition layer 301 includes silicon nitride.
In the semiconductor structure, the material of the initial sacrificial layer 302 includes a photosensitive material, the first modified sacrificial layer 206 is obtained after modifying a portion of the initial sacrificial layer 302, and the materials of the initial sacrificial layer 302 and the first modified sacrificial layer 306 are different, so that the initial sacrificial layer 302 and the first modified sacrificial layer 306 have a larger etching selection ratio, and therefore, the damage to the first modified sacrificial layer 306 caused by the subsequent process of removing the initial sacrificial layer 302 is smaller, and therefore, the first modified sacrificial layer 306 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and then the pattern is transferred to the layer to be etched, so that a semiconductor structure with better dimensional uniformity is formed.
Fig. 23 to 29 are schematic cross-sectional views illustrating a semiconductor structure forming process according to another embodiment of the present invention.
Referring to fig. 23, a layer to be etched is provided.
The layer to be etched includes a substrate 400; a device layer on the substrate 400, the device layer comprising an isolation structure 401 and a device structure within the isolation structure 401, the device structure comprising a bottom electrode layer 402; a layer 403 of magnetic tunnel structure material located on the device layer.
The material of the substrate 400 includes semiconductor materials such as single crystal silicon, polycrystalline silicon, germanium, silicon germanium, gallium arsenide, or silicon-on-insulator. The material of the isolation structure 401 includes a dielectric material including one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride.
In this embodiment, the material of the substrate 400 includes monocrystalline silicon; the material of the isolation structure 401 comprises silicon oxide.
The magnetic tunnel structure material layer 403 provides a material layer for a subsequently formed magnetic tunnel structure.
The magnetic tunnel structure material layer 403 includes: a layer of fixing material (not shown); an insulating material layer (not shown) on the fixing material layer; a free material layer (not shown) over the insulating material layer.
The material of the fixing material layer comprises a ferromagnetic material, wherein the ferromagnetic material comprises cobalt-iron-boron, cobalt-iron, nickel-iron or cobalt-iron-nickel; the material of the insulating material layer comprises magnesium oxide or aluminum oxide; the material of the free material layer comprises a ferromagnetic material, wherein the ferromagnetic material comprises cobalt-iron-boron, cobalt-iron, nickel-iron or cobalt-iron-nickel.
In this embodiment, the material of the fixing material layer includes cobalt-iron-boron; the material of the insulating material layer comprises magnesium oxide; the material of the free material layer comprises cobalt-iron-boron.
The material of the bottom electrode layer 402 comprises a metal comprising one or more combinations of tantalum nitride, titanium nitride, tantalum, and titanium. In this embodiment, the material of the bottom electrode layer 402 comprises tantalum nitride.
Referring to fig. 24, an initial sacrificial layer 404 is formed on the layer to be etched; a first mask structure is formed over initial sacrificial layer 404, the first mask structure exposing a portion of the surface of initial sacrificial layer 404.
The material of the initial sacrificial layer 404 includes a photosensitive material including a crosslinkable organic material.
In this embodiment, the organic material comprises a crosslinkable polysiloxane, which is a polymer of a first monomer and a second monomer.
The preparation method of the crosslinkable polysiloxane is shown in fig. 6, and will not be described herein.
The epoxy group of the crosslinkable polysiloxane can undergo a crosslinking reaction under the treatment of ultraviolet rays to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a large etching selection ratio, and a first modified sacrificial layer with high dimensional accuracy can be formed on the surface of the layer to be etched by the crosslinked polysiloxane.
The thickness of the initial sacrificial layer 404 ranges from 30 nm to 80 nm.
If the thickness of the initial sacrificial layer 404 is too thin, the thickness of the first modified sacrificial layer formed by the subsequent modification treatment is too thin, and when the first modified sacrificial layer is used for pattern transmission, if the first modified sacrificial layer is damaged, the appearance of the pattern is also easy to change, which is not beneficial to the transmission of the pattern; if the thickness of the initial sacrificial layer 404 is too thick, larger process conditions are required when the initial sacrificial layer 404 is subjected to the modification treatment and when the formed first modified sacrificial layer is removed, thereby resulting in waste of the process.
The initial sacrificial layer 404 is formed by a spray coating process or a spin coating process. In this embodiment, the forming process of the initial sacrificial layer 404 includes a spin-coating process, which can rapidly form the initial sacrificial layer 404 with a relatively thick and uniform thickness.
The first mask structure includes: a liner layer 405; an anti-reflection layer 406 on the liner layer 405; a photoresist layer 407 on the anti-reflection layer 406.
The method for forming the first mask structure comprises the following steps: forming a liner material layer (not shown) on the initial sacrificial layer 404; forming an anti-reflection material layer (not shown) on the spacer material layer; forming a patterned photoresist layer 407 over the anti-reflective material layer; and etching the anti-reflection material layer and the lining material layer by taking the patterned photoresist layer 407 as a mask until the surface of the initial sacrificial layer 404 is exposed, so as to form the first mask structure.
The material of the pad layer 405 includes an organic material or an inorganic material; the organic material comprises a carbon-containing organic matter or a silicon-containing organic matter; the inorganic material includes one or more combinations of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, and silicon carbide nitride. The material of the anti-reflection layer 406 includes an organic material including a silicon-containing organic material or an inorganic material including silicon nitride, silicon carbide nitride, or titanium nitride. The process of etching the anti-reflective material layer and the liner material layer includes one or a combination of a dry etching process and a wet etching process.
In this embodiment, the material of the liner layer 405 includes a carbon-containing organic material; the material of the anti-reflection layer 406 includes silicon nitride. The process of etching the anti-reflection material layer and the liner material layer comprises a dry etching process, and the dry etching process can form a first mask structure with good side wall morphology, so that the size of the initial sacrificial layer 404 exposed by the first mask structure can be accurately controlled, and the size accuracy of a pattern formed subsequently is good.
With continued reference to fig. 24, the exposed initial sacrificial layer 404 is modified by using the first mask structure as a mask, so as to form a first modified sacrificial layer 408, where a material of the first modified sacrificial layer 408 is different from a material of the initial sacrificial layer 404.
In this embodiment, the modification treatment process includes an ultraviolet treatment process. The ultraviolet treatment process can enable epoxy groups of the crosslinkable polysiloxane to undergo a crosslinking reaction to form crosslinked polysiloxane, so that the crosslinked polysiloxane and the crosslinkable polysiloxane have a larger etching selection ratio, and the crosslinked polysiloxane can form a first modified sacrificial layer 408 with higher dimensional accuracy on the surface of the layer to be etched.
In this embodiment, the material of the first modified sacrificial layer 408 comprises a cross-linked polysiloxane.
The first modified sacrificial layer 408 is obtained after modifying a portion of the initial sacrificial layer 404, and the material of the first modified sacrificial layer 408 is different from the material of the initial sacrificial layer 404, so that the first modified sacrificial layer 408 and the initial sacrificial layer 404 have a larger etching selection ratio, and the damage of the process for removing the initial sacrificial layer 404 to the first modified sacrificial layer 408 is smaller, so that the first modified sacrificial layer 408 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and the pattern is transferred to the layer to be etched, thereby forming a semiconductor structure with better dimensional uniformity.
In this embodiment, the parameters of the ultraviolet treatment process are as follows: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
The ultraviolet treatment process under the process parameter conditions can enable the initial sacrificial layer 404 with the thickness ranging from 30 nanometers to 80 nanometers to fully react to form the first modified sacrificial layer 408, so that in the subsequent process of removing the initial sacrificial layer, the pattern formed by the first modified sacrificial layer 408 is good in appearance, the situation that the first modified sacrificial layer 408 formed by insufficient reaction of the initial sacrificial layer is damaged by the removing process is avoided, and the dimensional accuracy of the pattern formed by the first modified sacrificial layer 408 is improved.
Referring to fig. 25, after the first modified sacrificial layer 408 is formed, the first mask structure is removed.
The process of removing the first mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the first mask structure includes a dry etching process.
Referring to fig. 26, after removing the first mask structure, the initial sacrificial layer 404 is removed.
The process of removing the initial sacrificial layer 404 includes a combination of one or more of a wet etching process and a dry etching process.
In this embodiment, the process of removing the initial sacrificial layer 404 includes a wet etching process, and an etching solution of the wet etching process includes a mixed solution of sulfuric acid and hydrogen peroxide.
The etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide, the crosslinkable polysiloxane can be dissolved in the mixed solution of sulfuric acid and hydrogen peroxide, and the crosslinked polysiloxane is insoluble in the mixed solution of sulfuric acid and hydrogen peroxide, so that the wet etching process can be used for removing the initial sacrificial layer 404, the damage to the first modified sacrificial layer 408 is smaller, the first modified sacrificial layer 408 with higher dimensional accuracy and better morphology can be formed on the surface of the layer to be etched, and a semiconductor structure with better dimensional uniformity can be formed when the layer to be etched is etched by the pattern of the first modified sacrificial layer 408.
The first modified sacrificial layer 408 is obtained after modifying a portion of the initial sacrificial layer 404, and the material of the first modified sacrificial layer 408 is different from the material of the initial sacrificial layer 404, so that the first modified sacrificial layer 408 and the initial sacrificial layer 404 have a larger etching selection ratio, and the damage of the process for removing the initial sacrificial layer 404 to the first modified sacrificial layer 408 is smaller, so that the first modified sacrificial layer 408 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and a semiconductor structure with better dimensional uniformity can be formed when the first modified sacrificial layer 408 is used as a mask for etching the layer to be etched later.
Referring to fig. 27, after the initial sacrificial layer 404 is removed, the layer to be etched is etched using the first modified sacrificial layer 408 as a mask.
The method for etching the layer to be etched comprises the following steps: and etching the magnetic tunnel structure material layer 403 by using the first modified sacrificial layer 408 as a mask until the top surface of the bottom electrode layer 402 is exposed, and forming a magnetic tunnel structure 409 on the surface of the bottom electrode 402.
The magnetic tunnel structure 409 includes: a fixed layer (not shown); an insulating layer (not shown) on the fixing layer; a free layer (not shown) located on the insulating layer.
The process of etching the magnetic tunnel structure material layer 403 using the first modified sacrificial layer 408 as a mask includes one or more combinations of a dry etching process and a wet etching process.
In this embodiment, the process of etching the magnetic tunnel structure material layer 403 includes a dry etching process, and the dry etching process can form the magnetic tunnel structure 409 with good sidewall morphology and high dimensional accuracy.
Referring to fig. 28, after forming the magnetic tunnel structure 409, a dielectric layer 410 is formed on the substrate, where the magnetic tunnel structure 409 is located in the dielectric layer 410; a fourth mask structure is formed on dielectric layer 410, which exposes a portion of the surface of dielectric layer 410 on magnetic tunnel structure 409.
The method for forming the dielectric layer 410 includes: forming a dielectric material layer (not shown) on a substrate; the dielectric material layer is planarized to form the dielectric layer 410.
The material of the dielectric layer 410 includes a dielectric material including one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride; the process for forming the dielectric material layer comprises a chemical vapor deposition process or an atomic layer deposition process; the process of planarizing the dielectric material layer includes a chemical mechanical polishing process or an etch back process.
In this embodiment, the material of the dielectric layer 410 includes silicon oxide; the process for forming the dielectric material layer comprises a chemical vapor deposition process; the process of planarizing the dielectric material layer includes a chemical mechanical polishing process.
The fourth mask structure includes: a liner layer 411; an anti-reflection layer 412 on the liner layer 411; a photoresist layer 413 over the anti-reflective layer 412. The specific description of the method, process and material for forming the fourth mask structure refers to the first mask structure shown in fig. 24, and will not be repeated here.
Referring to fig. 29, the dielectric layer 410 is etched using the fourth mask structure as a mask until the top surface of the magnetic tunnel structure 409 is exposed, and a third recess (not shown) is formed in the dielectric layer 410.
The process of etching the dielectric layer 410 using the fourth mask structure as a mask includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of etching the dielectric layer 410 includes a dry etching process, which can form a third groove with good sidewall morphology and higher dimensional accuracy, so that a top electrode formed in the third groove can be accurately located at the top of the magnetic tunnel structure 409.
With continued reference to fig. 29, after forming the third recess, the fourth mask structure is removed; after removing the fourth mask structure, a top electrode 414 is formed in the third recess, the top electrode 414 being electrically connected to the magnetic tunnel structure 409.
The process of removing the fourth mask structure includes one or more of a combination of a dry etching process and a wet etching process.
In this embodiment, the process of removing the fourth mask structure includes a dry etching process.
The method for forming the top electrode 414 includes: forming an electrode material layer (not shown) in the third recess and on the dielectric layer 410; the electrode material layer is planarized until the surface of the dielectric layer 410 is exposed, forming the top electrode 414 within the dielectric layer 410.
The material of the top electrode 414 comprises a metal comprising one or more of tantalum nitride, titanium nitride, tantalum, and titanium in combination; the process of forming the electrode material layer comprises a physical vapor deposition process or an electroplating process; the process of planarizing the electrode material layer includes a chemical mechanical polishing process.
In this embodiment, the material of the top electrode 414 comprises tantalum nitride; the process of forming the electrode material layer includes a physical vapor deposition process; the process of planarizing the electrode material layer includes a chemical mechanical polishing process.
Correspondingly, an embodiment of the present invention further provides a semiconductor structure, referring to fig. 25, including: a layer to be etched; an initial sacrificial layer 404 and a first modified sacrificial layer 408 are located on the surface of the layer to be etched, the first modified sacrificial layer 408 is located in the initial sacrificial layer 404, and the material of the initial sacrificial layer 404 is different from the material of the first modified sacrificial layer 408.
In this embodiment, the material of the initial sacrificial layer comprises a photosensitive material comprising a cross-linkable organic material.
In this embodiment, the organic material comprises a polysiloxane the crosslinkable polysiloxane is a polymer of a first monomer and a second monomer.
In this embodiment, the molecular formula of the first monomer includes C 7H10O2.
In this embodiment, the molecular formula of the second monomer includes C 4H8O2.
In this embodiment, the material of the first modified sacrificial layer comprises a cross-linked polysiloxane.
The thickness of the initial sacrificial layer ranges from 30 nanometers to 80 nanometers.
In this embodiment, the layer to be etched includes a substrate, where the substrate includes a base 400 and a device layer located on the base 400, the device layer includes an isolation structure 401 and a device structure located in the isolation structure 401, and the device structure includes a bottom electrode layer 402; a layer 403 of magnetic tunnel structure material is located on the substrate.
In the semiconductor structure, the material of the initial sacrificial layer 404 includes a photosensitive material, the first modified sacrificial layer 408 is obtained after modifying a part of the initial sacrificial layer 404, and the materials of the initial sacrificial layer 404 and the first modified sacrificial layer 408 are different, so that the initial sacrificial layer 404 and the first modified sacrificial layer 408 have a larger etching selection ratio, and the damage to the first modified sacrificial layer 408 caused by the subsequent process of removing the initial sacrificial layer 404 is smaller, so that the first modified sacrificial layer 408 can form a pattern with high dimensional accuracy on the surface of the layer to be etched, and then the pattern is transferred to the layer to be etched, thereby forming a semiconductor structure with better dimensional uniformity.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.
Claims (36)
1. A semiconductor structure, comprising:
a layer to be etched;
The device comprises an initial sacrificial layer and a first modified sacrificial layer, wherein the initial sacrificial layer and the first modified sacrificial layer are positioned on the surface of a layer to be etched, the first modified sacrificial layer is positioned in the initial sacrificial layer, the material of the initial sacrificial layer comprises a photosensitive material, the first modified sacrificial layer is obtained by modifying part of the initial sacrificial layer, the photosensitive material comprises a crosslinkable organic material, and the photosensitive material comprises crosslinkable polysiloxane.
2. The semiconductor structure of claim 1, wherein the crosslinkable polysiloxane is a polymer of a first monomer and a second monomer.
3. The semiconductor structure of claim 2, wherein the molecular formula of the first monomer comprises C 7H10O2.
4. The semiconductor structure of claim 2, wherein the molecular formula of the second monomer comprises C 4H8O2.
5. The semiconductor structure of claim 1, wherein the material of the first modified sacrificial layer comprises a cross-linked polysiloxane.
6. The semiconductor structure of claim 1, wherein the initial sacrificial layer has a thickness in the range of 30 nm to 80 nm.
7. The semiconductor structure of claim 1, wherein the layer to be etched comprises a substrate and a transition layer on the substrate.
8. The semiconductor structure of claim 7, wherein the material of the transition layer comprises one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride.
9. The semiconductor structure of claim 1, wherein the layer to be etched comprises a substrate and a conductive layer on the substrate.
10. The semiconductor structure of claim 1, wherein the layer to be etched comprises a substrate comprising a base and a device layer on the base, the device layer comprising an isolation structure and a device structure within the isolation structure, the device structure comprising a bottom electrode layer; a layer of magnetic tunnel structure material on the substrate.
11. A method of forming a semiconductor structure, comprising:
providing a layer to be etched;
forming an initial sacrificial layer on the layer to be etched, wherein the material of the initial sacrificial layer comprises a photosensitive material;
forming a first mask structure on the initial sacrificial layer, wherein part of the surface of the initial sacrificial layer is exposed by the first mask structure;
Modifying the exposed initial sacrificial layer by taking the first mask structure as a mask to form a first modified sacrificial layer;
Removing the initial sacrificial layer after forming the first modified sacrificial layer;
and etching the layer to be etched by taking the first modified sacrificial layer as a mask.
12. The method of forming a semiconductor structure of claim 11, wherein the photosensitive material comprises a crosslinkable organic material.
13. The method of forming a semiconductor structure of claim 12, wherein the organic material comprises a crosslinkable polysiloxane.
14. The method of forming a semiconductor structure of claim 13, wherein the method of preparing the crosslinkable polysiloxane comprises: mixing a first monomer and a second monomer in a ratio of 1:1, and adding a small amount of ammonia water as a catalyst to enable the first monomer and the second monomer to undergo polycondensation reaction to synthesize crosslinkable polysiloxane; the molecular formula of the first monomer comprises C 7H10O2; the molecular formula of the second monomer includes C 4H8O2.
15. The method of forming a semiconductor structure of claim 14, wherein the method of preparing the first monomer comprises: taking trichloromethylsilane and phenol as initial raw materials and chloroform as a solvent, and carrying out substitution reaction under the heating condition to generate a first monomer intermediate; and filtering and purifying the first monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate the first monomer.
16. The method of forming a semiconductor structure of claim 14, wherein the method of preparing the second monomer comprises: taking trichloromethylsilane and 2-hydroxy ethylene oxide as initial raw materials, and chloroform as solvent, and carrying out substitution reaction under heating condition to generate a second monomer intermediate; and filtering and purifying the second monomer intermediate, and performing alcoholysis reaction in a hot ethanol solution to generate a second monomer.
17. The method of forming a semiconductor structure of claim 11, wherein the material of the first modified sacrificial layer comprises a cross-linked polysiloxane.
18. The method of forming a semiconductor structure of claim 11, wherein the process of modifying comprises an ultraviolet treatment process.
19. The method of claim 18, wherein the parameters of the uv treatment process are: the power range is 10 milliwatts per square centimeter to 50 milliwatts per square centimeter; the time is 30 seconds to 120 seconds.
20. The method of forming a semiconductor structure of claim 11, wherein the process of removing the initial sacrificial layer comprises a wet etching process.
21. The method of claim 20, wherein the etching solution of the wet etching process comprises a mixed solution of sulfuric acid and hydrogen peroxide.
22. The method of claim 11, wherein the initial sacrificial layer has a thickness in the range of 30 nm to 80 nm.
23. The method of claim 11, wherein the initial sacrificial layer forming process comprises a spray coating process or a spin coating process.
24. The method of claim 11, wherein the layer to be etched comprises a substrate and a conductive layer on the substrate.
25. The method of forming a semiconductor structure of claim 24, wherein after forming the first modified sacrificial layer, before removing the initial sacrificial layer, further comprising: forming a second mask structure on the initial sacrificial layer and the modified sacrificial layer, wherein the second mask structure exposes part of the surface of the initial sacrificial layer; and modifying the exposed initial sacrificial layer by taking the second mask structure as a mask to form a second modified sacrificial layer, wherein the material of the second modified sacrificial layer is different from that of the initial sacrificial layer.
26. The method of claim 25, wherein after removing the initial sacrificial layer, etching the conductive layer using the first modified sacrificial layer and the second modified sacrificial layer as masks.
27. The method of forming a semiconductor structure of claim 11, wherein the layer to be etched comprises a substrate and a transition layer on the substrate.
28. The method of forming a semiconductor structure of claim 27, wherein the material of the transition layer comprises one or more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbide.
29. The method of forming a semiconductor structure of claim 27, wherein after forming the first modified sacrificial layer, before removing the initial sacrificial layer, further comprising: forming a third mask structure on the initial sacrificial layer and the first modified sacrificial layer, wherein a part of the surface of the initial sacrificial layer and the surface of the first modified sacrificial layer are exposed by the third mask structure; etching the initial sacrificial layer and the first modified sacrificial layer by taking the third mask structure as a mask until the surface of the transition layer is exposed, forming first grooves in the first modified sacrificial layer and the initial sacrificial layer, and exposing part of the side wall surfaces of the initial sacrificial layer and the side wall surfaces of the first modified sacrificial layer by the first grooves; and forming a side wall on the side wall of the first groove.
30. The method of claim 29, wherein after forming the sidewall, removing the initial sacrificial layer to form a second recess in the first modified sacrificial layer; and after the initial sacrificial layer is removed, the side wall and the first modified sacrificial layer are used as masks to etch the layer to be etched.
31. The method of forming a semiconductor structure of claim 29, wherein the method of forming a sidewall comprises: forming a side wall material layer on the inner wall of the first groove, the surface of the initial sacrificial layer and the surface of the first modified sacrificial layer; and etching the side wall material layer until the surface of the transition layer is exposed, and forming a side wall on the side wall of the first groove.
32. The method of claim 29, wherein the sidewall is of a different material than the first modified sacrificial layer and the sidewall is of a different material than the initial sacrificial layer.
33. The method of forming a semiconductor structure of claim 32, wherein a material of said sidewall comprises one or more of titanium oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, and silicon oxycarbonitride.
34. The method of forming a semiconductor structure of claim 11, wherein the layer to be etched comprises a substrate comprising a base and a device layer on the base, the device layer comprising an isolation structure and a device structure within the isolation structure, the device structure comprising a bottom electrode layer; a layer of magnetic tunnel structure material over the device layer.
35. The method of forming a semiconductor structure of claim 34, wherein the method of etching the layer to be etched comprises: and etching the magnetic tunnel structure material layer by taking the first modified sacrificial layer as a mask until the top surface of the bottom electrode layer is exposed, and forming a magnetic tunnel structure on the surface of the bottom electrode.
36. The method of forming a semiconductor structure of claim 35, wherein after forming a magnetic tunnel structure, forming a dielectric layer on a substrate, the magnetic tunnel structure being located within the dielectric layer; forming a fourth mask structure on the dielectric layer, wherein the fourth mask structure exposes part of the surface of the dielectric layer on the magnetic tunnel structure; etching the dielectric layer by taking the fourth mask structure as a mask until the top surface of the magnetic tunnel structure is exposed, and forming a third groove in the dielectric layer; a top electrode is formed within the third recess.
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CN102122113A (en) * | 2010-01-08 | 2011-07-13 | 中芯国际集成电路制造(上海)有限公司 | Photoetching method |
CN104701145A (en) * | 2013-12-10 | 2015-06-10 | 中芯国际集成电路制造(上海)有限公司 | Forming method of semiconductor structure |
CN104900495A (en) * | 2014-03-04 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Self-aligned double patterning method and fin field effect transistor manufacturing method |
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CN102122113A (en) * | 2010-01-08 | 2011-07-13 | 中芯国际集成电路制造(上海)有限公司 | Photoetching method |
CN104701145A (en) * | 2013-12-10 | 2015-06-10 | 中芯国际集成电路制造(上海)有限公司 | Forming method of semiconductor structure |
CN104900495A (en) * | 2014-03-04 | 2015-09-09 | 中芯国际集成电路制造(上海)有限公司 | Self-aligned double patterning method and fin field effect transistor manufacturing method |
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