CN113035895A - Method for manufacturing image sensor - Google Patents
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
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Abstract
The invention provides a manufacturing method of an image sensor, which comprises the steps of providing a semiconductor substrate, wherein a first dielectric layer and a first mask layer are formed on the semiconductor substrate, shallow trench isolation structures are formed in the first dielectric layer and the first mask layer, and the shallow trench isolation structures penetrate through the first dielectric layer and the first mask layer and extend into the semiconductor substrate; performing a first etching process to remove the first mask layer and remove a part of the first dielectric layer; performing a second etching process, and continuously removing part of the first dielectric layer to reach the preset thickness of the first dielectric layer; performing an ion implantation process, and fully implanting fluorine ions into the semiconductor substrate and the shallow trench isolation structure to increase the radiation resistance of the image sensor; white pixels and dark current of a pixel area of the image sensor can also be reduced; the isolation effect of the shallow trench isolation structure is enhanced.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of an image sensor.
Background
The earth space contains charged particles, which is one of the environments that satellites are subjected to in orbit. The charged particles can damage the satellite and electronic equipment on the satellite and functional materials of electronic components, cause common performance decline and influence the completion of satellite tasks, which is proved by the abnormity and the fault of a plurality of satellites working in orbit. With the development of satellite technology, the performance of the satellite is continuously improved, the service life of the satellite is prolonged to months and years, medium and small-scale integrated circuits are used for satellite-borne electronic equipment, the radiation effect shows that the damage to the satellite is increased, and the attention on the radiation-resistant reinforcement work of the satellite is attracted.
Today, satellites are commercialized, and an industry is formed in the world, and international competition is very strong. From the needs of adapting to national defense construction, national economy and social development of China, users have higher and higher requirements on satellite performance, namely, the requirement that the satellite provides a high effective load ratio, namely the ratio of the weight of the effective load of the satellite to the total weight of the satellite, and the requirement that the satellite has strong in-orbit autonomous capability, high precision and good dynamic performance. In satellite design, large-scale integrated circuits and on-board computers are required to meet the design requirements of long service life, high reliability and high performance. But one of the defects of the single-particle-locked single-particle detector is sensitive to radiation and poor in radiation resistance, and the single-particle effect such as single-particle upset and single-particle locking has a larger influence on the single-particle-locked single-. The ionizing radiation can increase the density of MOS device interface traps and the doping concentration of a semiconductor substrate, and reduce the mobility of channel carriers, thereby causing the threshold voltage drift, transconductance degradation and drain current reduction.
At present, the radiation-resistant reinforcement technology is mainly embodied at a customer design end and mainly has the following aspects: charge replenishment techniques, temporal filtering techniques, spatial redundancy techniques (multiple combinational circuits work in parallel, where one circuit fails and the rest can work properly), coding techniques, and ring gate/H-gate designs. The NMOS transistor of the normal grid electrode can generate edge leakage current and field oxide leakage current. By layout, the ring-shaped gate/H-shaped gate enables no parasitic field transistor to be arranged around the transistor, so that the transistor can not generate field oxygen leakage current during radiation. However, no anti-radiation reinforcement technology exists in the semiconductor manufacturing process, so that the improvement of the interface state of the MOS device and the improvement of the anti-radiation capability of the MOS device become an important part in the semiconductor manufacturing process.
Disclosure of Invention
The invention aims to provide a manufacturing method of an image sensor, which is used for effectively reinforcing the radiation resistance of the image sensor.
To solve the above technical problem, the present invention provides a method for manufacturing an image sensor, comprising
Providing a semiconductor substrate, wherein a first dielectric layer and a first mask layer are formed on the semiconductor substrate, shallow trench isolation structures are formed in the first dielectric layer and the first mask layer, and the shallow trench isolation structures penetrate through the first dielectric layer and the first mask layer and extend into the semiconductor substrate;
performing a first etching process to remove the first mask layer and remove a part of the first dielectric layer;
performing a second etching process, and continuously removing part of the first dielectric layer to reach the preset thickness of the first dielectric layer;
and performing an ion implantation process, and fully implanting fluorine ions into the semiconductor substrate and the shallow trench isolation structure to increase the radiation resistance of the image sensor.
Optionally, the second etching process is a wet etching process controlled by an advanced process.
Optionally, the etching solution of the second etching process is a solution containing hydrofluoric acid.
Optionally, the preset thickness of the first dielectric layer is 70 angstroms to 73 angstroms.
Optionally, in the ion implantation process, the implantation energy is 175keV to 185 keV.
Optionally, after the ion implantation process, the concentration of fluorine ions in the semiconductor substrate is 1.2E15cm-2-1.4E15 cm-2。
Optionally, the first etching process is a wet etching process.
Optionally, after the first etching process step is performed, a cleaning process is performed on the semiconductor substrate.
Optionally, the shallow trench isolation structure process includes:
forming a patterned second mask layer on the first dielectric layer and the first mask layer, and etching to form a shallow trench by taking the patterned second mask layer as a mask, wherein the shallow trench penetrates through the first dielectric layer and the first mask layer and extends into the semiconductor substrate;
depositing a second medium in the shallow trench, wherein the second medium is filled in the shallow trench and extends to the first mask layer of the semiconductor substrate; and the number of the first and second groups,
and carrying out chemical mechanical polishing to obtain the shallow trench isolation structure.
Optionally, a device structure and a peripheral circuit of a pixel region are formed on the semiconductor substrate on both sides of the shallow trench isolation structure to form an image sensor.
In the manufacturing method of the image sensor, the first mask layer is removed through a first etching process, and part of the first dielectric layer is removed; performing a second etching process, and continuously removing part of the first dielectric layer to reach the preset thickness of the first dielectric layer; performing an ion implantation process, fully implanting fluorine ions into the semiconductor substrate and the shallow trench isolation structure to increase the radiation resistance of the image sensor, and implanting fluorine ions into the semiconductor substrate to reduce the defects of the interface between a pixel region and a peripheral circuit region of the image sensor, thereby reducing irradiation induced trap charges, achieving the purpose of effectively inhibiting the drift of threshold voltage, and improving the radiation resistance of the image sensor; it is also possible to reduce white pixels and dark current of a pixel area of the image sensor. Fluorine ions are injected into the shallow trench isolation structure, and the fluorine ions can adsorb charged particles, so that the isolation effect of the shallow trench isolation structure can be enhanced; the preset thickness of the first dielectric layer is enabled through a second etching process, so that the injection concentration and the injection position of fluorine ions are more accurate; fluorine ion implantation is carried out on the first dielectric layer with the preset thickness, and the implantation is carried out through the first dielectric layer, so that the damage to the surface of the semiconductor substrate can be avoided.
Drawings
FIG. 1 is a flow chart of a method for manufacturing an image sensor according to an embodiment of the present invention;
fig. 2 to 10 are schematic structural diagrams corresponding to a manufacturing method of an image sensor according to an embodiment of the invention;
in the figure, the position of the upper end of the main shaft,
10-a semiconductor substrate; 11-a first dielectric layer; 12-a first mask layer; 13-a patterned second mask layer; 14-shallow trench; 15-a second dielectric layer; 16-shallow trench isolation structure.
Detailed Description
The following describes the method for manufacturing an image sensor according to the present invention in further detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The inventor researches and discovers that the influence of ionization effect on semiconductor materials and devices thereof is mainly reflected in introducing surface defects. Ionizing radiation produces at least 3 surface defects:
the oxide layer is positively charged. Ionizing radiation causes SiO in oxide layer on surface of device2The valence bond is broken, creating an electron-hole pair. Because electrons are in SiO2The mobility of the oxide layer is far larger than that of the hole, so that under the action of an electric field of the oxide layer, the electrons induced by radiation always do directional motion and are finally swept out of the oxide layer, and the reserved hole is swept out of the oxide layer by SiO2The positive hole trap in (1) is used for trapping to form positive space charge, so that the positive charge density of the oxide layer is increased.
②Si-SiO2An interface trap. Ionizing radiation to make Si-SiO2Saturated dangling bonds at the interface are broken, and a new interface energy level is introduced, so that the interface trap density is increased.
③ the surface of the oxide layer can move ions. Under ionizing radiation, the gas inside the device envelope is also ionized, causing the accumulation of mobile ions on the surface of the die.
In particular, ionizing radiation increases the device interface trap density and the semiconductor substrate doping concentration of the image sensor, and decreases channel carrier mobility, thereby causing threshold voltage drift, transconductance degradation, and drain current degradation.
Therefore, it is an important part of the semiconductor manufacturing process to improve the device interface state of the image sensor and to improve the radiation resistance of the image sensor.
FIG. 1 is a flow chart of a method for manufacturing an image sensor according to an embodiment of the present invention; as shown in fig. 1, the present embodiment provides a method of manufacturing an image sensor, including:
step S10, providing a semiconductor substrate, where a first dielectric layer and a first mask layer are formed on the semiconductor substrate, and shallow trench isolation structures are formed in the first dielectric layer and the first mask layer, and penetrate through the first dielectric layer and the first mask layer and extend into the semiconductor substrate.
Step S20, a first etching process is performed to remove the first mask layer and to remove a portion of the first dielectric layer.
Step S30, performing a second etching process to continuously remove a portion of the first dielectric layer to achieve a predetermined thickness of the first dielectric layer.
Step S40, performing an ion implantation process to fully implant fluorine ions into the semiconductor substrate and the shallow trench isolation structure to increase radiation resistance of the image sensor.
Fig. 2 to 10 are schematic structural diagrams corresponding to a manufacturing method of an image sensor according to an embodiment of the invention; a method for manufacturing an image sensor according to an embodiment of the present invention is described in detail below with reference to fig. 2 to 10.
Referring to fig. 2 to 7, step S10 is executed to provide a semiconductor substrate 10, where a first dielectric layer 11 and a first mask layer 12 are formed on the semiconductor substrate 10, a shallow trench isolation structure 16 is formed in the first dielectric layer 11 and the first mask layer 12, and the shallow trench isolation structure 16 penetrates through the first dielectric layer 11 and the first mask layer 12 and extends into the semiconductor substrate 10.
The semiconductor substrate 10 may be monocrystalline silicon or polycrystalline silicon, or may be a semiconductor material such as silicon, germanium, silicon germanium, gallium arsenide, or may be a composite structure such as silicon-on-insulator. A person skilled in the art may select the type of the semiconductor substrate 10 according to the semiconductor devices formed on the semiconductor substrate 10, and therefore the type of the semiconductor substrate 10 should not limit the scope of the present invention.
In an embodiment, the shallow trench isolation structure 16 serves as an isolation structure to provide isolation for active regions on two sides of the shallow trench isolation structure 16, and a MOS transistor or a fin field effect transistor may be formed on the active regions on two sides of the shallow trench isolation structure 16.
In this embodiment, the first dielectric layer 11 is, for example, silicon oxide, and may be formed by a chemical vapor deposition process, and the thickness of the first dielectric layer 11 is, for example, 85 angstroms to 95 angstroms. The first mask layer 12 is, for example, silicon nitride, and may also be formed by a chemical vapor deposition process, where the thickness of the first mask layer 12 is, for example, 1000 angstroms to 1100 angstroms.
Referring to fig. 3 and 4, before forming the shallow trench isolation structure 16, a patterned second mask layer 13 is formed on the first dielectric layer 11 and the first mask layer 12, and a shallow trench 14 is formed by etching using the patterned second mask layer 13 as a mask, where the shallow trench 14 penetrates through the first dielectric layer 11 and the first mask layer 12 and extends into the semiconductor substrate 10.
The shallow trench 14 may be formed in the semiconductor substrate 10 using an etching process (dry etching or wet etching process).
In this embodiment, the patterned second mask layer 13 is, for example, a photoresist. A photoresist is coated on the first dielectric layer 11 and the first mask layer 12, and then a patterned second mask layer 13 is formed by exposure and development.
Referring to fig. 5, after the shallow trench 14 is formed, if the patterned second mask layer 13 is not completely consumed, a photoresist removing process is further performed, and an ashing process or a stripping process is usually used to remove the remaining patterned second mask layer 13.
Referring to fig. 6-7, a second dielectric 15 is deposited on the shallow trench 14, and the second dielectric 15 fills the shallow trench 14 and extends to the first mask layer 12 of the semiconductor substrate 10, and a chemical mechanical polishing process is performed to obtain a shallow trench isolation structure 16.
In this embodiment, after the shallow trench 14 is formed, a layer of silicon oxide (not shown in the figure) is deposited in the shallow trench 14, and the silicon oxide is formed by a tube oxidation process and used for repairing damage caused by a dry etching process during the formation of the shallow trench 14. The thickness of the silicon oxide layer is, for example, 55 angstroms to 65 angstroms.
With reference to fig. 6, the second dielectric 15 is, for example, silicon oxide, and the Process of depositing the second dielectric 15 is a High Aspect Ratio (HARP) Process or a High Density Plasma Chemical Vapor Deposition (HDPCVD) Process.
With reference to fig. 7, a Chemical Mechanical Polishing (CMP) process is performed to polish and remove the second dielectric 15 and a portion of the first mask layer 12 on the first mask layer 12 of the semiconductor substrate 10. The thickness of the first mask layer to be removed is, for example, 500 a to 550 a, and the thickness of the first mask layer 12 remaining on the first dielectric layer 11 is about 500 a to 550 a.
Referring to fig. 8, step S20 is executed to perform a first etching process to remove the first mask layer 12 and remove a portion of the first dielectric layer 11.
In this embodiment, the first etching process is a wet etching process. The etching liquid of the wet etching process is, for example, phosphoric acid. Phosphoric acid reacts primarily with silicon nitride and also reacts with a small amount of silicon oxide, thereby removing a portion of the first dielectric layer 11, the removed portion of the first dielectric layer 11 having a thickness of, for example, 10 angstroms to 15 angstroms. After the first etching process, the remaining thickness of the first dielectric layer 11 is, for example, 75 angstroms to 80 angstroms.
Before the first etching process is performed, a pre-cleaning process is further performed on the semiconductor substrate 10, and a cleaning solution of the pre-cleaning process is, for example, hydrofluoric acid, and is used to remove the oxide on the first mask layer 12.
After the first etching process step, a cleaning process is performed on the semiconductor substrate 10 to remove organic matters on the semiconductor substrate 10 and etching liquid remaining in the first etching process.
Referring to fig. 9, step S30 is executed to perform a second etching process to continuously remove a portion of the first dielectric layer 11 so as to reach a predetermined thickness of the first dielectric layer 11.
In this embodiment, the second etching process is an Advanced Process Control (APC) wet etching process. The wet etching process controlled by the advanced process can automatically compensate and etch the first dielectric layer to a preset thickness, wherein the preset thickness of the first dielectric layer is 70-73 angstroms, for example. The etching solution of the second etching process is a solution containing hydrofluoric acid.
Referring to fig. 10, step S40 is performed to perform an ion implantation process to fully implant F ions (Blanket F IMP) into the semiconductor substrate and the shallow trench isolation structure 16 to increase radiation resistance of the image sensor.
In the present embodiment, the implantation energy of the ion implantation is 175keV to 185keV F ions. After the ion implantation process, the implantation concentration of F ions of the semiconductor substrate and the shallow trench isolation structure 16 is 1.2E15cm-2-1.4E15 cm-2. Experiments show that the image sensor has the best radiation resistance by adopting the implantation concentration of the fluorine ions. Because the fluorine ions are relatively stable, the fluorine ions can be in contact with broken SiO in the oxide layer on the surface of the device2Valence bond and Si-SiO2The broken dangling bonds at the interface combine to form a stable structure, reducing the density of interface traps. F ions are injected into the semiconductor substrate, so that the defects of the interface between a pixel region and a peripheral circuit region of the image sensor can be reduced, irradiation induced trap charges are reduced, the purpose of effectively inhibiting threshold voltage drift is achieved, and the radiation resistance of the image sensor is improved; it is also possible to reduce white pixels and dark current of a pixel area of the image sensor. F ions are injected into the shallow trench isolation structure 16, and because the fluorine ions are relatively stable, the fluorine ions can adsorb charged particles, and the isolation effect of the shallow trench isolation structure 16 can be enhanced.
The first dielectric layer 11 with a preset thickness is obtained through an Advanced Process Control (APC) wet etching process, so that the implantation concentration and the implantation position of fluorine ions are more accurate; fluorine ion implantation is performed on the first dielectric layer 11 with a preset thickness, and ion implantation is performed through the first dielectric layer 11, so that the surface of the semiconductor substrate 10 is not damaged. And in the subsequent process, the damaged first dielectric layer 11 is removed in the subsequent process.
Forming a device structure of a pixel region and peripheral circuits are performed on the semiconductor substrate 10 implanted with F ions to form an image sensor. The image sensor implanted with F ions can also reduce white pixels and dark current in the pixel area of the image sensor.
In summary, in the manufacturing method of the image sensor provided in the embodiment of the present invention, the first mask layer is removed and a portion of the first dielectric layer is removed by a first etching process; performing a second etching process, and continuously removing part of the first dielectric layer to reach the preset thickness of the first dielectric layer; performing an ion implantation process, implanting F ions into the semiconductor substrate and the shallow trench isolation structure to increase the radiation resistance of the image sensor, and implanting F ions into the semiconductor substrate to reduce the device interface defects of a pixel region and a peripheral circuit region of the image sensor, thereby reducing irradiation induced trap charges, achieving the purpose of effectively inhibiting threshold voltage drift, and improving the radiation resistance of the image sensor; it is also possible to reduce white pixels and dark current of a pixel area of the image sensor. F ions are injected into the shallow trench isolation structure, and the fluorine ions can adsorb charged particles, so that the isolation effect of the shallow trench isolation structure can be enhanced; the preset thickness of the first dielectric layer is enabled through a second etching process, so that the injection concentration and the injection position of fluorine ions are more accurate; fluorine ion implantation is carried out on the first dielectric layer with the preset thickness, and the implantation is carried out through the first dielectric layer, so that the damage to the surface of the semiconductor substrate can be avoided.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A method for manufacturing an image sensor includes
Providing a semiconductor substrate, wherein a first dielectric layer and a first mask layer are formed on the semiconductor substrate, shallow trench isolation structures are formed in the first dielectric layer and the first mask layer, and the shallow trench isolation structures penetrate through the first dielectric layer and the first mask layer and extend into the semiconductor substrate;
performing a first etching process to remove the first mask layer and remove a part of the first dielectric layer;
performing a second etching process, and continuously removing part of the first dielectric layer to reach the preset thickness of the first dielectric layer;
and performing an ion implantation process, and fully implanting fluorine ions into the semiconductor substrate and the shallow trench isolation structure to increase the radiation resistance of the image sensor.
2. The method of claim 1, wherein the second etching process is an advanced process control wet etching process.
3. The method of manufacturing an image sensor according to claim 2, wherein the etching solution of the second etching process is a solution containing hydrofluoric acid.
4. The method of claim 1, wherein the predetermined thickness of the first dielectric layer is between 70 angstroms and 73 angstroms.
5. The method of claim 1, wherein the ion implantation process has an implantation energy of 175keV to 185 keV.
6. The image sensor of claim 1Wherein after the ion implantation process, the concentration of fluorine ions in the semiconductor substrate is 1.2E15cm-2-1.4E15cm-2。
7. The method of manufacturing an image sensor according to claim 1, wherein the first etching process is a wet etching process.
8. The method of manufacturing an image sensor according to claim 1, wherein a cleaning process is performed on the semiconductor substrate after the first etching process step is performed.
9. The method of manufacturing an image sensor of claim 1, wherein the shallow trench isolation structure process comprises:
forming a patterned second mask layer on the first dielectric layer and the first mask layer, and etching to form a shallow trench by taking the patterned second mask layer as a mask, wherein the shallow trench penetrates through the first dielectric layer and the first mask layer and extends into the semiconductor substrate;
depositing a second medium in the shallow trench, wherein the second medium is filled in the shallow trench and extends to the first mask layer of the semiconductor substrate; and the number of the first and second groups,
and carrying out chemical mechanical polishing to obtain the shallow trench isolation structure.
10. The method of manufacturing an image sensor according to claim 1, wherein a device structure of a pixel region and peripheral circuits are formed on the semiconductor substrate on both sides of the shallow trench isolation structure to form an image sensor.
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| CN202110342838.9A CN113035895A (en) | 2021-03-30 | 2021-03-30 | Method for manufacturing image sensor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116895671A (en) * | 2023-09-11 | 2023-10-17 | 粤芯半导体技术股份有限公司 | Pixel isolation structure, preparation method thereof and image sensor |
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| US6683004B1 (en) * | 1999-11-25 | 2004-01-27 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device, and semiconductor device manufactured thereby |
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| CN116895671A (en) * | 2023-09-11 | 2023-10-17 | 粤芯半导体技术股份有限公司 | Pixel isolation structure, preparation method thereof and image sensor |
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