CN112910424A - Operational amplifier circuit and switching circuit - Google Patents
Operational amplifier circuit and switching circuit Download PDFInfo
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- CN112910424A CN112910424A CN202110063509.0A CN202110063509A CN112910424A CN 112910424 A CN112910424 A CN 112910424A CN 202110063509 A CN202110063509 A CN 202110063509A CN 112910424 A CN112910424 A CN 112910424A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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Abstract
The invention discloses an operational amplifier circuit and a switch circuit, which comprise a first current mode operational amplifier, a first compensation capacitor and a proportional amplifier circuit, wherein the first current mode operational amplifier receives a first feedback voltage and a reference voltage, the proportional amplifier circuit receives the first voltage and the reference voltage, is connected to a common mode voltage, and performs proportional amplification on the first voltage and the reference voltage, the output of the first current mode operational amplifier is connected to the output of the proportional amplifier circuit through the first compensation capacitor, and the output of the first current mode operational amplifier generates a compensation voltage.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to an operational amplifier circuit and a switch circuit.
Background
Operational amplifier circuits are widely used in various circuit systems, particularly in switching circuits. The speed and offset voltage of the operational amplifier circuit are two important characteristics, but it is difficult to achieve both of them. In the traditional operational amplifier circuit, the speed is increased by reducing the size of an input geminate transistor, and the offset voltage is increased; the offset voltage is reduced by increasing the input pair transistor size, and the speed is slowed. In some situations where high speed and low offset voltage are required, optimization is difficult to achieve.
Disclosure of Invention
In view of the above, an objective of the present invention is to provide an operational amplifier circuit and a switch circuit, so as to solve the problem in the prior art that the speed and the offset voltage of the operational amplifier circuit are difficult to be optimized simultaneously.
The technical solution of the present invention is to provide a control method of a switch circuit, which generates a first reference voltage, controls the slopes of a rising edge and a falling edge, and generates a second reference voltage; carrying out operational amplification on the output feedback voltage and the reference voltage to obtain a compensation voltage; when a first reference voltage has a falling edge, the reference voltage is connected to the first reference voltage through a first switch, and the second reference voltage is connected to an output voltage through a second switch; when the first reference voltage has a rising edge, the reference voltage is connected to the second reference voltage through a third switch.
Optionally, the slope of the rising edge and the slope of the falling edge of the first reference voltage are controlled according to a set slope, and the second reference voltage is generated.
Optionally, the central processor sets the slope.
Another technical solution of the present invention is to provide a control circuit of a switching circuit, where the control circuit includes a slope buffer and a first operational amplifier, the slope buffer receives a first reference voltage, controls slopes of a rising edge and a falling edge, and generates a second reference voltage; the first operational amplifier receives the output feedback voltage and the reference voltage, and performs operational amplification to obtain a compensation voltage;
when a first reference voltage has a falling edge, the reference voltage is connected to the first reference voltage through a first switch, and the second reference voltage is connected to an output voltage through a second switch; when the first reference voltage has a rising edge, the reference voltage is connected to the second reference voltage through a third switch.
Optionally, the slope of the rising edge and the slope of the falling edge of the first reference voltage are controlled according to a set slope, and the second reference voltage is generated.
Optionally, the central processor sets the slope.
Optionally, the control circuit further includes a digital-to-analog conversion circuit, and the digital-to-analog conversion circuit generates the first reference voltage.
Optionally, the first signal changes from inactive to active when the first reference voltage has a falling edge; when the first reference voltage has a rising edge, the first signal changes from active to inactive; when the first signal is active, the reference voltage is connected to the first reference voltage through a first switch, and the second reference voltage is connected to the output voltage through a second switch; when the first signal is inactive, the reference voltage is connected to the second reference voltage through a third switch.
Optionally, when the first enable signal is active, the first signal changes from inactive to active when a falling edge occurs in the first reference voltage; the first signal changes from active to inactive when a rising edge of the first reference voltage occurs;
when the first enable signal is inactive, the first signal is inactive.
Optionally, the first enable signal is SetVID _ Decay.
Optionally, the slope buffer comprises a second operational amplifier and a first capacitor; the first end of the second operational amplifier receives a first reference voltage, and the second end of the second operational amplifier is connected to the output end of the second operational amplifier and is connected to the negative voltage end of the output of the switch circuit through a first capacitor.
Optionally, the first operational amplifier includes a first current-mode operational amplifier, a first compensation capacitor, a proportional amplifier circuit, and a first voltage follower, the first current-mode operational amplifier receives an output feedback voltage and a reference voltage, the proportional amplifier circuit receives an output voltage and a reference voltage, the proportional amplifier circuit is connected to a common-mode voltage, an output of the first current-mode operational amplifier is connected to an output of the proportional amplifier circuit through the first compensation capacitor, and an output of the first current-mode operational amplifier generates a compensation voltage through the first voltage follower.
In another aspect of the present invention, an operational amplifier circuit includes a first current mode operational amplifier, a first compensation capacitor, and a proportional amplifier circuit, wherein the first current mode operational amplifier receives a first feedback voltage and a reference voltage, the proportional amplifier circuit receives a first voltage and the reference voltage, is connected to a common mode voltage, and performs proportional amplification on the first voltage and the reference voltage, an output of the first current mode operational amplifier is connected to an output of the proportional amplifier circuit through the first compensation capacitor, and an output of the first current mode operational amplifier generates a compensation voltage.
Optionally, the proportional amplifying circuit includes a second current mode operational amplifier and a first resistor, the second current mode operational amplifier receives a first voltage and a reference voltage, an output of the second current mode operational amplifier is connected to a common mode voltage through the first resistor, and an output of the second current mode operational amplifier is an output of the proportional amplifying circuit.
Optionally, the current source operational amplifier further comprises a first voltage follower, and the output of the first current source operational amplifier generates a compensation voltage through the first voltage follower.
Optionally, the gain of the second current mode operational amplifier is k times of that of the first current mode operational amplifier, where k is greater than 1.
Optionally, the first voltage is an output voltage, the first feedback voltage is an output feedback voltage, the output voltage is connected to the output feedback voltage through a second resistor, and the output sampling current is connected to the output feedback voltage.
Optionally, the first voltage is connected to the first feedback voltage through a voltage dividing circuit; the voltage dividing circuit divides the first voltage.
Optionally, the voltage dividing circuit includes a first control switch, a second control switch, a voltage dividing resistor, and a second voltage follower, the first voltage is connected to an input terminal of the second voltage follower through the first control switch, the first voltage is connected to the second control switch through the voltage dividing resistor, the second control switch is connected to an input terminal of the second voltage follower, and an output terminal of the second voltage follower is connected to the first feedback voltage; the operational amplification circuit receives a reference voltage and an input terminal voltage of the second voltage follower.
In another aspect of the present invention, a switching circuit is provided.
Compared with the prior art, the circuit structure and the method have the following advantages that: the operational amplifier circuit speed and the offset voltage can be optimized simultaneously.
Drawings
FIG. 1 is a schematic diagram of a control circuit of the present invention;
FIG. 2 is a schematic diagram showing waveforms of a first signal, a first reference voltage, a second reference voltage and a reference voltage of the control circuit according to the present invention;
FIG. 3 is a circuit diagram of an embodiment of the digital-to-analog conversion circuit 100 of the control circuit of the present invention;
fig. 4 is a circuit diagram of an embodiment of an operational amplifier 300 of the present invention;
fig. 5 is a circuit diagram of another embodiment of an operational amplifier 300 according to the present invention;
fig. 6 is a circuit schematic of an embodiment of the inventive op-amp 300 incorporating DROOP;
FIG. 7 is a circuit diagram of an operational amplifier 300 incorporating a voltage divider circuit according to an embodiment of the present invention;
fig. 8 is a circuit diagram of an embodiment of the operational amplifier 300 incorporating a DROOP and a voltage divider circuit.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to only these embodiments. The invention is intended to cover alternatives, modifications, equivalents and alternatives which may be included within the spirit and scope of the invention.
In the following description of the preferred embodiments of the present invention, specific details are set forth in order to provide a thorough understanding of the present invention, and it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the drawings are in simplified form and are not to precise scale, which is only used for convenience and clarity to assist in describing the embodiments of the present invention.
Referring to fig. 1, the control circuit includes a slope buffer 200 and a first operational amplifier 300, wherein the slope buffer 200 receives a first reference voltage VA, controls slopes of a rising edge and a falling edge, and generates a second reference voltage VB; the first operational amplifier 300 receives the output feedback voltage VFB and the reference voltage VBR, and performs operational amplification to obtain a compensation voltage COMP; when a first reference voltage VA has a falling edge, the reference voltage VBR is connected to the first reference voltage VA through a first switch K410, and the second reference voltage VB is connected to an output voltage VO + through a second switch K420; when the first reference voltage VA has a rising edge, the reference voltage VBR is connected to the second reference voltage VB through the third switch K430. Fig. 2 is a schematic waveform diagram of the first reference voltage VA, the second reference voltage VB and the reference voltage VBR of the control circuit according to the present invention. At time t01, the first reference voltage VA has a falling edge, and the falling edge of the second reference voltage VB has a gentle slope after passing through the slope buffer 200, and the voltage of the reference voltage VBR is the same as that of the first reference voltage VA; at time t02, when the first reference voltage VA rises, the second reference voltage VB starts to rise slowly as it has not yet dropped to the voltage of the first reference voltage VA between times t01 and t02, and the reference voltage VBR jumps to the value of the second reference voltage VB and starts to rise slowly as the second reference voltage VB. The invention realizes that the reference voltage follows the output voltage by using the analog circuit, and has convenient realization and low cost.
In one embodiment, the slopes of the rising edge and the falling edge of the first reference voltage VA are controlled according to a set slope. The set slope is not limited to the linear slope in fig. 2, and may be any slope. In one embodiment, a Central Processing Unit (CPU) sets the slope.
Referring to fig. 1, the control circuit further includes a digital-to-analog conversion circuit 100, which generates the first reference voltage VA.
Referring to fig. 3, an embodiment of the digital-to-analog conversion circuit 100 is shown. The digital-to-analog conversion circuit 100 includes an operational amplifier 110, a current mirror composed of switching tubes M120 and M130, the switching tube M110, a resistor R110, and a resistor R120. The operational amplifier 110 receives an internal reference voltage VBG and a voltage on the resistor R110, an output of the operational amplifier 110 is connected to a gate of the switching tube M110, a source of the switching tube M110 is connected to the resistor R110, the other end of the resistor R110 is connected to a reference ground, a drain of the switching tube M110 is connected to an input end of the current mirror, the digital signal controls the number of the actually connected current mirrors, an output end of the current mirror is connected to the resistor R120, and the voltage on the resistor R120 is an output voltage of the digital-to-analog conversion circuit 100.
In one embodiment, the first, second, and third switches K410, K420, and K430 are controlled using the first signal. When the first reference voltage VA has a falling edge, the first signal TRACK changes from inactive to active; when the first reference voltage has a rising edge, the first signal TRACK changes from active to inactive; when the first signal is asserted, the reference voltage VBR is connected to the first reference voltage VA through a first switch K410, and the second reference voltage VB is connected to the output voltage VO + through a second switch K420; when the first signal TRACK is inactive, the reference voltage is connected to the second reference voltage VB through the third switch K430. TRACKB and TRACK in FIG. 1 are logically complementary. In one embodiment, active may correspond to high and inactive to low; in another embodiment, the active may correspond to a low level and the inactive corresponds to a high level.
In one embodiment, when a first enable signal is active, the first signal changes from inactive to active when a falling edge occurs in the first reference voltage; the first signal changes from active to inactive when a rising edge of the first reference voltage occurs; when the first enable signal is inactive, the first signal is inactive. The first enable signal is SetVID _ Decay. SetVID _ Decay is an instruction in the SVID protocol that communicates between the Intel processor and its power supply to cause the output voltage of the power supply to drop to a new target value with a load-dependent slope to save power consumption.
In one embodiment, please continue to refer to fig. 1, the slope buffer 200 includes a second op-amp 210 and a first capacitor C210; a first terminal of the second operational amplifier 210 receives a first reference voltage VA, and a second terminal of the second operational amplifier 210 is connected to an output terminal VB of the second operational amplifier 210 and to a negative voltage terminal VO-of an output of the switching circuit through a first capacitor C210.
Referring to fig. 4, the first operational amplifier 300 includes a first current mode operational amplifier 310, a first compensation capacitor C310, a proportional amplifier circuit 320 and a first voltage follower 330, the first current mode operational amplifier 310 receives an output feedback voltage VFB and a reference voltage VBR, the proportional amplifier circuit 320 receives an output voltage VO + and the reference voltage VBR, the proportional amplifier circuit 320 is connected to a common mode voltage VDC, an output of the first current mode operational amplifier 310 is connected to an output of the proportional amplifier circuit 320 through the first compensation capacitor C310, and an output of the first current mode operational amplifier 310 generates a compensation voltage COMP through the first voltage follower 330.
The technical solution of the present invention is to provide a control method of a switch circuit, which generates a first reference voltage, controls the slopes of a rising edge and a falling edge, and generates a second reference voltage; carrying out operational amplification on the output feedback voltage and the reference voltage to obtain a compensation voltage; when a first reference voltage has a falling edge, the reference voltage is connected to the first reference voltage through a first switch, and the second reference voltage is connected to an output voltage through a second switch; when the first reference voltage has a rising edge, the reference voltage is connected to the second reference voltage through a third switch.
Optionally, the slopes of the rising edge and the falling edge of the first reference voltage are controlled according to a set slope.
Optionally, the central processor sets the slope.
Still another technical solution of the present invention is to provide an operational amplifier circuit, please refer to fig. 4, which includes a first current-mode operational amplifier 310, a first compensation capacitor C310 and a proportional amplifier circuit 320, wherein the first current-mode operational amplifier 310 receives a first feedback voltage VFB and a reference voltage VBR, the proportional amplifier circuit 320 receives a first voltage and the reference voltage VBR and is connected to a common-mode voltage VDC to perform proportional amplification on the first voltage and the reference voltage VBR, an output of the first current-mode operational amplifier 310 is connected to an output of the proportional amplifier circuit 320 through the first compensation capacitor C310, and an output of the first current-mode operational amplifier 310 generates a compensation voltage COMP. In one embodiment, a first voltage follower 330 is further included, and the output of the first current mode op amp 310 generates a compensation voltage through the first voltage follower 330. In fig. 4, the output of the first current mode operational amplifier 310 generates the compensation voltage COMP through the voltage follower 330, and the voltage follower 330 prevents the circuit connected after the compensation voltage COMP from affecting the operational amplifier circuit. Therefore, the voltage follower 330 may not be added.
Referring to fig. 5, an embodiment of the scaling circuit 320 includes a second current-mode operational amplifier 321 and a first resistor R310, the second current-mode operational amplifier 321 receives a first voltage and a reference voltage VBR, an output of the second current-mode operational amplifier 321 is connected to a common-mode voltage VDC through the first resistor R310, and an output of the second current-mode operational amplifier 321 is an output of the scaling circuit 320.
In one embodiment, the second current mode op-amp 321 has a gain k times greater than the first current mode op-amp 310, where k is greater than 1.
Referring to fig. 6, in one embodiment, a DROOP function is added, that is, when the output current is large, the voltage at the output terminal is reduced due to the voltage drop on the output wire, and the voltage sampled by the output voltage feedback does not include the voltage drop on the wire, so the voltage drop on the wire needs to be taken into account. The first voltage is an output voltage VO +, the first feedback voltage VFB is an output feedback voltage, the output voltage VO + is connected to the output feedback voltage through a second resistor R340, and an output sampling current Itotal is connected to the output feedback voltage. By sampling the output current, a voltage drop is generated across the second resistor R340 to equalize the voltage drop across the output conductor.
Referring to fig. 7, in one embodiment, an output voltage divider function is added. The first voltage is connected to the first feedback voltage through a voltage division circuit; the voltage dividing circuit divides the first voltage. The voltage dividing circuit comprises a first control switch K310, a second control switch K320, voltage dividing resistors R320 and R330 and a second voltage follower 340, wherein a first voltage is connected to the input end of the second voltage follower 340 through the first control switch K310, the first voltage is connected to the second control switch K320 through the voltage dividing resistor R320, the second control switch K320 is connected to the input end of the second voltage follower 340, and the output end of the second voltage follower 340 is connected to the first feedback voltage VFB; the operational amplifier circuit receives a reference voltage VBR and an input end voltage VOS + of the second voltage follower. When the first control switch K310 is turned on and the second control switch K320 is turned off, the first voltage is connected to the first feedback voltage through the voltage follower, and the value of the first feedback voltage is equal to the first voltage; when the second control switch K320 is turned on and the first control switch K310 is turned off, the first voltage is divided by the resistor and then connected to the first feedback voltage by the voltage follower, and the value of the first feedback voltage is equal to the divided voltage value of the first voltage. In the switching circuit, the first voltage is an output voltage, and the first feedback voltage is an output feedback voltage.
In one embodiment, both output voltage divider functionality and DROOP functionality may be added. Referring to fig. 8, the output voltage is connected to the feedback voltage VFB through a voltage divider circuit and a circuit for implementing a DROOP function, which is composed of a resistor R340 and an output sampling current Itotal.
In another aspect of the present invention, a switching circuit is provided.
Although the embodiments have been described and illustrated separately, it will be apparent to those skilled in the art that some common techniques may be substituted and integrated between the embodiments, and reference may be made to one of the embodiments not explicitly described, or to another embodiment described.
The above-described embodiments do not limit the scope of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the above-described embodiments should be included in the protection scope of the technical solution.
Claims (8)
1. An operational amplifier circuit, comprising: the current mode operational amplifier comprises a first current mode operational amplifier, a first compensation capacitor and a proportional amplification circuit, wherein the first current mode operational amplifier receives a first feedback voltage and a reference voltage, the proportional amplification circuit receives the first voltage and the reference voltage and is connected to a common mode voltage to amplify the first voltage and the reference voltage in proportion, the output of the first current mode operational amplifier is connected to the output of the proportional amplification circuit through the first compensation capacitor, and the output of the first current mode operational amplifier generates a compensation voltage.
2. The operational amplifier circuit according to claim 1, wherein: the proportional amplifying circuit comprises a second current mode operational amplifier and a first resistor, the second current mode operational amplifier receives a first voltage and a reference voltage, the output of the second current mode operational amplifier is connected to a common mode voltage through the first resistor, and the output of the second current mode operational amplifier is the output of the proportional amplifying circuit.
3. The operational amplifier circuit according to claim 1, wherein: the first current mode operational amplifier is used for outputting a first current mode operational amplifier, and the first voltage follower is used for generating compensation voltage.
4. The operational amplifier circuit according to claim 2, wherein: the gain of the second current mode operational amplifier is k times of that of the first current mode operational amplifier, wherein k is larger than 1.
5. The operational amplifier circuit according to claim 1, wherein: the first voltage is output voltage, the first feedback voltage is output feedback voltage, the output voltage is connected to the output feedback voltage through a second resistor, and the output sampling current is connected to the output feedback voltage.
6. The operational amplifier circuit according to claim 1, wherein: the first voltage is connected to the first feedback voltage through a voltage division circuit; the voltage dividing circuit divides the first voltage.
7. The operational amplifier circuit according to claim 6, wherein: the voltage division circuit comprises a first control switch, a second control switch, a voltage division resistor and a second voltage follower, wherein a first voltage is connected to the input end of the second voltage follower through the first control switch, the first voltage is connected to the second control switch through the voltage division resistor, the second control switch is connected to the input end of the second voltage follower, and the output end of the second voltage follower is connected to the first feedback voltage; the operational amplification circuit receives a reference voltage and an input terminal voltage of the second voltage follower.
8. A switching circuit, characterized by: the first voltage is an output voltage of a switching circuit, and the first feedback voltage is an output feedback voltage, including the operational amplifier circuit according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110063509.0A CN112910424A (en) | 2021-01-18 | 2021-01-18 | Operational amplifier circuit and switching circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110063509.0A CN112910424A (en) | 2021-01-18 | 2021-01-18 | Operational amplifier circuit and switching circuit |
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| CN112910424A true CN112910424A (en) | 2021-06-04 |
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| CN202110063509.0A Pending CN112910424A (en) | 2021-01-18 | 2021-01-18 | Operational amplifier circuit and switching circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12107413B2 (en) | 2021-03-12 | 2024-10-01 | Joulwatt Technology Co., Ltd. | Switch protection circuit and power converter suited for different input voltage ranges |
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| US12107413B2 (en) | 2021-03-12 | 2024-10-01 | Joulwatt Technology Co., Ltd. | Switch protection circuit and power converter suited for different input voltage ranges |
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Address after: Room 901-23, 9 / F, west 4 building, Xigang development center, 298 Zhenhua Road, Sandun Town, Xihu District, Hangzhou City, Zhejiang Province, 310030 Applicant after: Jiehuate Microelectronics Co.,Ltd. Address before: Room 901-23, 9 / F, west 4 building, Xigang development center, 298 Zhenhua Road, Sandun Town, Xihu District, Hangzhou City, Zhejiang Province, 310030 Applicant before: JOULWATT TECHNOLOGY Inc.,Ltd. |
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| CB02 | Change of applicant information |