CN110703343A - Wide-matching-resonance magnetic resonance detection device and detection method based on PWM (pulse-Width modulation) regulation and control technology - Google Patents

Abstract

The invention relates to a wide-distributed harmonic magnetic resonance detection device and a detection method based on PWM control technology, comprising a PC host computer sending transmission parameters to an STM32+FPGA transceiver main control module, displaying the working state and storing the collected magnetic resonance signal data; The transmitting system includes a battery, which is converted by a DC-DC converter and charges the energy storage capacitor, and is connected to the H-bridge transmitting module through a high-power diode, and the H-bridge transmitting module is connected to a controllable constant voltage source through a low-power diode; STM32+FPGA transceiver The main control module drives the H-bridge transmitting module through the PWM drive module; the PWM drive module is connected to the transceiver switching device through a bidirectional diode; the receiving system is connected to the transceiver integrated coil through the transceiver switching device control; according to the instructions of the main control module, the transceiver switching device controls The connection between the transmitting system or the receiving system and the integrated transceiver coil. It solves the problem of long turn-off time of the traditional harmonic distribution when the transceiver integrated coil is used for transmission, and reduces the dead time of the magnetic resonance detection device.

Description

Widely matched harmonic magnetic resonance detection device and detection method based on PWM control technology

technical field

The invention relates to the field of geophysical exploration equipment, in particular to a wide-matched harmonic magnetic resonance detection device and a detection method based on a PWM control technology.

Background technique

Magnetic Resonance Sounding (MRS) is an effective geophysical detection method, which is widely used in shallow groundwater detection, disaster water source detection and other fields. During magnetic resonance detection, the transmitting system emits excitation pulses through the transmitting coil to excite hydrogen protons in water, and then the receiving system collects the magnetic resonance signals induced by the receiving coil. Because the current magnetic resonance detection technology adopts the LCR series resonance mode to transmit, the transmitting coil can be equivalent to a series connection of an inductance and a resistance, and then it is connected in series with a capacitor of an appropriate value to perform harmonic tuning to make it resonate at the Larmor frequency point. The equivalent impedance of the load can be reduced, and the detection depth is greater under the same emission voltage. However, after the transmission of LCR series resonance, the current oscillates and decays, resulting in a slow turn-off of the transmission, which delays the acquisition of the signal, and because the magnetic resonance signal itself is in the form of e-exponential decay, the early large-scale signal cannot be obtained. Especially when the aquifer type is sandy clay layer, the average relaxation time is less than 30ms, and the acquisition is carried out after the emission is completely turned off, the signal is attenuated seriously, a large amount of signal is lost, and the effective magnetic resonance signal can hardly be detected, which seriously affects the detection effect.

SUMMARY OF THE INVENTION

In view of the problems mentioned above in the prior art, the technical problem to be solved by the present invention is to provide a wide-matched harmonic magnetic resonance detection device based on PWM control technology, which solves the problem of serious signal attenuation, a large number of signal losses, and almost impossible to detect effective magnetic resonance. problem with resonance signals.

Another object of the present invention is to provide a wide-matched harmonic magnetic resonance detection method based on PWM control technology.

The present invention is realized in this way, a wide-matched harmonic magnetic resonance detection device based on PWM control technology is used for shallow magnetic resonance detection. Switching device, integrated transceiver coil and receiving system, wherein,

The PC host computer is used for human-computer interaction, sending transmission parameters to the STM32+FPGA transceiver main control module, displaying the working status and storing the collected magnetic resonance signal data;

The transmitting system includes a battery, which is converted by a DC-DC converter to charge the energy storage capacitor, and is connected to an H-bridge transmitting module through a high-power diode, and the H-bridge transmitting module is connected to a controllable constant voltage source through a low-power diode; STM32 +The FPGA transceiver main control module drives the H-bridge transmitting module through the PWM drive module; the H-bridge transmitting module is connected to the transceiver switching device through a bidirectional diode;

The receiving system is controlled and connected with the transceiver integrated coil through the transceiver switching device;

The transceiver switching device controls the connection between the transmitting system or the receiving system and the transceiver integrated coil by receiving the instructions of the STM32+FPGA transceiver main control module.

Further, the receiving system includes a preamplifier circuit, a signal conditioning circuit, a program-controlled amplifying module, an LPF module, and an A/D conversion module. The preamplifier circuit of the receiving system is connected to the transceiver switching device, and the preamplifier The circuit amplifies the signal and transmits it to the STM32+FPGA transceiver main control module through the signal conditioning circuit, the program-controlled amplification module, the LPF module, and the A/D conversion module in turn.

Further, the transceiver switching device includes a switch drive module and a transceiver switch, and the switch drive module controls the connection between the transmitting system or the receiving system and the transceiver integrated coil through the transceiver switching switch according to the instructions received by the STM32+FPGA transceiver main control module. .

Further, the STM32+FPGA transceiver main control module is used to interact with the host computer, parameter calculation and detection work sequence control; control the DC-DC converter to store the energy in the battery to the energy storage capacitor; adjust the controllable constant The voltage value of the voltage source; generate two PWM control signals through the PWM drive module; control the switch drive module to control the transceiver switch to select the connection between the transceiver integrated coil and the H-bridge transmitter module or preamplifier circuit; and control A/D conversion The module collects the signal sensed by the transceiver integrated coil, and amplifies it through the preamplifier circuit, adjusts the signal conditioning circuit, amplifies the magnetic resonance signal again by the program-controlled amplifier module and filters the LPF module, and adjusts the gain of the program-controlled amplifier module.

Further, the energy storage capacitor of the transmitting system is a high-voltage large-capacity capacitor, which is used to provide energy during transmission; the high-voltage pulse at the moment of shutdown is clamped by a controllable constant voltage source whose voltage value is higher than the voltage of the energy storage capacitor. , protect the switching device IGBT that constitutes the H-bridge transmitting module, and the energy of the guiding coil is quickly released within the dead time of the transmitting pulse.

Further, the high-power diode is a reverse high-voltage fast recovery diode with unidirectional conduction characteristics, which blocks the discharge circuit formed by the energy storage capacitor and the H-bridge transmitting module during the dead time of the excitation pulse; and prevents controllable The constant voltage source discharges the energy storage capacitor; isolates the instantaneous pulse generated by the coil discharge during the dead time of the excitation pulse, and protects the capacitor;

The low-power diode is a reverse high-voltage fast recovery diode with unidirectional conduction characteristics, which prevents the controllable constant voltage source from discharging to the energy storage capacitor, the H-bridge transmitting module, the bidirectional diode and the coil; The excitation pulse is used for clamping without releasing energy through the transmitting loop during the dead time of the excitation pulse;

The bidirectional diode includes two anti-parallel diodes for transmitting residual energy and absorbing.

Further, in the transmission stage: when the PWMA signal or PWMB signal sent by the PWM drive module is valid, a group of IGBTs in the H-bridge transmission module is turned on, and the energy storage capacitor, high-power diode, a group of IGBTs, bidirectional diodes and equivalent A loop is formed by the transceiver integrated coil with the inductor L and the resistor R in series. Due to the unidirectional conductivity of the low-power diode, the controllable constant voltage source Ur is equivalent to an open circuit; when the PWMA signal and the PWMB signal are both invalid, the excitation pulse is dead at this time. Due to the unidirectional conductivity of the high-power diode, during this period, the energy storage capacitor is equivalent to an open circuit, and the energy release loop of the transceiver coil is composed of an H-bridge transmitter module, a low-power diode and a controllable constant voltage source. Achieve the purpose of equal-amplitude high-quality waveform launch and fast shutdown.

A wide-matched harmonic magnetic resonance detection method based on PWM control technology, comprising the following steps:

Step 301: The STM32+FPGA transceiver main control module identifies the parameters sent by the PC host computer and the start signal, including the excitation current _Im , the number of emission currents M, the number of superpositions k and the excitation pulse frequency f, and calculates the emission pulse time t and pulse The number of cycles is n, and the actual excitation time t is returned to the PC host computer, where M and n are positive integers;

Step 302: The STM32+FPGA transceiver main control module controls the transceiver switch to switch the transceiver integrated coil to be connected to the preamplifier circuit of the receiving system by controlling the switch drive module in the transceiver switching device, and prepares to enter the gain adjustment and noise collection stage;

Step 303: The STM32+FPGA transceiver main control module controls the receiving system to collect noise signals through the transceiver integrated coil, and adjusts the gain of the program-controlled amplification module according to the collected signal amplitude;

Step 304: Determine whether the gain adjustment of the program-controlled amplifier module is completed, and continue to step 305 if the adjustment is completed, otherwise return to step 303, and the judgment basis for completing the gain adjustment is: the amplitude of the signal collected by the A/D conversion module is 1 of the A/D. /2 between full scale and full scale;

Step 305: The STM32+FPGA transceiver main control module controls the transceiver switch through the transceiver switching device to switch the transceiver integrated coil to connect with the H-bridge transmitting module of the transmitting system, ready to enter the bipolar pulse excitation stage;

Step 306: The STM32+FPGA transceiver main control module calculates the excitation voltage U _S , the excitation pulse duty cycle d and the clamping voltage U _DC according to the excitation current _Im and the constraint conditions;

Step 307: the STM32+FPGA transceiver main control module adjusts the voltage value of the controllable constant voltage source according to the calculated clamping voltage value UDC;

Step 308: Determine whether the clamping voltage reaches the clamping voltage value UDC, if it reaches the value UDC, continue to step 309, otherwise go back to step 307;

Step 309: the STM32+FPGA transceiver main control module controls the DC-DC converter to charge the energy storage capacitor according to the excitation voltage value;

Step 310: determine whether the charging is completed, the basis for determining whether the charging is completed is that the excitation voltage value is reached, and when the charging is completed, go to step 311, otherwise, go back to step 309;

Step 311: The STM32+FPGA transceiver main control module controls the PWM drive to generate two drive signals with a duty cycle of d and a time interval of T/2, and transmits n cycles through the H-bridge transmitting module, the bidirectional diode and the transceiver integrated coil, and the frequency is The excitation pulse of f. The purpose of firing n-cycle pulses instead of fixed-duration pulses is to turn off the excitation pulse at the full cycle, thereby shortening the dead time;

Step 312: Delay 800us after the transmission is turned off to ensure that all the transmission operations are completed, and the transceiver integrated coil is switched to be connected to the preamplifier circuit of the receiving system, ready to enter the signal acquisition stage;

Step 313: The STM32+FPGA transceiver main control module controls the A/D conversion module to sample the signal and store it in the PC host computer. When storing, it should be noted that the received signal corresponds to the transmission time t in step 301;

Step 314: Determine whether the current current detection is completed, if completed, continue to step 315, otherwise return to step 309;

Step 315 : determine whether to perform the detection of the next current value, and complete the current detection, otherwise return to Step 305 .

Further, step 306: the STM32+FPGA transceiver main control module calculates the excitation voltage U _S , the excitation pulse duty cycle d and the clamping voltage U _DC according to the excitation current I _m and the constraint conditions, satisfying:

Among them, T is the transmission pulse period, which satisfies T=1/f, R is the equivalent resistance value of the coil, L is the equivalent inductance value of the coil, and each quantity in the formula adopts the SI unit system, and the constraints are:

U _DC ≤1000

0.25≤d≤0.45

最小，储能电容功率最小，C为储能电容容值。aim to make

Minimum, the power of the energy storage capacitor is the smallest, and C is the capacitance value of the energy storage capacitor.

Further, step 310: charging is performed after the constant voltage source is adjusted.

Compared with the prior art, the present invention has the following beneficial effects:

(1) The present invention provides a transmission method using wide harmonic distribution, which effectively improves the problem of long off-time of traditional harmonic distribution when using the transceiver integrated coil for transmission, and reduces the dead time of the magnetic resonance detection device; The slow turn-off of the transmission makes the acquired signal delayed and the early large-value signal cannot be obtained.

(2) The present invention adopts a constant voltage clamp circuit composed of a controllable constant voltage source and a diode, which shortens the dead time, suppresses instantaneous pulses, and prolongs the service life of the instrument;

(3) The present invention provides that by changing the emission duty ratio, equal-amplitude emission in a wide-harmonic emission mode is realized, and the quality of the emission waveform is improved.

Description of drawings

FIG. 1 shows a schematic structural diagram of a wide-matched harmonic magnetic resonance detection device based on PWM control technology provided by an embodiment of the present invention;

FIG. 2 shows a schematic diagram of a controllable active clamp transmit loop provided by an embodiment of the present invention;

FIG. 3 shows a schematic diagram of a workflow of wide-matched harmonic magnetic resonance detection based on PWM control technology provided by an embodiment of the present invention;

Fig. 4 shows the wide-harmonic resonance detection excitation current and the wide-harmonic magnetic resonance detection excitation current waveform diagram of the present invention based on the PWM control technology, wherein (a) is the wide-harmonic magnetic resonance detection excitation current waveform diagram, ( b) The excitation current waveform diagram provided by the embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

As shown in Figure 1, a wide-matched harmonic magnetic resonance detection device based on PWM control technology is used for shallow magnetic resonance detection. The transmission and reception switching device constituted by the switch driving module 12, the transmission and reception switching switch 13, the transmission and reception integrated coil 14, and the reception system.

According to the instructions of the STM32+FPGA transceiver main control module, the transceiver switching device controls the connection of the receiving system, the transmitting system and the transceiver integrated coil.

In this embodiment, the transmitting system includes a battery 3, a DC-DC converter 4, an energy storage capacitor 5, a controllable constant voltage source 6, a PWM drive module 7, a high-power diode 8, a low-power diode 9, and an H-bridge transmitting module 10 And the bidirectional diode 11, wherein the DC-DC converter 4 is connected to the control of the STM32+FPGA transceiver main control module, receives the control of the STM32+FPGA transceiver main control module, and the battery 3 sends the energy storage capacitor 5 through the DC-DC converter 4 to the energy storage capacitor 5. After charging, the energy storage capacitor 5 is connected to the H-bridge transmitting module 10 through a high-power diode 8, and transmits current to the transceiver integrated coil through the H-bridge transmitting module 10.

The controllable constant voltage source 6 is connected to the H-bridge transmitting module 10 through the low-power diode 9, the H-bridge transmitting module 10 is connected to the transceiver switching device through the bidirectional diode 11, the H-bridge transmitting module 10 controls the switching device IGBT through the PWM driving module 7, and the PWM The driver module 7 receives the instructions of the STM32+FPGA transceiver main control module.

The receiving system includes a preamplifier circuit 15, a signal conditioning circuit 16, a program-controlled amplifying module 17, an LPF (Lowpass filter, low-pass filter) module 18, and an A/D conversion module 19. The transceiver integrated coil is turned on, and the signal passes through the preamplifier circuit 15, the signal conditioning circuit 16, the program-controlled amplifying module 17, the LPF (Low pass filter, low-pass filter) module 18, and the A/D conversion module 19 to STM32+FPGA in sequence The transceiver main control module is collected.

The PC host computer 1 is used for human-computer interaction, and sends transmission parameters to the STM32+FPGA transceiver main control module 2, displays the working status and stores the collected magnetic resonance signal data;

STM32+FPGA transceiver main control module 2, used to interact with the host computer, parameter calculation and detection work sequence control;

The STM32+FPGA transceiver main control module 2 is also used to control the DC-DC converter 4 to store the energy in the battery 3 to the energy storage capacitor 5;

The STM32+FPGA transceiver main control module 2 is also used to adjust the voltage value of the controllable constant voltage source 6;

The STM32+FPGA transceiver main control module 2 is also used to generate two PWM control signals through the PWM drive module 7;

The STM32+FPGA transceiver main control module 2 is also used to control the transceiver switch 13 to select the transceiver integrated coil 14 to connect with the bidirectional diode 11 or the preamplifier circuit 15 by controlling the switch drive module 12;

The STM32+FPGA transceiver main control module 2 is also used to control the A/D conversion module 19 to collect the sensing of the transceiver integrated coil 14 and amplify it through the preamplifier circuit 15, the signal conditioning circuit 16, and the program-controlled amplification module 17 to amplify again. and the magnetic resonance signal filtered by the LPF module 18;

The STM32+FPGA transceiver main control module 2 is also used to adjust the gain of the program-controlled amplification module 17 .

Further, in this embodiment, the energy storage capacitor 5 is a high-voltage large-capacitance capacitor, which is used to provide energy during transmission; in the transmission system in this embodiment, the voltage value of the controllable constant voltage source 6 is higher than the voltage of the energy storage capacitor , clamp the high-voltage pulse at the moment of turn-off, protect the switching device IGBT that constitutes the H-bridge launch module, and quickly release the energy of the guide coil within the dead time of the launch pulse;

The high-power diode 8 is a reverse high-voltage fast recovery diode with unidirectional conduction characteristics. Block the discharge circuit formed by the energy storage capacitor 5 and the H-bridge transmitting module 10 during the dead time of the excitation pulse; prevent the controllable constant voltage source 6 from discharging to the energy storage capacitor 5; isolate the discharge of the coil during the dead time of the excitation pulse. transient pulses to protect the capacitor.

The low-power diode 9 is a reverse high-voltage fast recovery diode with unidirectional conduction characteristics. Prevent the controllable constant voltage source 6 from discharging to the energy storage capacitor 5, the H-bridge transmitting module 10, the bidirectional diode 11 and the transceiver integrated coil 14; ensure that the controllable constant voltage source 6 is only used for clamping during the dead time of the excitation pulse and not The energy is released through the launch loop.

The bidirectional diode 11 is composed of two anti-parallel diodes, and is used for emitting residual energy and absorbing it.

During the launch phase:

The schematic diagram of the controllable active clamp transmitter circuit is shown in Figure 2. When the PWMA signal (or PWMB signal) is valid, a group of IGBTs in the H-bridge transmitter module is turned on (two IGBTs controlled by the same control signal are a group), An energy storage capacitor, a high-power diode, a set of IGBTs, a bidirectional diode, and a transceiver coil that is equivalent to an inductance L and a resistor R in series form a loop. Due to the unidirectional conductivity of the low-power diode, during this period, the controllable constant The voltage source is equivalent to an open circuit; when both the PWMA signal and the PWMB signal are invalid, the excitation pulse dead time is entered. Due to the unidirectional conductivity of the high-power diode, during this period, the energy storage capacitor is equivalent to an open circuit, and the transceiver is integrated. The energy release loop of the coil is composed of an H bridge circuit, a low-power diode and a controllable constant voltage source Ur. Since the voltage of the controllable constant voltage source Ur is constant, the loop current satisfies:

从而实现等幅高质量波形发射、快速关断的目的。

Thereby, the purpose of equal amplitude high-quality waveform emission and fast turn-off is achieved.

As shown in FIG. 3 , a method for detecting wide-harmonic magnetic resonance based on PWM control technology includes the following steps:

Step 301: The STM32+FPGA transceiver main control module 2 identifies the parameters and the start signal sent by the PC host computer 1, including the excitation current _Im , the number of emission currents M, the number of superpositions k and the excitation pulse frequency f, and the emission pulse time t is calculated and the number of pulse cycles n, and return the actual excitation time t to the PC host computer 1, where M and n are positive integers;

Step 302: The STM32+FPGA transceiver main control module 2 controls the transceiver switch 13 to switch the transceiver integrated coil 14 to be connected to the preamplifier circuit 15 of the receiving system by controlling the switch drive module 12 in the transceiver switching device, ready to enter the gain adjustment and noise collection stage;

Step 303: The STM32+FPGA transceiver main control module 2 controls the receiving system to collect the noise signal through the transceiver integrated coil 14, and adjusts the gain of the program-controlled amplification module 17 according to the amplitude of the collected signal;

Step 304: Determine whether the gain adjustment of the program-controlled amplifier module is completed, and continue to step 305 if the adjustment is completed, otherwise return to step 303, and the judgment basis for completing the gain adjustment is: the amplitude of the signal collected by the A/D conversion module 19 is in the A/D conversion state. Between 1/2 full scale and full scale of the module, the purpose is to maximize the accuracy of the A/D conversion module and avoid amplifier saturation;

Step 305: The STM32+FPGA transceiver main control module 2 controls the transceiver switch 13 to switch the transceiver integrated coil 14 to connect with the H-bridge transmitting module 10 of the transmitting system through the transceiver switching device 12, ready to enter the bipolar pulse excitation stage;

Step 306: The STM32+FPGA transceiver main control module 2 calculates the excitation voltage U _S , the excitation pulse duty cycle d and the clamping voltage U _DC according to the excitation current _Im and the constraint conditions, which should satisfy:

Among them, T is the transmission pulse period, which satisfies T=1/f, R is the equivalent resistance value of the coil, L is the equivalent inductance value of the coil, and each quantity in the formula adopts the SI unit system. The constraints are:

U _DC ≤1000

0.25≤d≤0.45

最小，即储能电容功率最小，C为储能电容容值；aim to make

The smallest, that is, the power of the energy storage capacitor is the smallest, and C is the capacitance value of the energy storage capacitor;

Step 307: The STM32+FPGA transceiver main control module 2 adjusts the voltage value of the controllable constant voltage source 6 according to the calculated clamping voltage value U _DC ;

Step 308 : determine whether the clamping voltage reaches the clamping voltage value U _DC , if it is reached, continue to step 309 , otherwise go back to step 307 ;

Step 309: the STM32+FPGA transceiver main control module 2 controls the DC-DC converter 4 to charge the energy storage capacitor 5 according to the excitation voltage value;

Step 310 : judging whether the charging is completed. The basis for judging the completion of the charging is that the excitation voltage value is reached. After the charging is completed, go to Step 311 , otherwise, go back to Step 309 . It should be noted that charging must be performed after the constant voltage source is adjusted, otherwise energy loss will be caused by capacitor leakage;

Step 311: The STM32+FPGA transceiver main control module 2 controls the PWM drive to generate two drive signals (PWMA, PWMB) with a duty cycle of d and a time interval of T/2, so as to transmit and receive through the H-bridge transmitting module 10, the bidirectional diode 11 and the The integral coil 14 emits n cycles of excitation pulses with a frequency f. Sending n-cycle pulses instead of fixed-duration pulses is to make the excitation pulse turn off at the full cycle, thereby shortening the dead time;

Step 312: Delay 800us after the transmission is turned off to ensure that all the transmission operations are completed, and the transceiver integrated coil 14 is switched to be connected to the preamplifier circuit 15 of the receiving system, ready to enter the signal acquisition stage;

Step 313: The STM32+FPGA transceiver main control module 2 controls the A/D conversion module 19 to sample the signal and store it in the PC host computer 1. When storing, it should be noted that the received signal corresponds to the transmission time t in step 301;

Step 314: Determine whether the current current detection is completed, if completed, continue to step 315, otherwise return to step 309;

Step 315: Determine whether to perform the detection of the next current value, and complete the current detection, otherwise return to Step 305;

Example

Now according to the actual detection, the equivalent parameters of the coil are determined to be L=0.8mH, R=1Ω. The specific implementation steps of the actual detection are as follows:

Step 301: The STM32+FPGA transceiver main control module 2 identifies the parameters and the start signal sent by the PC host computer 1, including the excitation current I _m =50A, the number of superpositions k=1, the number of emission currents M=1 and the excitation pulse frequency f =2330Hz, calculate the emission pulse time t≈39.914ms and the number of pulse cycles n=93, and return the actual excitation time t to the PC host computer 1;

Step 302: The STM32+FPGA transceiver main control module 2 controls the transceiver switch 13 to switch the transceiver integrated coil 14 to be connected to the preamplifier circuit 15 of the receiving system by controlling the switch drive module 12 in the transceiver switching device, ready to enter the gain adjustment and noise collection stage;

Step 303: The STM32+FPGA transceiver main control module 2 controls the receiving system to collect the noise signal through the transceiver integrated coil 14, and adjusts the gain of the program-controlled amplification module 17 according to the amplitude of the collected signal;

Step 304 : determine whether the gain adjustment of the program-controlled amplifying module is completed. If the adjustment is completed, continue to step 305 , otherwise, return to step 303 . The judgment basis for completing the gain adjustment is: the amplitude of the signal collected by the A/D conversion module 19 is between 1/2 of the full scale of the A/D to the full scale. Amplifier saturation is also avoided;

Step 305: The STM32+FPGA transceiver main control module 2 controls the transceiver switch 13 to switch the transceiver integrated coil 14 to connect with the H-bridge transmitting module 10 of the transmitting system through the transceiver switching device 12, ready to enter the bipolar pulse excitation stage;

Step 306: The STM32+FPGA transceiver main control module 2 calculates the excitation voltage U _S , the excitation pulse duty cycle d and the clamping voltage U _DC according to the excitation current _Im and the constraint conditions, which should satisfy:

Among them, T is the transmission pulse period, which satisfies T=1/f, R is the equivalent resistance value of the coil, L is the equivalent inductance value of the coil, and each quantity in the formula adopts the SI unit system. The constraints are:

U _DC ≤1000

0.25≤d≤0.45

最小，即储能电容功率最小，C为储能电容容值。aim to make

The smallest, that is, the power of the energy storage capacitor is the smallest, and C is the capacitance value of the energy storage capacitor.

Under the condition that the storage capacitor is 0.132F, the clamping voltage is 1000V, the duty cycle of the excitation pulse is 40.91%, and the excitation voltage is 253.76V;

Step 307: The STM32+FPGA transceiver main control module 2 adjusts the voltage value of the controllable constant voltage source 6 according to the calculated clamping voltage value U _DC ;

Step 308: Determine whether the clamping voltage reaches 1000V, if it reaches it, continue to step 309, otherwise go back to step 307;

Step 309: the STM32+FPGA transceiver main control module 2 controls the DC-DC converter 4 to charge the energy storage capacitor 5 according to the excitation voltage value;

Step 310 : judging whether the charging is completed. The basis for judging the completion of the charging is that the excitation voltage value is reached. After the charging is completed, go to Step 311 , otherwise, go back to Step 309 . It should be noted that charging must be performed after the constant voltage source is adjusted, otherwise energy loss will be caused by capacitor leakage;

Step 311: The STM32+FPGA transceiver main control module 2 controls the PWM drive to generate two drive signals (PWMA, PWMB) with a duty cycle of d and a time interval of T/2, so as to transmit and receive through the H-bridge transmitting module 10, the bidirectional diode 11 and the The integrated coil 14 emits 93 cycles of excitation pulses with a frequency of 2330 Hz;

Step 312: Delay 800us after the completion of the transmission shutdown to ensure that all the transmission operations are completed, the transmission shutdown time is only 1ms, the transceiver integrated coil 14 is switched to be connected to the preamplifier circuit 15 of the receiving system, and is ready to enter the signal acquisition stage;

Step 313: The STM32+FPGA transceiver main control module 2 controls the A/D conversion module 19 to sample the signal and store it in the PC host computer 1. When storing, it should be noted that the received signal corresponds to the transmission time t in step 301;

Step 314: Determine whether the current current detection is completed. Since the number of superposition k=1, continue to step 315;

Step 315: Determine whether to perform the detection of the next current value. Since the number of excitation currents M=1, the current detection is ended;

In addition, in order to further demonstrate the influence of the technology proposed in the present invention on the quality of the emission waveform, the excitation current waveform of the wide-harmonic magnetic resonance detection based on the PWM control technology and the excitation current waveform of the magnetic resonance detection with only wide-harmonic are given, as shown in Figure 4 shown. Among them, Figure 4a shows the waveform of excitation current for wide-harmonic magnetic resonance detection. It can be seen that the wide-harmonic excitation method can improve the problem of long detection dead time, but only the wide-harmonic excitation method will lead to the early emission period. The waveform shows a decaying trend, and the quality of the excitation waveform is poor, which affects the effective excitation. Figure 4b shows the excitation current waveform of the wide-harmonic magnetic resonance detection based on the PWM control technology. The problem of poor quality of the excitation waveform in the early stage is effectively solved, the quality of the magnetic resonance excitation waveform is improved, and the detection effect is improved.

The above descriptions are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included in the protection of the present invention. within the range.

Claims (10)

1. A wide-matching magnetic resonance detection device based on a PWM (pulse-width modulation) regulation and control technology is used for shallow magnetic resonance detection, and is characterized by comprising: PC host computer, STM32+ FPGA receiving and dispatching main control module, transmitting system, receiving and dispatching switching device, receiving and dispatching integrated coil and receiving system, wherein,

the PC upper computer is used for man-machine interaction, sending transmission parameters to the STM32+ FPGA transceiving main control module, displaying the working state and storing the acquired magnetic resonance signal data;

the transmitting system comprises a storage battery, an energy storage capacitor, a high-power diode and an H-bridge transmitting module, wherein the storage battery is charged after being converted by a DC-DC converter and is connected with the H-bridge transmitting module through the high-power diode; the STM32+ FPGA transceiving main control module drives the H-bridge transmitting module through the PWM driving module; the H-bridge transmitting module is connected to the receiving and transmitting switching device through a bidirectional diode;

the receiving system is controlled by the receiving and transmitting switching device to be connected with the receiving and transmitting integrated coil;

and the transmitting and receiving switching device controls the connection of the transmitting system or the receiving system and the transmitting and receiving integrated coil according to the instruction of the STM32+ FPGA transmitting and receiving main control module.

2. The device of claim 1, wherein the receiving system comprises a pre-amplifying circuit, a signal conditioning circuit, a program-controlled amplifying module, an LPF module and an A/D conversion module, the pre-amplifying circuit of the receiving system is connected to the transceiving switching device, and the signal is amplified through the pre-amplifying circuit and is transmitted to the STM32+ FPGA transceiving main control module after sequentially passing through the signal conditioning circuit, the program-controlled amplifying module, the LPF module and the A/D conversion module.

3. The device according to claim 3, wherein the transceiving switching device comprises a switch driving module and a transceiving switching switch, and the switch driving module controls the connection between the transmitting system or the receiving system and the transceiving integrated coil through the transceiving switching switch according to the instruction of the receiving STM32+ FPGA transceiving master control module.

4. The apparatus of claim 4,

the STM32+ FPGA transceiving master control module is used for interacting with an upper computer, calculating parameters and controlling the detection working time sequence; controlling the DC-DC converter to store the energy in the storage battery to the energy storage capacitor; adjusting the voltage value of the controllable constant voltage source; generating two paths of PWM control signals through a PWM driving module; the receiving and transmitting switch is controlled to select the connection of the receiving and transmitting integrated coil and the H-bridge transmitting module or the pre-amplification circuit through the control switch driving module; and controlling the A/D conversion module to collect the magnetic resonance signals sensed by the receiving and transmitting integrated coil, amplifying the magnetic resonance signals through the preamplification circuit, conditioning the signals through the signal conditioning circuit, amplifying the magnetic resonance signals again through the program control amplification module and filtering the magnetic resonance signals through the LPF module, and adjusting the gain of the program control amplification module.

5. The apparatus of claim 1, wherein the energy storage capacitor of the transmitting system is a high voltage high capacitance capacitor for providing energy during transmission; the high-voltage pulse at the moment of turn-off is clamped by a controllable constant-voltage source with the voltage value higher than the voltage of the energy storage capacitor, so that an IGBT (insulated gate bipolar translator) of a switching device forming the H-bridge transmitting module is protected, and the energy of a guide coil is quickly released in the dead time of the transmitting pulse.

6. The apparatus of claim 1,

the high-power diode is a reverse high-voltage fast recovery diode with a unidirectional conduction characteristic and blocks a discharge loop formed by an energy storage capacitor and an H-bridge emission module in the dead time of an excitation pulse; and prevent the controllable constant voltage source from discharging to the energy storage capacitor; isolating instantaneous pulses generated by coil discharge within the dead time of the excitation pulse and protecting the capacitor;

the low-power diode is a reverse high-voltage fast recovery diode with a unidirectional conduction characteristic, and prevents the controllable constant voltage source from discharging to the energy storage capacitor, the H-bridge transmitting module, the bidirectional diode and the coil; the controllable constant voltage source is only used for clamping in the dead time of the excitation pulse and does not release energy through the transmitting loop;

the bidirectional diode comprises two diodes which are connected in parallel in an opposite direction and used for transmitting residual energy absorption.

7. The apparatus of claim 6, wherein during the transmit phase: when a PWMA signal or a PWMB signal sent by the PWM driving module is effective, a group of IGBTs in the H-bridge transmitting module are conducted, an energy storage capacitor, a high-power diode, a group of IGBTs, a bidirectional diode and a receiving and transmitting integrated coil which is equivalent to a series connection of an inductor L and a resistor R form a loop, and the controllable constant voltage source Ur is equivalent to open circuit due to the unidirectional conductivity of the low-power diode; when the PWMA signal and the PWMB signal are invalid, the excitation pulse dead time is entered, because of the one-way conductivity of the high-power diode, the energy storage capacitor is equivalent to open circuit in the period, and the energy release loop of the receiving and transmitting integrated coil is composed of an H-bridge transmitting module, a low-power diode and a controllable constant voltage source, so that the purposes of equal-amplitude high-quality waveform transmission and quick turn-off are realized.

8. A wide-band resonance detection method based on a PWM (pulse-width modulation) regulation technology is characterized by comprising the following steps of:

step 301: the STM32+ FPGA transceiving main control module identifies parameters and working start signals sent by a PC upper computer and comprises an excitation current I_mThe number M of the emission currents, the number k of the superposition times and the excitation pulse frequency f are calculated, the emission pulse time t and the number n of pulse periods are calculated, and the actual excitation time t is transmitted back to the PC upper computer, wherein M and n are positive integers;

step 302: the STM32+ FPGA transceiving main control module controls a transceiving switch to switch a transceiving integrated coil to be connected with a pre-amplification circuit of a receiving system by controlling a switch driving module in the transceiving switching device so as to prepare to enter a gain adjustment and noise acquisition stage;

step 303: the STM32+ FPGA transceiving main control module controls the receiving system to collect noise signals through the transceiving integrated coil, and adjusts the gain of the program control amplification module according to the amplitude of the collected signals;

step 304: judging whether the gain adjustment of the program control amplification module is finished, if so, continuing to enter the step 305, otherwise, returning to the step 303, and judging the basis for finishing the gain adjustment is as follows: the signal amplitude acquired by the A/D conversion module is between 1/2 full scale and full scale of A/D;

step 305: the STM32+ FPGA transceiving main control module controls a transceiving selector switch through a transceiving selector device to switch a transceiving integrated coil to be connected with an H-bridge transmitting module of a transmitting system to prepare for entering a bipolar pulse excitation stage;

step 306: STM32+ FPGA transceiver main control module according to excitation current I_mAnd calculating the excitation voltage U according to the constraint condition_SDuty cycle d of excitation pulse and clamping voltage U_DC；

Step 307: the STM32+ FPGA transceiving main control module adjusts the voltage value of the controllable constant voltage source according to the calculated clamping voltage value UDC;

step 308: judging whether the clamping voltage reaches a clamping voltage value UDC, if so, continuing to enter a step 309, otherwise, returning to the step 307;

step 309: the STM32+ FPGA transceiving main control module controls the DC-DC converter to charge the energy storage capacitor according to the excitation voltage value;

step 310: judging whether the charging is finished or not, if the judgment basis of finishing the charging is that the excitation voltage value is reached, entering step 311 if the charging is finished, otherwise returning to step 309;

step 311: STM32+ FPGA receives and dispatches the master control module control PWM drive and produce two routes of duty ratio and be d, time interval T/2's drive signal, through H bridge transmitting module, bidirectional diode and the integrative coil transmission n cycles of receiving and dispatching, the excitation pulse of frequency is f. The purpose of emitting pulses of n cycles instead of fixed duration is to turn off the excitation pulses at the whole cycle, thereby reducing the dead time;

step 312: delaying for 800us after the transmission is turned off to ensure that all transmission actions are completed, switching the receiving and transmitting integrated coil to be connected with a pre-amplification circuit of a receiving system, and preparing to enter a signal acquisition stage;

step 313: the STM32+ FPGA transceiving main control module controls the A/D conversion module to sample signals and store the signals to the PC upper computer, and the received signals correspond to the transmitting time t in the step 301 during storage;

step 314: judging whether current detection is finished, if so, continuing to enter step 315, otherwise, returning to step 309;

step 315: and judging whether to detect the next current value or not, finishing the detection, and returning to the step 305 if not.

9. The method of claim 8, wherein step 306: STM32+ FPGA transceiver main control module according to excitation current I_mAnd calculating the excitation voltage U according to the constraint condition_SDuty cycle d of excitation pulse and clamping voltage U_DCAnd satisfies the following conditions:

wherein, T is the transmission pulse cycle, satisfies T1/f, and R is coil equivalent resistance value, and L is coil equivalent inductance value, and each volume all adopts SI unit system in the formula, and the constraint condition is:

U_DC≤1000

0.25≤d≤0.45

the aim is to make

And C is the capacitance value of the energy storage capacitor.

10. The method of claim 8, wherein step 310: the charging is performed after the constant voltage source adjustment.

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