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CN110444540A - Fan-out-type semiconductor package part - Google Patents

Fan-out-type semiconductor package part Download PDF

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Publication number
CN110444540A
CN110444540A CN201910038219.3A CN201910038219A CN110444540A CN 110444540 A CN110444540 A CN 110444540A CN 201910038219 A CN201910038219 A CN 201910038219A CN 110444540 A CN110444540 A CN 110444540A
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CN
China
Prior art keywords
fan
type semiconductor
semiconductor package
package part
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910038219.3A
Other languages
Chinese (zh)
Other versions
CN110444540B (en
Inventor
韩美子
金汉�
朴盛灿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
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Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN110444540A publication Critical patent/CN110444540A/en
Application granted granted Critical
Publication of CN110444540B publication Critical patent/CN110444540B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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Abstract

The present invention provides a kind of fan-out-type semiconductor package part, and the fan-out-type semiconductor package part includes: connecting elements, including insulating layer and redistribution layer；Semiconductor chip is arranged on the connecting elements；Encapsulation agent encapsulates the semiconductor chip；And electromagnetic radiation barriers, it is arranged above the semiconductor chip and including basal layer and porous block portion, is formed with multiple gas vents in the basal layer, the porous block portion is filled in the multiple gas vent.

Description

Fan-out-type semiconductor package part
This application claims the 10-2018-0051915 South Korea submitted on May 4th, 2018 in Korean Intellectual Property Office The disclosure of the equity of the priority of patent application, the South Korea patent application is all incorporated herein by reference.
Technical field
This disclosure relates to which a kind of semiconductor package part, may extend into more particularly, to a kind of electric connection structure and is provided with The fan-out-type semiconductor package part of the outside in the region of semiconductor chip.
Background technique
The important recent trend for being related to the technology development of semiconductor chip has been the size for reducing semiconductor chip.Cause This, in encapsulation technology field, as the demand of semiconductor chip to small size etc. quicklys increase, it has been necessary to realize a kind of exist With the semiconductor package part of compact size while including multiple pins.
The seed type to meet the semiconductor packaging of above-mentioned technical need proposed is fan-out-type semiconductor packages Part.Such fan-out package part has compact dimensioning, and allows to be provided with by being redistributed to connection terminal Multiple pins are realized in the outside in the region of semiconductor chip.
In semiconductor package part, when electromagnetic radiation has an impact to semiconductor chip etc., in fact it could happen that problem.Therefore, Effective electromagnetic radiation barrier structure is needed in semiconductor package part.
Summary of the invention
The one side of the disclosure can provide a kind of fan-out-type semiconductor package part, in the fan-out-type semiconductor package part In, electromagnetic radiation barrier effectiveness can be high and can be effectively removed issuable gas in product.
According to one aspect of the disclosure, a kind of fan-out-type semiconductor package part can include: connecting elements, including insulating layer With redistribution layer；Semiconductor chip is arranged on the connecting elements；Encapsulation agent encapsulates the semiconductor chip；And electricity Magnetic radiation barrier layer, is arranged above the semiconductor chip and including basal layer and porous block portion, in the basal layer Multiple gas vents are formed with, the porous block portion is filled in the multiple gas vent.
The porous block portion can have the form of multiple Particulate accumulations.
The porous block portion can be porous coating.
The basal layer can have metallic film form.
The basal layer can be copper coating.
The electromagnetic radiation barriers may include first area and second area, and in the first area described in The density of gas vent can be higher than the density of the gas vent in the second region.
The second area may be provided in region corresponding with the semiconductor chip.
The fan-out-type semiconductor package part may also include core component, and the core component includes accommodating the semiconductor chip Through-hole and covering formed the through-hole wall metal layer.
The metal layer and the electromagnetic radiation barriers of the core component can pass through the conduction across the encapsulation agent Via hole is connected to each other.
The fan-out-type semiconductor package part may also include the multiple passive blocks being arranged on the connecting elements.
The first area may be provided in region corresponding at least some of the multiple passive block.
But from the upper surface of at least some of the multiple passive block to the upper surface of the encapsulation agent distance that This is different, and the density of the gas vent with the multiple passive block among the upper surface slave passive block to described The upper surface of encapsulation agent has can be higher in the corresponding region of the passive block of bigger distance.
The multiple passive block may include capacitor and inductor, and in region corresponding with the capacitor The gas vent density can be higher than region corresponding with the inductor in the gas vent density.
According to another aspect of the present disclosure, a kind of fan-out-type semiconductor package part can include: connecting elements, including insulating layer With redistribution layer；Semiconductor chip is arranged on the connecting elements；Encapsulation agent encapsulates the semiconductor chip；And electricity Magnetic radiation barrier layer is arranged above the semiconductor chip and has porous structure.
The electromagnetic radiation barriers can have the form of multiple Particulate accumulations.
The electromagnetic radiation barriers can be porous coating.
Detailed description of the invention
By the detailed description below in conjunction with attached drawing, above and other aspects, the feature and advantage of the disclosure will be by more clear Understand to Chu, in the accompanying drawings:
Fig. 1 is the exemplary schematic block diagram for showing electronic apparatus system；
Fig. 2 is the exemplary perspective schematic view for showing electronic device；
Fig. 3 A and Fig. 3 B are the signals for showing state of the fan-in type semiconductor package part before being packaged and after encapsulation Property sectional view；
Fig. 4 is the schematic sectional view for showing the packaging technology of fan-in type semiconductor package part；
Fig. 5 is to show fan-in type semiconductor package part to be mounted on intermediary substrate and be finally mounted on the master of electronic device The schematic sectional view of situation on plate；
Fig. 6 is the mainboard for showing fan-in type semiconductor package part in intermediary substrate and being finally mounted on electronic device On situation schematic sectional view；
Fig. 7 is the schematic sectional view for showing fan-out-type semiconductor package part；
Fig. 8 is the schematic cross-sectional for showing the situation that fan-out-type semiconductor package part is mounted on the mainboard of electronic device Figure；
Fig. 9 and Figure 10 is to show showing for fan-out-type semiconductor package part according to the exemplary embodiment in the present disclosure respectively Meaning property sectional view and schematic plan view；
Figure 11 be show can the forms of used in the exemplary embodiment of Fig. 9 and Figure 10 electromagnetic radiation barriers show Figure；
Figure 12 is the sectional view for showing fan-out-type semiconductor package part according to another exemplary embodiment in the present disclosure； And
Figure 13 and Figure 14 is that show can be in the shape of electromagnetic radiation barriers used in the another exemplary embodiment of Figure 12 The diagram of formula.
Specific embodiment
Hereinafter, the exemplary embodiment in the disclosure is described with reference to the accompanying drawings.In the accompanying drawings, for the sake of clarity, It can exaggerate or shorten shape, the size etc. of component.
Here, downside relevant to the section of attached drawing, lower part, lower surface etc. are for referring to towards fan-out-type semiconductor package part Mounting surface direction, and upside, top, upper surface etc. for refer to the party in the opposite direction.However, these directions are It defines for ease of description, the direction concrete restriction that claim is not defined as described above.
In the description, component and the meaning of " connection " of another component conceptually include by between adhesive layer in succession Connect and two components between be directly connected to.In addition, " electrical connection " conceptually includes that physical connection and physics disconnect.It can manage Solution, when using such as term of " first " and " second " to refer to element, thus which is not limited.They can only be used In the purpose for mutually distinguishing element with other elements, and can not restriction element sequence or importance.In some cases, In In the case where not departing from the scope of the claims set forth herein, first element is referred to alternatively as second element.Similarly, second Element is also referred to as first element.
Term " exemplary embodiment " as used herein does not refer to same exemplary embodiment, and is provided to prominent and another The different specific feature or characteristic of the feature or characteristic of one exemplary embodiment.However, exemplary embodiment provided herein It is believed to realize by all combining each other or part combining.For example, unless there is provided herein opposite or contradict Description, though otherwise element described in specific exemplary embodiment its do not retouched in a further exemplary embodiment It states, also is understood as description relevant to another exemplary embodiment.
Term as used herein is only used for description exemplary embodiment, rather than limits the disclosure.In this case, unless It is in addition explained in context, otherwise singular includes plural form.
Electronic device
Fig. 1 is the exemplary schematic block diagram for showing electronic apparatus system.
Referring to Fig.1, electronic device 1000 can accommodate mainboard 1010 wherein.Mainboard 1010 may include physical connection or It is electrically connected to its chip associated component 1020, network-related components 1030, other assemblies 1040 etc..These components can be by each Kind signal wire 1090, which is connected to, will be described below other assemblies.
Chip associated component 1020 can include: memory chip, such as volatile memory are (for example, dynamic randon access Memory (DRAM)), nonvolatile memory (for example, read-only memory (ROM)), flash memory etc.；Application processor chip, such as Central processing unit (for example, central processing unit (CPU)), graphics processor (for example, graphics processing unit (GPU)), number letter Number processor, cipher processor, microprocessor, microcontroller etc.；And logic chip, such as analog-digital converter (ADC), Specific integrated circuit (ASIC) etc..However, chip associated component 1020 is without being limited thereto, but it may also include other kinds of chip Associated component.In addition, chip associated component 1020 can be combined with each other.
Network-related components 1030 may include the component being designated as according to agreement operation such as below: Wireless Fidelity (Wi-Fi) (802.11 race of electrotechnical, electronic Association of Engineers (IEEE) etc.), World Interoperability for Microwave Access, WiMax (WiMAX) (IEEE 802.16 races etc.), IEEE 802.20, long term evolution (LTE), evolution data optimization (Ev-DO), high-speed packet access+ (HSPA+), high-speed downlink packet access+(HSDPA+), High Speed Uplink Packet access+(HSUPA+), enhanced number According to gsm environment (EDGE), global system for mobile communications (GSM), global positioning system (GPS), General Packet Radio Service (GPRS), CDMA (CDMA), time division multiple acess (TDMA), digital European cordless telecommunications (DECT), bluetooth, 3G agreement, 4G Agreement and 5G agreement and any other wireless protocols specified after above-mentioned agreement and wire line protocols.However, network is related Component 1030 is without being limited thereto, but may also include be designated as according to various other wireless standards or agreement or wired standards or The component of agreement operation.In addition, network-related components 1030 can be combined with each other together with said chip associated component 1020.
Other assemblies 1040 may include inductor in high frequency, ferrite inductor, power inductor, ferrite bean, low temperature Common burning porcelain (LTCC), electromagnetic interference (EMI) filter, multilayer ceramic capacitor (MLCC) etc..However, other assemblies 1040 are not It is limited to this, but may also include passive block etc. for various other purposes.In addition, other assemblies 1040 can be with said chip Associated component 1020 or network-related components 1030 are combined with each other together.
According to the type of electronic device 1000, electronic device 1000 may include that physical connection or can be electrically connected to mainboard 1010 Or it can other assemblies not in physical connection or being electrically connected to mainboard 1010.These other assemblies may include such as camera 1050, Antenna 1060, display 1070, battery 1080, audio codec (not shown), Video Codec (not shown), power are put Big device (not shown), compass (not shown), accelerometer (not shown), gyroscope (not shown), loudspeaker (not shown), great Rong Measure storage unit (for example, hard disk drive) (not shown), CD (CD) driver (not shown), digital versatile disc (DVD) Driver (not shown) etc..However, these other assemblies are without being limited thereto, but can also according to type of electronic device 1000 etc. and Including other assemblies for numerous purposes.
Electronic device 1000 can be smart phone, personal digital assistant (PDA), digital camera, digital camera, network System, computer, monitor, tablet PC, PC on knee, net book PC, television set, video game machine, smartwatch, automobile group Part etc..However, electronic device 1000 is without being limited thereto, and it can be other any electronic devices of processing data.
Fig. 2 is the exemplary perspective schematic view for showing electronic device.
Referring to Fig. 2, semiconductor package part can be in various electronic devices 1000 as described above for numerous purposes.Example Such as, motherboard 1110 may be housed in the main body 1101 of smart phone 1100, and various electronic building bricks 1120 can physical connection or Person is electrically connected to motherboard 1110.In addition, can physical connection or be electrically connected to motherboard 1110 or can it is not in physical connection or electrical connection Other assemblies (such as, camera model 1130) to motherboard 1110 may be housed in main body 1101.One in electronic building brick 1120 It can be chip associated component, and semiconductor package part 1121 can be the application processing among such as chip associated component Device, but not limited to this.Electronic device is not necessarily limited to smart phone 1100, and can be other electronics dress as described above It sets.
Semiconductor package part
In general, being integrated with a large amount of microelectronic circuit in semiconductor chip.However, semiconductor chip itself possibly can not be used Make the semiconductor product of finished product, and may be damaged due to external physical impact or chemical shock.Therefore, semiconductor Chip itself may not be used, and semiconductor chip can be packaged and be made in electronic device etc. in the state of encapsulation With.
Here, for electrical connection, since the circuit width between semiconductor chip and the mainboard of electronic device is in the presence of poor It is different, it is therefore desirable to semiconductor packages.In detail, the connection pad of the size of the connection pad of semiconductor chip and semiconductor chip Between spacing it is very tiny, and the component of the mainboard used in an electronic installation pad size and mainboard component peace Spacing between welding equipment disk is noticeably greater than between the size of connection pad of semiconductor chip and the connection pad of semiconductor chip Spacing.Thus it can be difficult to semiconductor chip is directly installed on mainboard, and need for alleviate semiconductor chip and The encapsulation technology of the difference of circuit width between mainboard.
Fan-in type semiconductor package can be divided into according to its structure and purpose by the semiconductor package part that encapsulation technology manufactures Piece installing and fan-out-type semiconductor package part.
Hereinafter, fan-in type semiconductor package part and fan-out-type semiconductor packages are more fully described with reference to the accompanying drawings Part.
Fan-in type semiconductor package part
Fig. 3 A and Fig. 3 B are the signals for showing state of the fan-in type semiconductor package part before being packaged and after encapsulation Property sectional view.
Fig. 4 is the schematic sectional view for showing the packaging technology of fan-in type semiconductor package part.
Referring to Fig. 3 A to Fig. 4, semiconductor chip 2220 can be the integrated circuit (IC) for instance in naked state, and wrap It includes: main body 2221, including silicon (Si), germanium (Ge), GaAs (GaAs) etc.；Pad 2222 is connected, the one of main body 2221 is formed in On a surface, and the conductive material including aluminium (Al) etc.；And the passivation layer of oxide skin(coating), nitride layer etc. 2223, it is formed on a surface of main body 2221 and covers connection pad 2222 at least partly.In this case, by It may be very small in connection pad 2222, it is thus possible to be difficult to for integrated circuit (IC) to be mounted on the printing electricity of medium size grade On mainboard of road plate (PCB) and electronic device etc..
Therefore, according to the size of semiconductor chip 2220, connecting elements 2240 can be formed on semiconductor chip 2220, with Make to connect the redistribution of pad 2222.Connecting elements 2240 can be formed as follows: be set using such as photoimageable dielectric (PID) The insulating materials of rouge forms insulating layer 2241 on semiconductor chip 2220, and formation makes to connect the open via hole of pad 2222 Then 2243h forms wiring pattern 2242 and via hole 2243.Then, the passivation layer 2250 of protection connecting elements 2240 can be formed, Opening 2251 can be formed, and Underbump metallization layer 2260 can be formed etc..That is, can include by series of process manufacture Such as semiconductor chip 2220, connecting elements 2240, passivation layer 2250 and Underbump metallization layer 2260 fan-in type semiconductor package Piece installing 2200.
As described above, fan-in type semiconductor package part can have all connection pads of semiconductor chip (for example, defeated Enter/export (I/O) terminal) be arranged in semiconductor chip inside packaging part form, can have excellent electrical characteristics, and can It is produced according to low cost.Therefore, many elements in smart phone are mounted on according to fan-in type semiconductor package part form To manufacture.In detail, many elements being mounted in smart phone have been developed to real while with compact dimensioning Now quick signal transmission.
However, in fan-in type semiconductor package part, since all I/O terminal needs are arranged in semiconductor chip Portion, therefore fan-in type semiconductor package part has very large space limitation.Accordingly, it is difficult to this structure is applied to have a large amount of I/O terminal semiconductor chip or semiconductor chip with compact size.In addition, possibly can not due to disadvantages mentioned above Fan-in type semiconductor package part is mounted directly and used on the mainboard of electronic device.The reason is that: even if the I/O of semiconductor chip Spacing between the size of terminal and the I/O terminal of semiconductor chip is increased by redistribution technique, semiconductor chip Spacing between the size of I/O terminal and the I/O terminal of semiconductor chip may be still not enough to fan-in type semiconductor package part It is directly installed on the mainboard of electronic device.
Fig. 5 is to show fan-in type semiconductor package part to be mounted on intermediary substrate and be finally mounted on the master of electronic device The schematic sectional view of situation on plate.
Fig. 6 is the mainboard for showing fan-in type semiconductor package part in intermediary substrate and being finally mounted on electronic device On situation schematic sectional view.
Referring to Fig. 5, in fan-in type semiconductor package part 2200, the connection pad 2222 of semiconductor chip 2220 is (that is, I/ O terminal) it can be redistributed by intermediary substrate 2301, and intermediary substrate is mounted in fan-in type semiconductor package part 2200 In the state of on 2301, fan-in type semiconductor package part 2200 can be finally mounted on the mainboard 2500 of electronic device.This In the case of, soldered ball 2270 etc. can be fixed by underfill resin 2280 Deng, and the outside of semiconductor chip 2220 is available The covering such as molding material 2290.Optionally, referring to Fig. 6, fan-in type semiconductor package part 2200 can be embedded in individual intermediary substrate In 2302, in the state that fan-in type semiconductor package part 2200 is in intermediary substrate 2302, the company of semiconductor chip 2220 Connecing pad 2222 (that is, I/O terminal) can be redistributed by intermediary substrate 2302, and fan-in type semiconductor package part 2200 can Finally it is mounted on the mainboard 2500 of electronic device.
As described above, it may be difficult to be mounted directly and use fan-in type semiconductor package part on the mainboard of electronic device. Therefore, then fan-in type semiconductor package part is mountable is mounted on electronic device by packaging technology on individual intermediary substrate Mainboard on, or can pacify on the mainboard of electronic device in the state that fan-in type semiconductor package part is in the intermediary substrate Fill and use fan-in type semiconductor package part.
Fan-out-type semiconductor package part
Fig. 7 is the schematic sectional view for showing fan-out-type semiconductor package part.
Referring to Fig. 7, in fan-out-type semiconductor package part 2100, for example, the outside of semiconductor chip 2120 can pass through packet It seals agent 2130 to protect, and the connection pad 2122 of semiconductor chip 2120 can be redistributed to by connecting elements 2140 and partly be led The outside of body chip 2120.In this case, passivation layer 2150 can also be formed on connecting elements 2140, and golden under convex block Belonging to layer 2160 can also be formed in the opening of passivation layer 2150.Soldered ball 2170 can also be formed on Underbump metallization layer 2160.Half Conductor chip 2120 can be the integrated circuit (IC) including main body 2121, connection pad 2122, passivation layer (not shown) etc..Even Connection member 2140 can include: insulating layer 2141；Layer 2142 is redistributed, is formed on insulating layer 2141；And via hole 2143, make Connection pad 2122 and redistribution layer 2142 are electrically connected to each other.
As described above, fan-out-type semiconductor package part can have the I/O terminal of semiconductor chip by being formed in semiconductor Connecting elements on chip redistributes and is arranged in the form of the outside of semiconductor chip.As described above, in fan-in type half In conductor packaging part, all I/O terminals of semiconductor chip need to be arranged in the inside of semiconductor chip.Therefore, when partly leading When the size of body chip reduces, the size and pitch of ball need to reduce, so that possibly in fan-in type semiconductor package part can not It is laid out using standardized ball.On the other hand, as described above, fan-out-type semiconductor package part has the end I/O of semiconductor chip Son is by way of forming connecting elements on a semiconductor die and redistributing and the outside of semiconductor chip is arranged in.Cause This, even if can still be used as it is in fan-out-type semiconductor package part in the case where the size of semiconductor chip reduces Standardized ball layout, so that fan-out-type semiconductor package part can be mounted on electricity in the case where not using individual intermediary substrate On the mainboard of sub-device, as described below.
Fig. 8 is the schematic cross-sectional for showing the situation that fan-out-type semiconductor package part is mounted on the mainboard of electronic device Figure.
Referring to Fig. 8, fan-out-type semiconductor package part 2100 can be mounted on the mainboard of electronic device by soldered ball 2170 etc. On 2500.That is, as described above, fan-out-type semiconductor package part 2100 includes connecting elements 2140, connecting elements 2140 It is formed on semiconductor chip 2120 and can make to connect the size that pad 2122 is redistributed to semiconductor chip 2120 External fan-out area, so that can be laid out as it is using standardized ball in fan-out-type semiconductor package part 2100.Knot Fruit, fan-out-type semiconductor package part 2100 can be mounted on the master of electronic device without using individual intermediary substrate etc. On plate 2500.
As noted previously, as fan-out-type semiconductor package part can be mounted in the case where not using individual intermediary substrate On the mainboard of electronic device, therefore fan-out-type semiconductor package part can be according to the fan-in type semiconductor packages than using intermediary substrate The small thickness of the thickness of part is realized.Therefore, fan-out-type semiconductor package part can be miniaturized and slimming.In addition, fan-out-type half Conductor packaging part has excellent thermal characteristics and electrical characteristics, makes it especially suitable for mobile product.Therefore, fan-out-type semiconductor Packaging part can be according to the more compact form of form than using common laminate packaging (POP) type of printed circuit board (PCB) It realizes, and can solve the problems, such as due to caused by the generation of warping phenomenon.
In addition, fan-out-type semiconductor packages refers to as described above for semiconductor chip to be mounted on electronic device Mainboard etc. is upper and protects semiconductor chip from the encapsulation technology of the influence of external impact, and is and such as intermediary substrate Printed circuit board (PCB) etc. (there is the specification different from the specification of fan-out-type semiconductor package part, purposes etc., purposes etc., and With the fan-in type semiconductor package part being embedded) the different concept of concept.
Hereinafter, fan-out-type semiconductor packages according to the exemplary embodiment in the present disclosure is described with reference to the accompanying drawings Part.
Fig. 9 and Figure 10 is to show showing for fan-out-type semiconductor package part according to the exemplary embodiment in the present disclosure respectively Meaning property sectional view and schematic plan view.Figure 11 is to show the electromagnetism spoke used in the exemplary embodiment of Fig. 9 and Figure 10 Penetrate the diagram of the form on barrier layer.
Firstly, fan-out-type semiconductor package part 100 accoding to exemplary embodiment may include partly leading referring to Fig. 9 and Figure 10 Body chip 120, encapsulation agent 130, connecting elements 140 and electromagnetic radiation barriers 131.Electromagnetic radiation barriers 131 can have more Pore structure is to provide gas exhaust path.In addition, fan-out-type semiconductor package part 100 may include core component 110, it is additional passive Component 121 and 122, passivation layer 150 and 180, Underbump metallization layer 160, electric connection structure 170 etc..
Connecting elements 140 can be such that the connection pad 120P of semiconductor chip 120 redistributes.In addition, when passive group of setting When part 121 and 122, connecting elements 140 can make semiconductor chip 120 be electrically connected to each other with passive block 121 and 122.For reality Existing such function, connecting elements 140 may include insulating layer 141, the redistribution layer 142 being arranged on insulating layer 141 and Across insulating layer 141 and make to redistribute the via hole 143 that is connected to each other of layer 142.Connecting elements 140 can be formed using single layer, Or multiple layers more than the quantity shown in the drawings formation of its quantity can be utilized.
The material for constituting insulating layer 141 can be such as photosensitive insulating material.That is, insulating layer 141 can be light Quick insulating layer.When insulating layer 141 has photo-sensitive characteristic, insulating layer 141 may be formed to have lesser thickness, and can more hold It changes places and realizes the finer pitch of via hole 143.Insulating layer 141 can be the photosensitive insulating layer including insulating resin and inorganic filler. When insulating layer 141 is multilayer, the material of insulating layer 141 can be mutually the same, and if desired, can also be different from each other.When exhausted When edge layer 141 is multilayer, insulating layer 141 can be integrated with each other according to technique, so that the boundary between insulating layer 141 can also be with It is unobvious.
Redistribution layer 142 can be used for making to connect pad 120P redistribution.Redistribute material in each of layer 142 It can be such as copper (Cu), aluminium (Al), silver-colored (Ag), tin (Sn), golden (Au), nickel (Ni), lead (Pb), titanium (Ti) or their alloy Conductive material.Redistribution layer 142 can be performed various functions according to the design of corresponding layer.For example, redistribution layer 142 can Including grounding pattern, electric power pattern, signal pattern etc..Here, signal pattern may include in addition to grounding pattern, electric power pattern etc. it The various signal patterns of outer data-signal pattern etc..In addition, redistribution layer 142 may include via pad, connecting pin Sub- pad etc..
Via hole 143 can make to be formed redistribution layer 142 on the different layers, connection pad 120P etc. and be electrically connected to each other, from And electrical communication path is formed in fan-out-type semiconductor package part 100.Material in each of via hole 143 can be such as copper (Cu), the conductive material of aluminium (Al), silver-colored (Ag), tin (Sn), golden (Au), nickel (Ni), lead (Pb), titanium (Ti) or their alloy. Each of via hole 143 can also be formed completely filled with conductive material or conductive material along wall in each of via hole. In addition, each of via hole 143 can have any shape of conical by its shape well known in the prior art, cylindrical etc. Shape.
Semiconductor chip 120 may be provided on connecting elements 140 and can be integrated circuit (IC).Semiconductor chip 120 can be such as such as central processing unit (for example, CPU), graphics processor (for example, GPU), field programmable gate array (FPGA), the processor chips of digital signal processor, cipher processor, microprocessor, microcontroller etc. are (more specifically, answer With processor (AP)), but not limited to this.
Semiconductor chip 120 can be formed on the basis of effective wafer.In this case, the master of semiconductor chip 120 The basis material of body can be silicon (Si), germanium (Ge), GaAs (GaAs) etc..Various circuits may be formed in main body.Connection weldering Disk 120P can make semiconductor chip 120 be electrically connected to other assemblies.Material in each of connection pad 120P can be such as The conductive material of aluminium (Al) etc..It may be formed at the passivation layer for connecting pad 120P exposure in main body, and can be oxide The bilayer of layer, nitride layer etc. or oxide skin(coating) and nitride layer.Insulating layer etc. may further be provided in required position. Semiconductor chip 120 can be bare die, but if necessary, it can further comprise the redistribution being formed on its active surface Layer.
Other than semiconductor chip 120, passive block 121 and 122 be may be provided on connecting elements 140, and passive The example of component 121 and 122 may include inductor 121, capacitor 122 etc..In this case, in passive block 121 and 122 Some have different sizes.For example, the size of inductor 121 can be greater than the size of capacitor 122.In addition to such ruler Except very little difference, due to the characteristic of component, the necessity of block electromagnetic radiation is greater than in capacitor 122 in inductor 121 The necessity of block electromagnetic radiation.Therefore, in the present example embodiment, electromagnetic radiation barriers 131 are designed to be suitable for Inductor 121, and related content is described below.Other than inductor 121 and capacitor 122,121 He of passive block 122 may include resistor element.
Encapsulation agent 130 can encapsulation of semiconductor chip 120, passive block 121 and 122 etc..Encapsulation agent 130 may include insulation material Material.Insulating materials can be insulating resin or the material including inorganic filler and insulating resin, for example, the heat of such as epoxy resin Thermosetting resin, the thermoplastic resin of such as polyimide resin, the reinforcing material of such as inorganic filler be immersed in thermosetting resin or Resin (such as, ABF (Ajinomoto Build up Film), FR-4, Bismaleimide Triazine in thermoplastic resin (BT) etc.).In addition, the molding material of any of epoxy-plastic packaging material (EMC) etc. can be used, and if necessary, it can It uses photosensitive encapsulation agent (PIE).Optionally, the insulating resin of such as thermosetting resin or thermoplastic resin is immersed in inorganic filler And/or the material in the core material of such as glass fibre (or glass cloth or glass fabric) also is used as insulating materials.
Core component 110 may be provided on connecting elements 140, and can have the through-hole for accommodating semiconductor chip 120 etc..In In this case, settable multiple through-holes in core component 110.Core component 110 can further improve fan-out-type semiconductor packages The rigidity of part 100, and the uniformity of the thickness for ensuring encapsulation agent 130.The material of core component 110 is not specifically limited. For example, insulating materials can be used as the material of core component 110.In this case, insulating materials can be such as epoxy resin Thermoplastic resin, thermosetting resin or the thermoplastic resin of thermosetting resin, such as polyimide resin are together with inorganic filler Be immersed in such as core material of glass fibre (or glass cloth or glass fabric) resin (for example, prepreg, ABF, FR-4, BT etc.).Optionally, PID resin also is used as insulating materials.
Core component 110 may include the metal layer 111 for the wall that covering forms through-hole.Metal layer 111 can effectively stop from half The electromagnetic radiation that conductor chip 120 and passive block 121 and 122 emit.In form as depicted in the figures, metal layer 111 may extend into the upper and lower surfaces of core component 110, and can be connected by passing through the conductive via 112 of encapsulation agent 130 To electromagnetic radiation barriers 131.
Electromagnetic radiation barriers 131 may be provided at the top of semiconductor chip 120 etc., and can have porous structure.Electricity Magnetic radiation barrier layer 131 may include the material for performing effectively electromagnetic radiation barrier functionality, for example, the metal of Cu, Ag, Ti etc. Ingredient.When by the way that metal layer 111 and the setting of electromagnetic radiation barriers 131 are enhanced electromagnetism near semiconductor chip 120 etc. When radiation blocking effect, the gas generated in encapsulation agent 130 etc. can be difficult to externally discharged.In the present example embodiment, electric Magnetic radiation barrier layer 131 is formed as porous structure, with effectively discharge gas.In form as shown in Figure 11, electromagnetism The form that radiant barrier 131 can have multiple particle P to gather can form gap V between particle P, and gas can pass through sky Gap enters or goes out.The porous structure of electromagnetic radiation barriers 131 can be realized by controlling size, quantity of particle etc., be made Multiple granulateds are obtained into congeries, and if desired, adhesive can be between particle P.Other than such method, electricity Magnetic radiation barrier layer 131 can be realized by plating technic, in the form of with porous coating.Such as in the present example embodiment, Electromagnetic radiation barriers 131 are formed as porous structure, to inhibit the electromagnetic radiation from transmittings such as semiconductor chips 120 significantly Barrier effectiveness reduction, and effective gas exhaust path is provided, thus when driving fan-out-type semiconductor package part 100 Improve the stability of fan-out-type semiconductor package part 100.
Passivation layer 150 can protect connecting elements 140 not by external physical damage or chemical damage.Passivation layer 150 can have Make at least partly exposed opening of the redistribution layer 142 of connecting elements 140.It is formed in the number of the opening in passivation layer 150 Amount can be tens of to thousands of.Passivation layer 150 may include insulating resin and inorganic filler, but may not include glass fibre.Example Such as, passivation layer 150 can be formed using ABF, but not limited to this.
Underbump metallization layer 160 can improve the connection reliability of electric connection structure 170, to improve fan-out-type semiconductor packages The board level reliability of part 100.Underbump metallization layer 160 may be connected to the opening exposure by passivation layer 150 of connecting elements 140 Redistribution layer 142.Underbump metallization layer 160 can be used any of such as golden by any of method for metallising The conductive material of category is formed in the opening of passivation layer 150, but not limited to this.
In addition electric connection structure 170 can be configured to make 100 physical connection of fan-out-type semiconductor package part or is electrically connected to It is external.For example, fan-out-type semiconductor package part 100 can be mounted on the mainboard of electronic device by electric connection structure 170.It is electrically connected Each of binding structure 170 is formed using the conductive material such as solder.However, this is only example, and the binding that is electrically connected Material in each of structure 170 is not particularly limited to this.Each of electric connection structure 170 can be pad, ball, pin etc.. Electric connection structure 170 is formed as multilayered structure or single layer structure.When electric connection structure 170 is formed as multilayered structure, it is electrically connected Binding structure 170 may include copper (Cu) column and solder.When electric connection structure 170 is formed as single layer structure, electric connection structure 170 can Including tin-silver solder or copper (Cu).However, this is only example, and electric connection structure 170 is without being limited thereto.Electric connection structure 170 Quantity, spacing, arrangement form etc. be not specifically limited, and can fully be repaired according to design details by those skilled in the art Change.For example, electric connection structure 170 can be arranged with tens of to thousands of quantity, Huo Zheke according to the quantity of connection pad 120P With the setting of tens of to thousands of or more or tens of to thousands of or less quantity.
At least one of electric connection structure 170 may be provided in fan-out area.Fan-out area is referred in addition to being provided with Region except the region of semiconductor chip 120.Compared with fan-in type packaging part, fan-out package part can have excellent reliable Property, it can be achieved that multiple input/output (I/O) terminal, and can promote 3D interconnection.In addition, with ball grid array (BGA) packaging part, Grid array (LGA) packaging part etc. is compared, and fan-out package part can be manufactured such that with small thickness, and can have price competing Strive power.
Passivation layer 180 may be provided on electromagnetic radiation barriers 131 and protect electromagnetic radiation barriers 131 not by outside Physical damage or chemical damage.Passivation layer 180 may include insulating resin and inorganic filler, but may not include glass fibre.Example Such as, passivation layer 180 can be formed using ABF, but not limited to this.
Figure 12 is the sectional view for showing fan-out-type semiconductor package part according to another exemplary embodiment in the present disclosure. Figure 13 and Figure 14 is that show can be in the diagram of the form of electromagnetic radiation barriers used in the another exemplary embodiment of Figure 12. In the present example embodiment, fan-out-type semiconductor package part 200 may include semiconductor chip 120, encapsulation agent 130, connection structure Part 140 and electromagnetic radiation barriers 231.Electromagnetic radiation barriers 231 may include basal layer 132 and porous block portion 131.Separately Outside, fan-out-type semiconductor package part 200 may include core component 110, additional passive block 121 and 122,150 and of passivation layer 180, Underbump metallization layer 160, electric connection structure 170 etc..Due to fan-out-type semiconductor package part 200 and according to above-mentioned example The fan-out-type semiconductor package part 100 of embodiment is different in terms of the form of electromagnetic radiation barriers 231, therefore will mainly describe Electromagnetic radiation barriers 231, and the repeated description by omission for other assemblies.
Electromagnetic radiation barriers 231 may include basal layer 132.Multiple gas vents may be formed in basal layer 132.In addition, The gas vent of basal layer 132 can be filled with porous block portion 131.There is porous knot as described in the above exemplary embodiments, In the electromagnetic radiation barriers of structure, porous block portion 131 can have porous structure with effectively discharge gas.In detail, porous Blocking portion 131 can be realized in the form of multiple Particulate accumulations, in the form of porous coating etc..Basal layer 132 can have and not have The metallic film form of porous structure, for example, it may be Cu coating, and it can be not provided with gas exhaust path, but can be advantageous In block electromagnetic radiation.Therefore, there is the above exemplary embodiments phase of porous structure with entire electromagnetic radiation barriers 131 Than electromagnetic radiation barrier effectiveness can be improved, and electromagnetic radiation barriers 231 can be discharged in electromagnetic radiation barrier effectiveness than gas It is used in the case that efficiency is important.The gas vent of basal layer 132 can be realized by physical method, etching method, pattern plating method etc..
In form as shown in Figure 14, electromagnetic radiation barriers 231 may include that the density of gas vent is different from each other First area A1 and second area A2.In this case, the density of the gas vent in the A1 of first area is than in the secondth area The density of gas vent in the A2 of domain is high.Here, the gas vent of electromagnetic radiation barriers 231 can be at them filled with porous block The state in portion 131.In the big region of the necessity of block electromagnetic radiation, can reduce gas vent density or can not the row of being formed Stomata.It similarly, can in the region that the little region of the necessity of block electromagnetic radiation or gas discharge efficiency need to increase By the density design of gas vent to be different from each other in each region of electromagnetic radiation barriers 231, to increase the close of gas vent Degree.
The density of gas vent may refer to the face that per unit area is occupied by gas vent in electromagnetic radiation barriers 231 Product.For example, when the size of the gas vent in first area A1 and second area A2 is mutually the same, it is every in the A1 of first area The quantity of the gas vent of unit area can be more than the quantity of the gas vent of per unit area in second area A2.In addition, at this In exemplary embodiment, gas vent can be subtly formed, to inhibit the reduction of electromagnetic radiation barrier effectiveness significantly.Electromagnetic radiation The relatively low second area A2 of the density of gas vent in barrier layer 231 may be provided at area corresponding with semiconductor chip 120 In domain, and such region can be confirmed from the plan view of Figure 10.In other words, in form as shown in Figure 14, consider To the fact that emit relatively great amount of electromagnetic radiation from semiconductor chip 120, the low density second area A2 of gas vent can be set It is set to corresponding with semiconductor chip 120.Furthermore, it is contemplated that in passive block 121 and 122 block electromagnetic radiation necessity Multiple gas vents can be arranged in the relatively low fact near passive block 121 and 122, to improve gas discharge efficiency.In detail Ground, the first area A1 of electromagnetic radiation barriers 231 may be provided at and at least some of multiple passive blocks 121 and 122 phase In corresponding region.In this case, the density of the gas vent in the corresponding region of electromagnetic radiation barriers 231 can root It is controlled according to the size of passive block 121 and 122, type etc..
In detail, in form as shown in Figure 12, from the upper of at least some of multiple passive blocks 121 and 122 The distance of surface to the upper surface of encapsulation agent 130 can be different from each other, and with from its upper surface to the upper surface of encapsulation agent 130 In the corresponding region of passive block 122 with relatively large distance, the density of gas vent can be higher.In other words, first area A1 may be provided in region corresponding with having the passive block 122 of relative small size, and second area A2 is settable In region corresponding with having relatively large-sized passive block 121.With passive group with relative small size In the corresponding region of part 122, the thickness of encapsulation agent 130 can be larger, allows the amount of discharge gas big.Therefore, with tool Have in the corresponding region of passive block 122 of relative small size, greater number of gas vent can be formed.On the other hand, In In region corresponding with having relatively large-sized passive block 121, small number of gas vent can be formed.
In addition, as described above, multiple passive blocks 121 and 122 may include inductor 121, capacitor 122 etc., and The density of gas vent in region corresponding with capacitor 122 is than the exhaust in region corresponding with inductor 121 The density in hole is high.In other words, first area A1 can be corresponding with capacitor 122, and second area A2 can be opposite with inductor 121 It answers.In region corresponding with the inductor 121 of electromagnetic radiation for emitting relatively large amount, the close of gas vent can be reduced Degree, so that electromagnetic radiation barrier effectiveness will not reduce.The size that inductor 121 is shown in the present exemplary embodiment is greater than capacitor The case where size of device 122, but inductor 121 is not necessarily greater than capacitor 122.In addition, being shown in the present exemplary embodiment Gas vent is present in the structure in second area A2 and being filled with porous block portion 131, but gas vent may not be present in In second area A2, further to improve electromagnetic radiation barrier effectiveness.
As explained above, according to the exemplary embodiment in the present disclosure, it can be achieved that a kind of electromagnetic radiation barrier effectiveness It can be fan-out-type semiconductor package part high and that issuable gas in product can be effectively removed.
Although exemplary embodiment illustrated and described above, to those skilled in the art will it is aobvious and It is clear to, in the case where not departing from the scope of the present invention being defined by the following claims, modifications and variations can be made.

Claims (16)

1. a kind of fan-out-type semiconductor package part, comprising:
Connecting elements, including insulating layer and redistribution layer；
Semiconductor chip is arranged on the connecting elements；
Encapsulation agent encapsulates the semiconductor chip；And
Electromagnetic radiation barriers are arranged above the semiconductor chip and including basal layer and porous block portion, the base Multiple gas vents are formed in bottom, the porous block portion is filled in the multiple gas vent.
2. fan-out-type semiconductor package part as described in claim 1, wherein the porous block portion has multiple Particulate accumulations Form.
3. fan-out-type semiconductor package part as described in claim 1, wherein the porous block portion is porous coating.
4. fan-out-type semiconductor package part as described in claim 1, wherein the basal layer includes metallic film.
5. fan-out-type semiconductor package part as described in claim 1, wherein the basal layer includes copper coating.
6. fan-out-type semiconductor package part as described in claim 1, wherein the electromagnetic radiation barriers include first area And second area, and the density of the gas vent of the density ratio of the gas vent in the first area in the second region It is high.
7. fan-out-type semiconductor package part as claimed in claim 6, wherein second area setting with the semiconductor In the corresponding region of chip.
8. fan-out-type semiconductor package part as claimed in claim 6, the fan-out-type semiconductor package part further includes core component, The core component include accommodate the semiconductor chip through-hole and covering formed the through-hole wall metal layer.
9. fan-out-type semiconductor package part as claimed in claim 8, wherein the metal layer and the electricity of the core component Magnetic radiation barrier layer is connected to each other by passing through the conductive via of the encapsulation agent.
10. fan-out-type semiconductor package part as claimed in claim 6, the fan-out-type semiconductor package part further includes that setting exists Multiple passive blocks on the connecting elements.
11. fan-out-type semiconductor package part as claimed in claim 10, wherein first area setting with it is the multiple In the corresponding region of at least some of passive block.
12. fan-out-type semiconductor package part as claimed in claim 11, wherein from least one in the multiple passive block The distance of a little upper surfaces to the upper surface of the encapsulation agent is different from each other, and the density of the gas vent with it is the multiple The upper surface slave passive block among passive block has described passive group of bigger distance to the upper surface of the encapsulation agent Higher in the corresponding region of part, the upper surface is the table far from the connecting elements of corresponding passive block and encapsulation agent Face.
13. fan-out-type semiconductor package part as claimed in claim 10, wherein the multiple passive block include capacitor and Inductor, and the density ratio of the gas vent in region corresponding with the capacitor is opposite with the inductor The density of the gas vent in the region answered is high.
14. a kind of fan-out-type semiconductor package part, comprising:
Connecting elements, including insulating layer and redistribution layer；
Semiconductor chip is arranged on the connecting elements；
Encapsulation agent encapsulates the semiconductor chip；And
Electromagnetic radiation barriers are arranged above the semiconductor chip and have porous structure.
15. fan-out-type semiconductor package part as claimed in claim 14, wherein the electromagnetic radiation barriers have multiple The form that grain gathers.
16. fan-out-type semiconductor package part as claimed in claim 14, wherein the electromagnetic radiation barriers are porous platings Layer.
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