CN115766415B - Intelligent network card VR state monitoring device, method, terminal and storage medium - Google Patents
Intelligent network card VR state monitoring device, method, terminal and storage medium Download PDFInfo
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Abstract
The invention relates to the field of intelligent network card VR state monitoring, and particularly discloses an intelligent network card VR state monitoring device, an intelligent network card VR state monitoring method, an intelligent network card VR state monitoring terminal and a storage medium, wherein PWRGD signals of each VR chip are transmitted to a VR state monitor, and the PWRGD signal state of each VR chip is monitored in real time; when the PWRGD signal of a certain VR chip is abnormal, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding VR chip. According to the invention, the PWRGD signals are collected for each VR chip, and specific fault points are positioned according to the PWRGD signals of each VR chip, so that effective support is provided for staff to check the working state and debug the network card, and the detection efficiency is improved.
Description
Technical Field
The invention relates to the field of intelligent network card VR state monitoring, in particular to an intelligent network card VR state monitoring device, an intelligent network card VR state monitoring method, an intelligent network card VR state monitoring terminal and a storage medium.
Background
In the mainstream intelligent network card today, a larger number of VR (voltage regulation, voltage conversion) chips are used to supply power to various devices inside the network card. Due to the different power schemes and the diversification of VR chip manufacturers, a power drop phenomenon may be encountered in actual use. The power supply rings in the boards are buckled, so that the trouble of no follow-up is caused when the cause of the problem is checked.
For power state detection of the intelligent network card, the most commonly used method is to detect the state of the last stage of electricity, and the power good (PWRGD) of the last stage (PVTT) is usually regarded as a detection flag. A simplified schematic of the detection mechanism is shown in fig. 1 below, taking PVTT as an example. When the loop-around power supply in the network card has a certain level of power drop, the power of each level behind the VR chip is dropped, so when the CPLD detects that the last level of power (PVTT is taken as an example) has abnormal pull-down of PWRGD_ PVTT, the CPLD sends an interrupt signal to the BMC of the intelligent network card, the BMC sends an alarm, and a user knows that the power drop of the network card occurs. However, this mechanism has many drawbacks and disadvantages:
1) The CPLD is only used for detecting the power state of the last stage, and although the BMC can be timely informed of the warning power drop, the power drop caused by the problem of which stage can not be provided definitely, so that further analysis basis can not be provided for operation and research personnel;
2) The reasons for dropping the PWRGD of a certain level of electricity are various, as shown in fig. 1, it may be that the PWRGD of the level of VR chip drops itself, and the dropping of the PWRGD of the previous level of electricity (often referred to as EN of the current level of electricity) causes the EN of the current level of electricity to pull down, thereby causing power drop. Thus detecting only the state of the PWRGD does not provide a more comprehensive phenomenon.
Disclosure of Invention
In order to solve the problems, the invention provides an intelligent network card VR state monitoring device, an intelligent network card VR state monitoring method, an intelligent network card VR state monitoring terminal and an intelligent network card VR state monitoring storage medium, which are used for collecting PWRGD signals for each VR chip, positioning the PWRGD signals to specific fault points according to the PWRGD signals of each VR chip, providing effective support for staff to check the working state and debugging work of the network card, and improving the detection efficiency.
In a first aspect, the present invention provides an intelligent network card VR state monitoring device, where a PWRGD signal of a previous VR chip is input to an enable end of a next VR chip and is an enable signal of the next VR chip, where the device includes a VR state monitor, and the PWRGD signal of each VR chip is transmitted to the VR state monitor, so as to monitor the PWRGD signal state of each VR chip in real time; when the PWRGD signal of a certain VR chip is abnormal, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding VR chip.
Further, if the previous stage VR chip of a certain VR chip is a single VR chip, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the previous stage VR chip, and specifically includes:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
if the PWRGD signal state of the front-stage VR chip is abnormal, the PWRGD signal of the front two-stage VR chip is detected, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, the PWRGD signal of the front three-stage VR chip is detected, and so on until a specific fault point is located.
Further, if the previous stage VR chip of a certain VR chip is a plurality of VR chips, the enabling signal thereof is the and signal of the PWRGD signals of the previous stage VR chips, and accordingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the previous stage VR chip thereof specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
if the PWRGD signal is abnormal in the plurality of VR chips of the previous stage, the VR chip with the abnormal PWRGD signal is a fault point.
Further, the VR state monitor is a CPLD.
Further, the device where the intelligent network card is located comprises a BMC, when the CPLD monitors that the PWRGD signal is abnormal, an alarm signal is sent to the BMC, and the specific fault point information of the positioning is sent to the BMC; and simultaneously, recording the real-time monitoring information to a log.
In a second aspect, the present invention provides a method for monitoring VR status of an intelligent network card, including the following steps:
receiving a PWRGD signal for each VR chip;
monitoring the PWRGD signal state of each VR chip in real time;
when the PWRGD signal of a certain VR chip is abnormal, a specific fault point is positioned according to the PWRGD signal state of the preceding VR chip.
Further, if the previous stage VR chip of a certain VR chip is a single VR chip, locating a specific fault point according to the state of the PWRGD signal of the previous stage VR chip of the single VR chip specifically includes:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
if the PWRGD signal state of the front-stage VR chip is abnormal, the PWRGD signal of the front two-stage VR chip is detected, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, the PWRGD signal of the front three-stage VR chip is detected, and so on until a specific fault point is located.
Further, if the previous stage VR chip of a certain VR chip is a plurality of VR chips, the enabling signal thereof is the and signal of the PWRGD signals of the previous stage VR chips, and accordingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the previous stage VR chip thereof specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
If the PWRGD signals in the plurality of VR chips of the previous stage are abnormal, the VR chip with the abnormal PWRGD signals is recorded as an abnormal VR chip, the PWRGD signals of the VR chip of the previous stage of the abnormal VR chip are detected, if the PWRGD signals are normal, the fault point is the abnormal VR chip, if the PWRGD signals of the VR chip of the previous stage are detected, and the like, until a specific fault point is located.
In a third aspect, a technical solution of the present invention provides a terminal, including:
the memory is used for storing the VR state monitoring program of the intelligent network card;
And the processor is used for realizing the steps of the intelligent network card VR state monitoring method according to any one of the above steps when executing the intelligent network card VR state monitoring program.
In a fourth aspect, the present invention provides a computer readable storage medium, where an intelligent network card VR state monitoring program is stored on the readable storage medium, where the intelligent network card VR state monitoring program when executed by a processor implements the steps of the intelligent network card VR state monitoring method according to any one of the foregoing embodiments.
The intelligent network card VR state monitoring device, the intelligent network card VR state monitoring method, the intelligent network card VR state monitoring terminal and the intelligent network card VR state monitoring storage medium have the following beneficial effects compared with the prior art: and transmitting the PWRGD signal of each VR chip to a VR state monitor, and positioning the specific fault point by the VR state monitor according to the PWRGD signal of each VR signal chip. According to the invention, the PWRGD signals are collected for each VR chip, and specific fault points are positioned according to the PWRGD signals of each VR chip, so that effective support is provided for staff to check the working state and debug the network card, and the detection efficiency is improved.
Drawings
For a clearer description of embodiments of the application or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the application, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of the principle of the current detection mechanism.
Fig. 2 is a schematic structural diagram of an intelligent network card VR state monitoring device according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of a two-stage VR chip structure of an embodiment of a VR device for an intelligent network card according to an embodiment of the present invention.
Fig. 4 is a flowchart of a method for monitoring VR status of an intelligent network card according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Detailed Description
Some terms related to the present invention are explained below.
VR chip: voltage regulation, a voltage conversion chip.
PWRGD: and the signal is used for representing whether the VR chip completes voltage establishment, if the PWRGD is at a high level, the voltage establishment is represented, and if the PWRGD is at a low level, the voltage is represented and is not output.
CPLD: complex Programmable Logic Device, complex programmable logic devices.
BMC: baseboardManager Controller, a baseboard management controller.
In order to better understand the aspects of the present application, the present application will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 2 is a schematic structural diagram of a VR state monitoring device of an intelligent network card according to an embodiment of the present invention, where the intelligent network card has a plurality of VR chips for processing power sources, and a PWRGD signal of a previous VR chip is input to an enable end of a next VR chip, that is, the PWRGD signal of the previous VR chip is an enable signal of the next VR chip. It should be noted that, each level of VR chip may include at least one VR chip, that is, a level of VR chip may be one VR chip or may be a plurality of VR chips, and when a level of VR chip has a plurality of VR chips, PWRGD signals of the plurality of VR chips are input to a subsequent level of VR chip after being subjected to and operation, and are used as enable signals of the subsequent level of VR chip.
In order to quickly locate a specific fault point when abnormal power failure occurs, the embodiment also provides a VR state monitor, PWPWRGD signals of each VR chip are transmitted to the VR state monitor, and the PWRGD signal state of each VR chip is monitored in real time; when the PWRGD signal of a certain VR chip is abnormal, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding VR chip.
The embodiment of the invention transmits the PWRGD signal of each VR chip to the VR state monitor, and the VR state monitor positions a specific fault point according to the PWRGD signal of each VR signal chip. According to the invention, the PWRGD signals are collected for each VR chip, and specific fault points are positioned according to the PWRGD signals of each VR chip, so that effective support is provided for staff to check the working state and debug the network card, and the detection efficiency is improved.
When the preceding stage VR chip of a certain VR chip is a single VR chip, the PWRGD signal of the preceding stage VR chip is directly detected to locate the fault point, and correspondingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding stage VR chip, and the method specifically comprises the following steps:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
if the PWRGD signal state of the front-stage VR chip is abnormal, the PWRGD signal of the front two-stage VR chip is detected, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, the PWRGD signal of the front three-stage VR chip is detected, and so on until a specific fault point is located.
The method comprises the steps of detecting the PWRGD signal of a preceding stage VR chip, if the PWRGD signal of the preceding stage VR chip is normal, directly determining the current VR chip as a fault point, if the PWRGD signal of the preceding stage VR chip is abnormal, detecting the PWRGD signal of the preceding stage VR chip again, and the like until the PWRGD signal of a certain VR chip is found abnormal, and if the PWRGD signal of the preceding stage VR chip is normal, determining the VR chip as the fault point.
If the preceding VR chip of a certain VR chip is a plurality of VR chips, the enable signal is the AND signal of the PWRGD signals of the preceding plurality of VR chips. Correspondingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the VR chip at the previous stage, and specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
If the PWRGD signals in the plurality of VR chips of the previous stage are abnormal, the VR chip with the abnormal PWRGD signals is recorded as an abnormal VR chip, the PWRGD signals of the VR chip of the previous stage of the abnormal VR chip are detected, if the PWRGD signals are normal, the fault point is the abnormal VR chip, if the PWRGD signals of the VR chip of the previous stage are detected, and the like, until a specific fault point is located.
The method comprises the steps of detecting whether PWRGD signals of all VR chips of the previous stage are normal or not, and if the PWRGD signals are normal, the current VR chip is a fault point. If the PWRGD signals of the VR chips in the previous stage are abnormal, detecting the PWRGD signals of the VR chips in the previous stage for the abnormal VR chips, and the like until the PWRGD signals of a certain VR chip are found abnormal, and the PWRGD signals of the VR chips in the previous stage are normal, wherein the VR chips are fault points.
In some embodiments, the VR state monitor may employ a CPLD. The device where the intelligent network card is located generally comprises a BMC, when the CPLD monitors that the PWRGD signal is abnormal, an alarm signal is sent to the BMC, and the located specific fault point information is sent to the BMC, so that the device can quickly acquire the alarm information. In addition, the monitoring information can be recorded to the log in real time, so that the subsequent analysis is convenient.
For a further understanding of the present invention, a detailed description of the present invention is provided below in further detail, with the detailed description taken throughout the power scheme, and fig. 3 is a schematic diagram of a two-stage VR chip structure of the detailed embodiment, where PVCCH is the current level and PVCCL _sdm is the upper level.
In the specific embodiment, the PWRGD of each stage of electricity is introduced into the CPLD, the CPLD detects the state of the PWRGD, and if the PWRGD of the previous stage of electricity is normal and the PWRGD of the current stage of electricity falls, the current stage of electricity power drop is reported; if the EN of the current level is given by a plurality of PWRGDs of the current level through an and circuit, the multiple PWRGDs can be introduced into the CPLD, and after the CPLD determines that the PWRGDs of the multiple PWRGDs are all high, the CPLD sends the EN of the current level.
In the detection mechanism of the specific embodiment, the PWRGD of each stage of electricity is led to the CPLD, and the CPLD judges when the power drop occurs. If the EN of this power (PWRGD of the previous power) is high and PWRGD is low, then it is this power drop that occurs; if this electrical EN (PWRGD of the previous stage of electrical) is low, it is the previous stage of electrical power drop (in the actual loop-around power supply, it is also necessary to continue to detect from the CPLD to the previous stage which stage of electrical is EN normal, the PWRGD falls, and thus locates to a specific fault point). Taking the power scheme of FIG. 3 as an example, if PWRGD_ PVCCL _SDM is high and PWRGD_ PVCCH is low, it is determined as PVCCH power drop, thereby informing BMC report PVCCH power drop instead of PVCCL _SDM power drop.
In some power schemes, for example PVCCH, the EN for this stage is provided by p12v_a_pwrgd & p1v_b_pwrgd & p1v15_aux_pwrgd, PVCCH EN being high only if all three PWRGDs are high. Under the condition, by utilizing the detection scheme of the specific embodiment, the three paths of PWRGDs are led to the CPLD, and after the CPLD judges that the three paths are all high, the CPLD sends PVCCH EN to enable the lower-level electricity.
The specific embodiment can be used for detecting the task intersection and the CPLD, so that the fault position can be rapidly and accurately positioned when the power drop is realized, and the interruption is sent to the BMC, so that the fault is reported, the states of all levels of electricity can be detected at regular intervals, and the states are recorded in a system log, thereby providing assistance for the analysis and positioning of subsequent operation and maintenance and research personnel.
The embodiment of the intelligent network card VR state monitoring device is described in detail above, and based on the intelligent network card VR state monitoring device described in the above embodiment, the embodiment of the present invention further provides an intelligent network card VR state monitoring method corresponding to the device.
Fig. 4 is a flowchart of a method for monitoring VR status of an intelligent network card according to an embodiment of the present invention, as shown in fig. 4, where the method includes the following steps.
S1, receiving PWRGD signals of each VR chip.
S2, monitoring the PWRGD signal state of each VR chip in real time.
S3, when the PWRGD signal of one VR chip is abnormal, locating a specific fault point according to the PWRGD signal state of the preceding VR chip.
The number of the VR chips at the previous stage of a certain VR chip is different, and the corresponding specific methods for locating specific fault points are also different.
In the first case, if a preceding VR chip of a VR chip is a single VR chip, locating a specific fault point according to a state of a PWRGD signal of the preceding VR chip includes:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
if the PWRGD signal state of the front-stage VR chip is abnormal, the PWRGD signal of the front two-stage VR chip is detected, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, the PWRGD signal of the front three-stage VR chip is detected, and so on until a specific fault point is located.
In the second case, if the previous stage VR chip of a certain VR chip is a plurality of VR chips, the enable signal thereof is the and signal of the PWRGD signals of the previous stage VR chips, and accordingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the previous stage VR chip thereof, which specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
If the PWRGD signals in the plurality of VR chips of the previous stage are abnormal, the VR chip with the abnormal PWRGD signals is recorded as an abnormal VR chip, the PWRGD signals of the VR chip of the previous stage of the abnormal VR chip are detected, if the PWRGD signals are normal, the fault point is the abnormal VR chip, if the PWRGD signals of the VR chip of the previous stage are detected, and the like, until a specific fault point is located.
The method for monitoring the VR state of the intelligent network card in this embodiment is implemented based on the foregoing intelligent network card VR state monitoring device, so that the specific implementation of the method can be seen from the foregoing example part of the intelligent network card VR state monitoring device, and therefore, the specific implementation of the method can refer to the description of the examples of the corresponding parts and will not be further described herein.
In addition, since the method for monitoring the VR state of the intelligent network card in this embodiment is implemented based on the foregoing device for monitoring the VR state of the intelligent network card, the function of the method corresponds to that of the foregoing device, and will not be described herein.
Fig. 5 is a schematic structural diagram of a terminal device 500 according to an embodiment of the present invention, including: a processor 510, a memory 520 and a communication unit 530. The processor 510 is configured to implement the following steps when implementing the VR state monitoring program of the intelligent network card stored in the memory 520:
s1, receiving PWRGD signals of each VR chip;
s2, monitoring the PWRGD signal state of each VR chip in real time;
S3, when the PWRGD signal of one VR chip is abnormal, locating a specific fault point according to the PWRGD signal state of the preceding VR chip.
The invention transmits the PWRGD signal of each VR chip to the VR state monitor, and the VR state monitor locates to a specific fault point according to the PWRGD signal of each VR signal chip. According to the invention, the PWRGD signals are collected for each VR chip, and specific fault points are positioned according to the PWRGD signals of each VR chip, so that effective support is provided for staff to check the working state and debug the network card, and the detection efficiency is improved.
The terminal device 500 includes a processor 510, a memory 520, and a communication unit 530. The components may communicate via one or more buses, and it will be appreciated by those skilled in the art that the configuration of the server as shown in the drawings is not limiting of the invention, as it may be a bus-like structure, a star-like structure, or include more or fewer components than shown, or may be a combination of certain components or a different arrangement of components.
The memory 520 may be used to store instructions for execution by the processor 510, and the memory 520 may be implemented by any type of volatile or non-volatile memory terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk. The execution of the instructions in memory 520, when executed by processor 510, enables terminal 500 to perform some or all of the steps in the method embodiments described below.
The processor 510 is a control center of the storage terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and performs various functions of the electronic terminal and/or processes data by running or executing software programs and/or modules stored in the memory 520, and invoking data stored in the memory. The processor may be comprised of an integrated circuit (INTEGRATED CIRCUIT, simply referred to as an IC), for example, a single packaged IC, or may be comprised of multiple packaged ICs connected to one another for the same function or for different functions. For example, the processor 510 may include only a central processing unit (Central Processing Unit, CPU for short). In the embodiment of the invention, the CPU can be a single operation core or can comprise multiple operation cores.
A communication unit 530 for establishing a communication channel so that the storage terminal can communicate with other terminals. Receiving user data sent by other terminals or sending the user data to other terminals.
The invention also provides a computer storage medium, which can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (random access memory, RAM) and the like.
The computer storage medium stores an intelligent network card VR state monitoring program, and the intelligent network card VR state monitoring program when executed by the processor realizes the following steps:
s1, receiving PWRGD signals of each VR chip;
s2, monitoring the PWRGD signal state of each VR chip in real time;
S3, when the PWRGD signal of one VR chip is abnormal, locating a specific fault point according to the PWRGD signal state of the preceding VR chip.
The invention transmits the PWRGD signal of each VR chip to the VR state monitor, and the VR state monitor locates to a specific fault point according to the PWRGD signal of each VR signal chip. According to the invention, the PWRGD signals are collected for each VR chip, and specific fault points are positioned according to the PWRGD signals of each VR chip, so that effective support is provided for staff to check the working state and debug the network card, and the detection efficiency is improved.
It will be apparent to those skilled in the art that the techniques of embodiments of the present invention may be implemented in software plus a necessary general purpose hardware platform. Based on such understanding, the technical solution in the embodiments of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium such as a U-disc, a mobile hard disc, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk or an optical disk, etc. various media capable of storing program codes, including several instructions for causing a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, etc.) to execute all or part of the steps of the method described in the embodiments of the present invention.
In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The foregoing disclosure is merely illustrative of the preferred embodiments of the invention and the invention is not limited thereto, since modifications and variations may be made by those skilled in the art without departing from the principles of the invention.
Claims (6)
1. The device is characterized by comprising a VR state monitor, wherein the PWRGD signal of each VR chip is transmitted to the VR state monitor, and the PWRGD signal state of each VR chip is monitored in real time; when the PWRGD signal of a certain VR chip is abnormal, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding VR chip;
If the preceding stage VR chip of a certain VR chip is a single VR chip, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding stage VR chip, and specifically includes:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
If the PWRGD signal state of the front-stage VR chip is abnormal, detecting the PWRGD signal of the front two-stage VR chip, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, detecting the PWRGD signal of the front three-stage VR chip, and so on until a specific fault point is positioned;
If the preceding stage VR chip of a certain VR chip is a plurality of VR chips, the enable signal is the and signal of the PWRGD signals of the preceding stage VR chips, and accordingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding stage VR chip, which specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
If the PWRGD signals in the plurality of VR chips of the previous stage are abnormal, the VR chip with the abnormal PWRGD signals is recorded as an abnormal VR chip, the PWRGD signals of the VR chip of the previous stage of the abnormal VR chip are detected, if the PWRGD signals are normal, the fault point is the abnormal VR chip, if the PWRGD signals of the VR chip of the previous stage are detected, and the like, until a specific fault point is located.
2. The intelligent network card VR state monitoring device of claim 1, wherein the VR state monitor is a CPLD.
3. The VR state monitoring device of claim 2, wherein the device in which the intelligent network card is located includes a BMC, and when the CPLD monitors that the PWRGD signal is abnormal, an alarm signal is sent to the BMC, and the located specific fault point information is sent to the BMC; and simultaneously, recording the real-time monitoring information to a log.
4. The intelligent network card VR state monitoring method is characterized by comprising the following steps:
receiving a PWRGD signal for each VR chip;
monitoring the PWRGD signal state of each VR chip in real time;
When the PWRGD signal of a certain VR chip is abnormal, locating a specific fault point according to the PWRGD signal state of the preceding VR chip;
if the preceding stage VR chip of a certain VR chip is a single VR chip, locating a specific fault point according to the state of the PWRGD signal of the preceding stage VR chip, specifically including:
if the PWRGD signal state of the preceding stage VR chip is normal, the fault point is on the VR chip;
If the PWRGD signal state of the front-stage VR chip is abnormal, detecting the PWRGD signal of the front two-stage VR chip, if the PWRGD signal state of the front two-stage VR chip is normal, the fault point is the front-stage VR chip, otherwise, detecting the PWRGD signal of the front three-stage VR chip, and so on until a specific fault point is positioned;
If the preceding stage VR chip of a certain VR chip is a plurality of VR chips, the enable signal is the and signal of the PWRGD signals of the preceding stage VR chips, and accordingly, the VR state monitor locates a specific fault point according to the state of the PWRGD signal of the preceding stage VR chip, which specifically includes:
If PWRGD signals of the plurality of VR chips of the previous stage are normal, the fault point is on the VR chip;
If the PWRGD signals in the plurality of VR chips of the previous stage are abnormal, the VR chip with the abnormal PWRGD signals is recorded as an abnormal VR chip, the PWRGD signals of the VR chip of the previous stage of the abnormal VR chip are detected, if the PWRGD signals are normal, the fault point is the abnormal VR chip, if the PWRGD signals of the VR chip of the previous stage are detected, and the like, until a specific fault point is located.
5. A terminal, comprising:
the memory is used for storing the VR state monitoring program of the intelligent network card;
the processor is configured to implement the steps of the intelligent network card VR state monitoring method according to claim 4 when executing the intelligent network card VR state monitoring program.
6. A computer readable storage medium, wherein an intelligent network card VR state monitoring program is stored on the readable storage medium, and when the intelligent network card VR state monitoring program is executed by a processor, the steps of the intelligent network card VR state monitoring method of claim 4 are implemented.
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| CN110659181A (en) * | 2019-09-06 | 2020-01-07 | 苏州浪潮智能科技有限公司 | Method and device for monitoring server mainboard and readable medium |
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| CN113645085B (en) * | 2021-10-15 | 2022-02-22 | 苏州浪潮智能科技有限公司 | Method and device for detecting abnormality of intelligent network card, electronic equipment and storage medium |
| CN114257491B (en) * | 2021-11-12 | 2023-08-18 | 苏州浪潮智能科技有限公司 | VR alarm processing method, device, equipment and storage medium for virtualization system |
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