Nothing Special   »   [go: up one dir, main page]

CN115715128B - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN115715128B
CN115715128B CN202211409269.6A CN202211409269A CN115715128B CN 115715128 B CN115715128 B CN 115715128B CN 202211409269 A CN202211409269 A CN 202211409269A CN 115715128 B CN115715128 B CN 115715128B
Authority
CN
China
Prior art keywords
sub
pixels
anode
display panel
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202211409269.6A
Other languages
Chinese (zh)
Other versions
CN115715128A (en
Inventor
袁鑫
周秀峰
康报虹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Original Assignee
HKC Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to CN202211409269.6A priority Critical patent/CN115715128B/en
Publication of CN115715128A publication Critical patent/CN115715128A/en
Application granted granted Critical
Publication of CN115715128B publication Critical patent/CN115715128B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application discloses a display panel and a display device, wherein the display panel comprises a plurality of sub-pixels, and anode vias of the sub-pixels are positioned at the geometric center of a display area in a corresponding regular graph shape; the first sub-pixels and the second sub-pixels are alternately arranged along the column direction; the central connecting line of the anode via holes of the two first sub-pixels and the anode via holes of the two second sub-pixels which are adjacently arranged form a first virtual quadrangle, and the anode via holes of the third sub-pixels are positioned at the diagonal intersection points of the corresponding first virtual quadrangles; the central connecting line of the anode through holes of the four adjacent third sub-pixels forms a second virtual quadrangle, and the anode through holes of the first sub-pixels and the anode through holes of the second sub-pixels are respectively positioned at the diagonal intersection points of the corresponding second virtual quadrangles; the first virtual quadrangle is congruent with the second virtual quadrangle. Based on the mode, the aperture ratio of the sub-pixels and the uniformity of the display effect of each region can be improved, and the display effect of the display panel is further improved.

Description

Display panel and display device
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
In the prior art, since the anode via hole of each sub-pixel is disposed outside the display area of the sub-pixel, a corresponding anode wire needs to be configured for the anode of each sub-pixel, and the anode of each sub-pixel and the driving circuit are communicated through the anode wire passing through the anode via hole located outside the display area, so that the anode of each sub-pixel can receive an anode voltage signal through the corresponding anode wire and the driving circuit to emit light.
The defects of the prior art are that the anode wiring is additionally arranged on the basis of the necessary devices of the sub-pixels, and the anode wiring corresponding to each sub-pixel occupies a certain area on the display panel, so that the opening ratio of the display panel is easy to be low.
Disclosure of Invention
The technical problem that this application mainly solves is how to improve the uniformity of the aperture ratio and each regional display effect of sub-pixel, and then improves display panel's display effect.
In order to solve the technical problem, a first technical scheme adopted in the application is as follows: a display panel comprises a plurality of sub-pixels, wherein each sub-pixel comprises an anode and an anode via hole, the anode is used for being connected with a driving circuit through the corresponding anode via hole, the shape of a display area of each sub-pixel is a regular graph with a geometric center, and the anode via hole of the sub-pixel is positioned at the geometric center of the corresponding display area; the plurality of sub-pixels are divided into a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, and the first sub-pixels and the second sub-pixels are alternately arranged along the column direction; the central connecting line of the anode via holes of the two first sub-pixels and the anode via holes of the two second sub-pixels which are adjacently arranged form a first virtual quadrangle, and the anode via holes of the third sub-pixels are positioned at the diagonal intersection points of the corresponding first virtual quadrangles; the central connecting line of the anode through holes of the four adjacent third sub-pixels forms a second virtual quadrangle, and the anode through holes of the first sub-pixels and the anode through holes of the second sub-pixels are respectively positioned at the diagonal intersection points of the corresponding second virtual quadrangles; the first virtual quadrangle is congruent with the second virtual quadrangle.
Wherein the first virtual quadrangle is one of a square, a rectangle and an isosceles trapezoid.
Wherein the regular pattern with geometric center is a center symmetrical pattern.
The central symmetry graph is one of regular polygons, regular circles and diamonds with even sides.
Wherein the first virtual quadrangle and the second virtual quadrangle are square; the display panel further comprises a plurality of supporting layers, the intersection point of the first virtual quadrangle and the second virtual quadrangle is used as a target intersection point, and at least part of the target intersection points are respectively provided with a supporting layer.
The shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel are regular octagons or regular circles, the shape of the first sub-pixel is congruent with the shape of the second sub-pixel, and the shape of the second sub-pixel is congruent with the shape of the third sub-pixel.
The display panel further comprises a plurality of supporting layers and a substrate, the plurality of sub-pixels are arranged on the substrate, the supporting layers are respectively arranged on the corresponding sub-pixels, and projection of the supporting layers on the substrate overlaps projection of anode through holes of the corresponding sub-pixels on the substrate.
Wherein, each sub-pixel is provided with a supporting layer.
Wherein the first sub-pixel, the second sub-pixel and the third sub-pixel are respectively used for emitting light with different colors.
In order to solve the technical problem, a first technical scheme adopted in the application is as follows: a display device comprises a power module and the display panel.
The beneficial effects of this application lie in: in the technical scheme of the application, the anode via holes of each sub-pixel in the display panel are arranged at the geometric center of the display area in a regular graph shape, all the sub-pixels are divided into a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, the first sub-pixels and the second sub-pixels are alternately arranged in the column direction, the central connecting lines of the anode via holes of two first sub-pixels and the anode via holes of two second sub-pixels which are adjacently arranged form a first virtual quadrangle, the anode via holes of the third sub-pixels are positioned at diagonal intersection points of the corresponding first virtual quadrangle, the central connecting lines of the anode via holes of four third sub-pixels which are adjacently arranged form a second virtual quadrangle, the anode via holes of the first sub-pixels and the anode via holes of the second sub-pixels are respectively positioned at diagonal intersection points of the corresponding second virtual quadrangle, and the first virtual quadrangle and the second virtual quadrangle are congruent. According to the mode, the anode via holes are positioned at the geometric center of the display area, so that anodes positioned in the display area can be connected with corresponding driving circuits through the anode via holes positioned in the display area without correspondingly configuring anode wires extending from the display area to the outside of the display area, the arrangement of the anode wires is reduced or omitted, the occupation ratio of the display area in the display panel is improved, the opening ratio of the display panel is further improved, in addition, the anode via holes are positioned at the geometric center of each regular graph-shaped display area, and the combination of the anode via holes of all the subpixels in each area and the relative position relation of the corresponding display area on the display panel can be ensured to have the same arrangement by enabling the first virtual quadrangle formed by anode via hole center connecting lines between the first subpixels and the second subpixels which are adjacently arranged and the second virtual quadrangle formed by anode via hole center connecting lines between the third subpixels which are adjacently arranged, so that the uniformity of the display effect of each area is improved. In summary, the display effect of the display panel can be improved based on the above-described mode.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic view of a first embodiment of a display panel of the present application;
FIG. 2 is a schematic structural view of a second embodiment of the display panel of the present application;
FIG. 3 is a schematic structural view of a third embodiment of a display panel of the present application;
FIG. 4 is a schematic structural view of a fourth embodiment of a display panel of the present application;
FIG. 5 is a schematic view of a fifth embodiment of a display panel of the present application;
fig. 6 is a schematic structural view of an embodiment of the display device of the present application.
Reference numerals: the display device comprises a subpixel 10, an anode via 20, a first subpixel 11, an anode via 21, a second subpixel 12, an anode via 22, a third subpixel 13, an anode via 23, a display device 30, a power module 31, a display panel 32, a target subpixel X, an anode via Y, a first virtual quadrangle a, a second virtual quadrangle B, a target intersection point C, and a support layer D.
Detailed Description
The present application is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustration of the present application, but do not limit the scope of the present application. Likewise, the following embodiments are only some, but not all, of the embodiments of the present application, and all other embodiments obtained by one of ordinary skill in the art without inventive effort are within the scope of the present application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the description of the present application, it is to be understood that the terms "mounted," "configured," "connected," and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, unless explicitly stated and defined otherwise; the connection can be mechanical connection or electric connection; may be directly connected or may be connected via an intermediate medium. It will be apparent to those skilled in the art that the foregoing is in the specific sense of this application.
The present application first proposes a display panel, referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of the display panel of the present application, and as shown in fig. 1, the display panel includes a plurality of sub-pixels 10, and each sub-pixel 10 includes an anode (not shown) and an anode via 20.
Each sub-pixel 10 of all sub-pixels 10 is a target sub-pixel X whose display area is shaped as a regular pattern with a geometric center, and the anode via Y of the target sub-pixel X is located at the geometric center of its regular pattern-shaped display area.
In the entire sub-pixels 10, the plurality of sub-pixels 10 are divided into a plurality of first sub-pixels 11, a plurality of second sub-pixels 12, and a plurality of third sub-pixels 13, the first sub-pixels 11 including anode vias 21, the second sub-pixels 12 including anode vias 22, and the third sub-pixels 13 including anode vias 23.
The first sub-pixels 11 and the second sub-pixels 12 are alternately arranged in the column direction D1, that is, the sub-pixel columns are formed by alternately arranging the first sub-pixels 11, the second sub-pixels 12, and the first sub-pixels 11 and the second sub-pixels 12 in the column direction, all of which form a plurality of sub-pixel columns alternately arranged together, and the first sub-pixels 11 and the second sub-pixels 12 may or may not be alternately arranged in the row direction D2, which is not limited herein.
The anode via hole Y of the target sub-pixel X is arranged at the geometric center of the display area, firstly, the anode via hole Y is located in the display area, the anode of the target sub-pixel X in the display area can directly penetrate through the anode via hole to be connected with a corresponding driving circuit without configuring an anode wiring to receive a corresponding anode voltage signal, and secondly, the anode via hole Y is specifically located at the geometric center of the display area, so that diffraction phenomenon generated by the fact that the anode via hole Y is located in the display area is weakened or eliminated, the anode wiring is removed, meanwhile, good display effect of the target sub-pixel X can be ensured, and accordingly the display effect of the display panel is ensured to be good, and meanwhile the opening ratio of the display panel is improved.
The central lines of the two first sub-pixels 11 and the two second sub-pixels 12 which are adjacently arranged form a first virtual quadrangle a, and the center of the third sub-pixel 13 is positioned at the diagonal intersection point of the corresponding first virtual quadrangle a.
The central lines of the four third sub-pixels 13 adjacently disposed form a second virtual quadrangle B, and the first sub-pixels 11 and the second sub-pixels 12 are respectively located at diagonal intersections of the corresponding second virtual quadrangle B.
The first virtual quadrangle A is congruent with the second virtual quadrangle B.
In the display panel shown in fig. 1, for example, one third sub-pixel 13 is located at a diagonal intersection of one first virtual quadrangle a.
In the two columns or two rows of the target sub-pixels X, the second virtual quadrangle B is formed by the central lines of the four third sub-pixels 13 adjacently disposed, and the first sub-pixels 11 and the second sub-pixels 12 are respectively located at the diagonal intersections of the corresponding second virtual quadrangle B, for example, in the display panel shown in fig. 1, one first sub-pixel 11 is located at one diagonal intersection of the second virtual quadrangle B.
The first virtual quadrangle A is congruent with the second virtual quadrangle B, namely, the first virtual quadrangle A and the second virtual quadrangle B have the same shape, and the areas of the first virtual quadrangle A and the second virtual quadrangle B are also the same.
Two examples are given below:
in the first example, as shown in fig. 1, the first virtual quadrangle a and the second virtual quadrangle B are both rectangular, and the areas of the first virtual quadrangle a and the second virtual quadrangle B are the same.
In a second example, as shown in fig. 2, the first virtual quadrangle a and the second virtual quadrangle B are isosceles trapezoids, and the areas of the first virtual quadrangle a and the second virtual quadrangle B are the same.
Based on the above manner, since the anode via holes of the sub-pixels are all located at the geometric center of the display area, the first virtual quadrangle a formed by the central connection lines of the anode via holes of the two first sub-pixels 11 and the anode via holes of the two second sub-pixels 12 is fully equal to the second virtual quadrangle B formed by the central connection lines of the anode via holes of the four third sub-pixels 11, so that the sub-pixel arrangement as shown in fig. 1 or fig. 2 can be formed, and the first sub-pixels 11 and the second sub-pixels 12 are respectively located at the diagonal intersection points of the corresponding second virtual quadrangle B, and the third sub-pixels 13 are respectively located at the diagonal intersection points of the corresponding first virtual quadrangle a.
When uniformity of the display effect is good in each region of the display panel, even if the same display defect problem exists in each region of the sub-pixels, the negative influence of the display defect problem due to the good uniformity can be reduced, and good display effect of the display panel can be ensured.
In summary, the above-described method can improve the display effect of the display panel by improving the aperture ratio of the display panel and the uniformity of the display effect in each region while ensuring the good display effect of the display panel.
In the technical scheme of the application, the anode via holes of each sub-pixel in the display panel are arranged at the geometric center of the display area in a regular graph shape, all the sub-pixels are divided into a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, the first sub-pixels and the second sub-pixels are alternately arranged in the column direction, the central connecting lines of the anode via holes of two first sub-pixels and the anode via holes of two second sub-pixels which are adjacently arranged form a first virtual quadrangle, the anode via holes of the third sub-pixels are positioned at diagonal intersection points of the corresponding first virtual quadrangle, the central connecting lines of the anode via holes of four third sub-pixels which are adjacently arranged form a second virtual quadrangle, the anode via holes of the first sub-pixels and the anode via holes of the second sub-pixels are respectively positioned at diagonal intersection points of the corresponding second virtual quadrangle, and the first virtual quadrangle and the second virtual quadrangle are congruent. According to the mode, the anode via holes are positioned at the geometric center of the display area, so that anodes positioned in the display area can be connected with corresponding driving circuits through the anode via holes positioned in the display area without correspondingly configuring anode wires extending from the display area to the outside of the display area, the arrangement of the anode wires is reduced or omitted, the occupation ratio of the display area in the display panel is improved, the opening ratio and the opening ratio of the display panel are further improved, in addition, the anode via holes are positioned at the geometric center of each regular graph-shaped display area, and the combination of the anode via holes of all the subpixels in each area and the relative position relation of the corresponding display area on the display panel can be ensured to have the same arrangement rule through the first virtual quadrangle formed by the anode via hole center connecting lines between the first subpixels and the second subpixels which are adjacently arranged and the second virtual quadrangle formed by the anode via hole center connecting lines between the third subpixels which are adjacently arranged, so that the uniformity of the display effect of each area can be further improved. In summary, the display effect of the display panel can be improved based on the above-described mode.
In one embodiment, the first virtual quadrangle a and the second virtual quadrangle B are square.
The display panel further comprises a plurality of supporting layers, the intersection point of the first virtual quadrangle A and the second virtual quadrangle B is used as a target intersection point, and at least part of the target intersection points are respectively provided with a supporting layer.
Specifically, as shown in fig. 1, C is the intersection point of one of the first virtual quadrangle a and the second virtual quadrangle B, and each target intersection point C may be used to set a supporting layer, where a portion or all of the target intersection points C in the display panel are provided with supporting layers, and the supporting layers may specifically be PS layers.
Alternatively, the shapes of the first sub-pixel 11, the second sub-pixel 12 and the third sub-pixel 13 are all regular octagons or regular circles, the shape of the first sub-pixel 11 is congruent with the shape of the second sub-pixel 12, and the shape of the second sub-pixel 12 is congruent with the shape of the third sub-pixel 13.
Specifically, when the first sub-pixel 11, the second sub-pixel 12, and the third sub-pixel 13 are all regular octagons with equal areas, as shown in fig. 3, a corresponding support layer D may be disposed at least one target intersection point, that is, a support layer D may be disposed at a gap between adjacent four regular octagons.
When the first, second and third sub-pixels 11, 12 and 13 are all right circular in shape with equal areas, as shown in fig. 4, a corresponding support layer D may be disposed at least one target intersection point, that is, at the space between adjacent four right circular sub-pixels.
Based on the above mode, when the shape of the sub-pixel is regular octagon, because the regular octagon is a multi-axis symmetrical graph, when the target sub-pixel X is regular octagon, the anode opening Y is arranged at the geometric center of the display area of the regular octagon, the influence of the signal received by the sub-pixel on each direction in the pixel is consistent, so that the colors displayed by the sub-pixel under each view angle are relatively similar, the color cast phenomenon is weakened, and the display effect of the display panel is improved.
When the shape of the sub-pixel is a perfect circle, the distance between each edge point of the anode via hole Y in the target sub-pixel X and the corresponding edge point of the target sub-pixel X is consistent, so that the diffraction phenomenon generated by the anode via hole Y in the display area is further weakened or eliminated, and the display effect of the display panel is improved.
In an embodiment, referring to fig. 5, fig. 5 is a schematic structural diagram of a fifth embodiment of the display panel of the present application, the display panel further includes a plurality of support layers D and a substrate, the plurality of sub-pixels 10 are disposed on the substrate, each support layer D is disposed on a corresponding sub-pixel 10, and a projection of the support layer D on the substrate overlaps a projection of the anode via Y of the corresponding sub-pixel 10 on the substrate.
Specifically, as shown in fig. 6, the support layer D may be disposed on the anode via Y, so that the support layer D and the anode via Y commonly occupy the same partial area in the display area, thereby reducing the non-opening area of the sub-pixel 10 and improving the opening ratio of the sub-pixel 10 on the display panel.
In addition, the support layer D is also disposed at the geometric center of the display area where the anode via Y is located, so that the symmetry of the single sub-pixel 10 can be further improved, and further the color shift phenomenon under different viewing angles caused by the asymmetry of the factor pixel 10 is reduced or eliminated, so as to further improve the display effect of the display panel.
Optionally, as shown in fig. 6, a supporting layer D is disposed on each sub-pixel 10.
Specifically, the corresponding supporting layers D are respectively disposed on all the sub-pixels 10, so as to ensure that the supporting effect of the supporting layers D can be better at each site on the display panel, and improve the reliability of the display panel.
In one embodiment, the first virtual quadrilateral a is one of square, rectangular, and isosceles trapezoid.
Specifically, as shown in fig. 1, 3 and 4, the first virtual quadrangle a may be a rectangle (square or rectangle), and as shown in fig. 2, the first virtual quadrangle a may be an isosceles trapezoid.
When the first virtual quadrangle a and the second virtual quadrangle B are equal, the first virtual quadrangle a and the second virtual quadrangle B can be rectangular or isosceles trapezoid or other quadrangles, and the first virtual quadrangle a and the second virtual quadrangle B can be specific according to actual requirements and are not limited herein.
In one embodiment, the regular pattern with geometric centers is a centrosymmetric pattern.
Specifically, the center symmetrical pattern is one of regular polygon, regular circle, diamond and other center symmetrical patterns of even sides.
Based on the above-described manner, when the display area of the sub-pixel is a center-symmetrical pattern, the anode via Y is positioned at the geometric center of the display area, so that the diffraction phenomenon caused by the anode via Y being positioned in the display area can be further reduced, that is, the display effect of the display panel can be further improved.
In an embodiment, the first sub-pixel 11, the second sub-pixel 12 and the third sub-pixel 13 are respectively configured to emit light of different colors.
Specifically, the first subpixel 11 may be a red subpixel, the second subpixel 12 may be a green subpixel, the third subpixel 13 may be a blue subpixel, and the first, second, and third subpixels 11, 12, 13 may be specifically other color combinations, which are not limited herein.
It should be noted that, in the display panels shown in fig. 1 to 4, the display areas of the sub-pixels are all the same shape, and in other embodiments, the display areas of the different sub-pixels on the same display panel may also be different regular patterns, which may be specifically determined according to practical needs, and are not limited herein.
The application further provides a display device, referring to fig. 6, fig. 6 is a schematic structural diagram of an embodiment of the display device of the application, as shown in fig. 6, the display device 30 includes a power module 31 and a display panel 32, and the display panel 32 may be a display panel described in any of the foregoing embodiments, which is not repeated herein.
In the technical scheme of the application, the anode via holes of each sub-pixel in the display panel are arranged at the geometric center of the display area in a regular graph shape, all the sub-pixels are divided into a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, the first sub-pixels and the second sub-pixels are alternately arranged in the column direction, the central connecting lines of the anode via holes of two first sub-pixels and the anode via holes of two second sub-pixels which are adjacently arranged form a first virtual quadrangle, the anode via holes of the third sub-pixels are positioned at diagonal intersection points of the corresponding first virtual quadrangle, the central connecting lines of the anode via holes of four third sub-pixels which are adjacently arranged form a second virtual quadrangle, the anode via holes of the first sub-pixels and the anode via holes of the second sub-pixels are respectively positioned at diagonal intersection points of the corresponding second virtual quadrangle, and the first virtual quadrangle and the second virtual quadrangle are congruent. According to the mode, the anode via holes are positioned at the geometric center of the display area, so that anodes positioned in the display area can be connected with corresponding driving circuits through the anode via holes positioned in the display area without correspondingly configuring anode wires extending from the display area to the outside of the display area, the arrangement of the anode wires is reduced or omitted, the occupation ratio of the display area in the display panel is improved, the opening ratio and the opening ratio of the display panel are further improved, in addition, the anode via holes are positioned at the geometric center of each regular graph-shaped display area, and the combination of the anode via holes of all the subpixels in each area and the relative position relation of the corresponding display area on the display panel can be ensured to have the same arrangement rule through the first virtual quadrangle formed by the anode via hole center connecting lines between the first subpixels and the second subpixels which are adjacently arranged and the second virtual quadrangle formed by the anode via hole center connecting lines between the third subpixels which are adjacently arranged, so that the uniformity of the display effect of each area can be further improved. In summary, the display effect of the display panel can be improved based on the above-described mode.
In the description of the present application, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless explicitly defined otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and further implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present application.
Logic and/or steps represented in the flowcharts or otherwise described herein, e.g., may be considered as a ordered listing of executable instructions for implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device (which can be a personal computer, server, network device, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions). For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.

Claims (9)

1. A display panel comprising a plurality of sub-pixels, each sub-pixel comprising an anode and an anode via, the anode being for connection to a drive circuit through a corresponding anode via, the display area of each sub-pixel being shaped as a regular pattern having a geometric center, the anode via of the sub-pixel being located at the geometric center of the corresponding display area;
the plurality of sub-pixels are divided into a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, and the first sub-pixels and the second sub-pixels are alternately arranged along a column direction;
the central connecting lines of the anode through holes of the two first sub-pixels and the anode through holes of the two second sub-pixels which are adjacently arranged form a first virtual quadrangle, and the anode through holes of the third sub-pixels are positioned at diagonal intersection points of the corresponding first virtual quadrangles;
the central connecting lines of the anode through holes of the four adjacent third sub-pixels form a second virtual quadrangle, and the anode through holes of the first sub-pixels and the anode through holes of the second sub-pixels are respectively positioned at the diagonal intersection points of the corresponding second virtual quadrangles;
the first virtual quadrangle is congruent with the second virtual quadrangle;
the display panel further comprises a plurality of supporting layers, the intersection point of the first virtual quadrangle and the second virtual quadrangle is used as a target intersection point, at least part of the target intersection points are respectively provided with one supporting layer, and each sub-pixel is provided with one supporting layer.
2. The display panel of claim 1, wherein the first virtual quadrilateral is one of a square, a rectangle, and an isosceles trapezoid.
3. The display panel of claim 1, wherein the regular pattern having a geometric center is a center symmetrical pattern.
4. A display panel according to claim 3, wherein the centrosymmetric pattern is one of regular polygons with even sides, regular circles and diamonds.
5. The display panel of any one of claims 1-4, wherein the first virtual quadrangle and the second virtual quadrangle are square.
6. The display panel of claim 5, wherein the first, second, and third sub-pixels are each regular octagon or regular circle in shape, the first sub-pixel is congruent with the second sub-pixel in shape, and the second sub-pixel is congruent with the third sub-pixel in shape.
7. The display panel of any one of claims 1 to 4, further comprising a plurality of support layers and a substrate, a plurality of the sub-pixels being disposed on the substrate, each of the support layers being disposed on a respective one of the sub-pixels, a projection of the support layers on the substrate overlapping a projection of an anode via of the respective sub-pixel on the substrate.
8. The display panel according to any one of claims 1 to 4, wherein the first subpixel, the second subpixel, and the third subpixel are each configured to emit light of a different color.
9. A display device comprising a power supply module and the display panel according to any one of claims 1 to 8.
CN202211409269.6A 2022-11-09 2022-11-09 Display panel and display device Active CN115715128B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211409269.6A CN115715128B (en) 2022-11-09 2022-11-09 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211409269.6A CN115715128B (en) 2022-11-09 2022-11-09 Display panel and display device

Publications (2)

Publication Number Publication Date
CN115715128A CN115715128A (en) 2023-02-24
CN115715128B true CN115715128B (en) 2024-04-12

Family

ID=85232980

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211409269.6A Active CN115715128B (en) 2022-11-09 2022-11-09 Display panel and display device

Country Status (1)

Country Link
CN (1) CN115715128B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117560953B (en) * 2023-12-19 2024-10-22 惠科股份有限公司 Display panel

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016101619A1 (en) * 2014-12-22 2016-06-30 信利(惠州)智能显示有限公司 Oled pixel arrangement structure and display device
KR20170116598A (en) * 2017-09-28 2017-10-19 삼성디스플레이 주식회사 Pixel arrangement structure for organic light emitting display device
CN107945738A (en) * 2017-11-30 2018-04-20 上海天马微电子有限公司 Organic light-emitting display panel and electronic equipment
CN109860237A (en) * 2018-12-13 2019-06-07 昆山国显光电有限公司 Pixel arrangement structure, display panel and display device
CN110047905A (en) * 2019-05-16 2019-07-23 京东方科技集团股份有限公司 Display base plate, display panel and display device
CN111987128A (en) * 2020-08-26 2020-11-24 武汉天马微电子有限公司 Display panel and display device
CN112216717A (en) * 2019-07-10 2021-01-12 三星显示有限公司 Display device
CN112470287A (en) * 2020-09-10 2021-03-09 京东方科技集团股份有限公司 Display substrate and related device
CN112534583A (en) * 2020-09-10 2021-03-19 京东方科技集团股份有限公司 Display substrate, display device and high-precision metal mask plate
CN215527732U (en) * 2021-07-01 2022-01-14 武汉天马微电子有限公司 Display panel and display device
CN114141834A (en) * 2021-11-24 2022-03-04 武汉华星光电半导体显示技术有限公司 Display panel
WO2022052193A1 (en) * 2020-09-10 2022-03-17 京东方科技集团股份有限公司 Display substrate, display device, and high-precision metal mask
CN115117134A (en) * 2022-06-28 2022-09-27 武汉天马微电子有限公司 Display panel and display device
CN115132798A (en) * 2022-06-23 2022-09-30 昆山国显光电有限公司 Display panel and display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112997241B (en) * 2019-10-14 2024-01-09 京东方科技集团股份有限公司 Array substrate and display panel

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016101619A1 (en) * 2014-12-22 2016-06-30 信利(惠州)智能显示有限公司 Oled pixel arrangement structure and display device
KR20170116598A (en) * 2017-09-28 2017-10-19 삼성디스플레이 주식회사 Pixel arrangement structure for organic light emitting display device
CN107945738A (en) * 2017-11-30 2018-04-20 上海天马微电子有限公司 Organic light-emitting display panel and electronic equipment
CN109860237A (en) * 2018-12-13 2019-06-07 昆山国显光电有限公司 Pixel arrangement structure, display panel and display device
CN110047905A (en) * 2019-05-16 2019-07-23 京东方科技集团股份有限公司 Display base plate, display panel and display device
CN112216717A (en) * 2019-07-10 2021-01-12 三星显示有限公司 Display device
CN111987128A (en) * 2020-08-26 2020-11-24 武汉天马微电子有限公司 Display panel and display device
CN112470287A (en) * 2020-09-10 2021-03-09 京东方科技集团股份有限公司 Display substrate and related device
CN112534583A (en) * 2020-09-10 2021-03-19 京东方科技集团股份有限公司 Display substrate, display device and high-precision metal mask plate
WO2022052193A1 (en) * 2020-09-10 2022-03-17 京东方科技集团股份有限公司 Display substrate, display device, and high-precision metal mask
CN215527732U (en) * 2021-07-01 2022-01-14 武汉天马微电子有限公司 Display panel and display device
CN114141834A (en) * 2021-11-24 2022-03-04 武汉华星光电半导体显示技术有限公司 Display panel
CN115132798A (en) * 2022-06-23 2022-09-30 昆山国显光电有限公司 Display panel and display device
CN115117134A (en) * 2022-06-28 2022-09-27 武汉天马微电子有限公司 Display panel and display device

Also Published As

Publication number Publication date
CN115715128A (en) 2023-02-24

Similar Documents

Publication Publication Date Title
JP6759396B2 (en) Pixel structure and its display method, display device
RU2745693C1 (en) Pixel layout structure, display substrate, display device, and masking plate group
US10978516B2 (en) Organic light-emitting display panel and display device
TW201430816A (en) Pixel and sub-pixel arrangements in a display panel
CN108828851B (en) Display panel and display device
CN108565277B (en) Display panel and manufacturing method thereof
CN115715128B (en) Display panel and display device
CN109994515B (en) Irregularly shaped flat panel display having irregularly shaped pixels
EP4369400A1 (en) Display panel
CN113471271B (en) Display panel and display device
CN109768073B (en) Pixel arrangement structure of organic light-emitting diode display and display panel
CN110518047B (en) Pixel structure, display panel and display device
CN110580873B (en) Display panel and display device
CN102354702A (en) Pixel structure of organic light emitting diode (OLED)
CN111383542A (en) Pixel structure and display panel
CN114512521A (en) Pixel arrangement structure, display panel and display device
KR20150106622A (en) Organic light emitting display apparatus
CN111755495A (en) Pixel arrangement structure, high-precision metal mask plate and display panel
WO2019148678A1 (en) Pixel arrangement structure for organic light-emitting diode, and display panel
CN114864652B (en) Display panel, display module and display device
US11308898B2 (en) Pixel arrangement structure and display panel
CN115715129B (en) Display panel and display device
CN105976719B (en) Display device
CN115802837B (en) Display panel and display device
CN112103313A (en) OLED panel pixel arrangement

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant