CN108536562A - A kind of server debugging apparatus and server - Google Patents
A kind of server debugging apparatus and server Download PDFInfo
- Publication number
- CN108536562A CN108536562A CN201810626695.2A CN201810626695A CN108536562A CN 108536562 A CN108536562 A CN 108536562A CN 201810626695 A CN201810626695 A CN 201810626695A CN 108536562 A CN108536562 A CN 108536562A
- Authority
- CN
- China
- Prior art keywords
- server
- debugging
- programmable logic
- serial ports
- logic devices
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000007726 management method Methods 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention discloses a kind of server debugging apparatus and servers.Disclosed server debugging apparatus, including Complex Programmable Logic Devices, equipment handover module, display module and serial ports seat, equipment handover module, display module and serial ports seat are connect with Complex Programmable Logic Devices, the Complex Programmable Logic Devices is arranged on server master board, and Complex Programmable Logic Devices needs commissioning device to connect with other on mainboard.Cabinet can not be opened, the various equipment on server master board are debugged and updated, improves server debugging and newer flexibility and efficiency.
Description
Technical field
The present invention relates to server technology field more particularly to a kind of server debugging apparatus.The invention further relates to tools
There is the server of above-mentioned server debugging apparatus.
Background technology
The debugging of current domestic server is only by debugging serial ports(UART)Export type information to diagnose fault, so not
Conducive to scheduling and planning and maintenance diagnostics.The unified debugging interface of domestic server neither one simultaneously, the equipment debugging of server
Interface is reserved on cabinet mainboard, just very troublesome when each equipment goes wrong or needs firmware updating, needs to open
Cabinet is debugged and is updated to each equipment respectively, and the debugging and update of various equipment on mainboard is caused to become cumbersome.
Therefore how cabinet is not opened, the various equipment on server master board is debugged and updated, improve clothes
The debugging of business device and newer flexibility and efficiency, become those skilled in the art assistant officer's problem to be solved.
Invention content
The technical problem to be solved by the present invention is to overcome drawbacks described above of the existing technology, provide a kind of server tune
Trial assembly, which is set, can not open cabinet, and the various equipment on server master board are debugged and updated, improve server debugging and
Newer flexibility and efficiency.
The further technical problems to be solved of the present invention are on the basis of providing above-mentioned server debugging apparatus, also to carry
For a kind of server including above-mentioned server debugging apparatus.
Server debugging apparatus provided by the invention, including Complex Programmable Logic Devices, equipment handover module, display mould
Block and serial ports seat, equipment handover module, display module and serial ports seat are connect with Complex Programmable Logic Devices, and the complexity can
Programmed logic device is arranged on server master board, and Complex Programmable Logic Devices needs commissioning device to connect on mainboard.
Preferably, described device further includes connector, Complex Programmable Logic Devices, equipment handover module, display module
It is connect with connector with serial ports seat.
Preferably, it needs commissioning device to include CPU on the mainboard and needs commissioning device, the complexity with debugging serial ports
Programmable logic device is connect by LPC interfaces with CPU, and the Complex Programmable Logic Devices is by debugging on serial ports and mainboard
Commissioning device is needed to connect with debugging serial ports.
Preferably, the Complex Programmable Logic Devices is connect with connector by debugging serial ports and GPIO interface, is connected
The debugging serial ports of device is connect with serial ports seat, and equipment handover module, display module and connector are connected by GPIO interface.
Preferably, the equipment handover module, display module and serial ports seat are arranged on one piece of debugging board, the company
It connects device to be arranged on server panel, the debugging board can be connect by inserting mode with connector.
Preferably, the equipment handover module is button.
Preferably, the display module is charactron.
Preferably, PORT80 codes are sent to Complex Programmable Logic Devices by CPU by lpc bus.
Preferably, the numeral method PORT80 codes.
Cabinet can not be opened, the various equipment on server master board are debugged and updated, improves server debugging
With newer flexibility and efficiency.
The present invention further solve its technical problem the technical solution adopted is that, the server debugging apparatus is being provided
On the basis of, the present invention also provides the servers that a kind of server includes above-mentioned server debugging apparatus.
Description of the drawings
Fig. 1 is a kind of structure diagram for server debugging apparatus that the first embodiment provides;
Fig. 2 is a kind of structure diagram for server debugging apparatus that second of embodiment provides;
Fig. 3 is a kind of structure diagram for server debugging apparatus that the third embodiment provides;
Fig. 4 is the state transition graph for the LPC protocol analysis state machines for realizing the transmission of PORT80 codes.
Specific implementation mode
In order that those skilled in the art will better understand the technical solution of the present invention, below in conjunction with the accompanying drawings to the present invention
It is described in further detail.
Referring to Fig. 1, Fig. 1 is a kind of structure diagram for server debugging apparatus that the first embodiment provides.
The present invention provides a kind of server debugging apparatus, including Complex Programmable Logic Devices 20, equipment handover module
11, display module 12 and serial ports seat 13, equipment handover module 11, display module 12 and serial ports seat 13 are and complex programmable logic
Device 20 connects, and the Complex Programmable Logic Devices 20 is arranged on server master board 70, Complex Programmable Logic Devices
20 connect with the equipment of need debugging or upgrading on mainboard.
When debugging, user can select the device number for needing to debug by equipment handover module 11, be sent to complex programmable
Logical device 20.Complex Programmable Logic Devices 20 gates the equipment that need to be debugged, and the need of reception correlation to be shown is believed
Breath is sent to display module 12 and serial ports seat 13.Display module 12 need to relevant information to be shown show.Serial ports seat 13
Can external external debugging device debugged to mainboard device need to be debugged.
When upgrading, user can select the device number for needing to upgrade by equipment handover module 11, be sent to complex programmable
Logical device 20.Complex Programmable Logic Devices 20 gates the equipment that need to upgrade.Serial ports seat 13 connects from external debugging device
Upgrade package is received, and upgrade package is sent to the mainboard device that need to upgrade by Complex Programmable Logic Devices 20.
Preferably due to which the function of Complex Programmable Logic Devices is relatively more flexible, relative low price, largely used
Electricity is cut in reset control in adding for server master board, and existing Complex Programmable Logic Devices can then not have to volume in server master board
Outer increase device uses original Complex Programmable Logic Devices on mainboard.
Cabinet can not be opened, the various equipment on server master board are debugged and updated, improves server debugging
With newer flexibility and efficiency.
Referring to Fig. 2, Fig. 2 is a kind of structure diagram for server debugging apparatus that second of embodiment provides.
The present invention provides a kind of server debugging apparatus, including Complex Programmable Logic Devices 20, equipment handover module
11, display module 12, serial ports seat 13 and connector 31, Complex Programmable Logic Devices 20, equipment handover module 11, display module
12 and serial ports seat 13 connect with connector 31.
The Complex Programmable Logic Devices 20 is arranged on server master board 70, needs to debug on the mainboard or upgrade
Equipment includes CPU61 and the need debugging with debugging serial ports or updating apparatus.Complex Programmable Logic Devices 20 passes through LPC(Low
Pin Count, i.e. low pin count mesh interface)Interface is connect with CPU61, is communicated with CPU61 and is parsed LPC agreements.The complexity
Programmable logic device is by debugging serial ports, that is, UART(Universal Asynchronous Receiver/Transmitter,
That is universal asynchronous receiving-transmitting transmitter)Interface is connect with the need debugging or updating apparatus on mainboard with debugging serial ports.The mainboard
Upper other need with debugging serial ports are debugged or updating apparatus can be baseboard management controller(Baseboard Management
Controller, abbreviation BMC)62, standby power unit(Battery Backup Unit, abbreviation BBU)63 and SAS expansion cards
(Serial Attached SCSI Expand, abbreviation SAS Expand)64.The Complex Programmable Logic Devices can also be with master
The need debugging or updating apparatus connection of other non-debugging serial ports on plate.As Complex Programmable Logic Devices 20 can be with I2C interface
Mainboard device and the connection of the mainboard device of CAN interface, Complex Programmable Logic Devices 20 can realize that I2C interface and serial ports are two-way
Protocol conversion, CAN interface and the conversion of serial ports bidirectional protocol.
Complex Programmable Logic Devices 20 is connect with connector 31 by debugging serial ports and GPIO interface, the tune of connector 31
Examination serial ports is connect with serial ports seat 13, and equipment handover module 11, display module 12 are connect by GPIO interface with connector 31.
It realizes and the debugging interface of each equipment in system is switched to by connector 31 by outside, and pass through equipment handover module
11 realize debugging and update to each equipment in system.
Referring to Fig. 3 and Fig. 4, Fig. 3 is a kind of structure diagram for server debugging apparatus that the third embodiment provides, figure
4 be the state transition graph for the LPC protocol analysis state machines for realizing the transmission of PORT80 codes.
The present invention provides a kind of server debugging apparatus, including Complex Programmable Logic Devices 20, equipment handover module
11, display module 12, serial ports seat 13 and connector 31, Complex Programmable Logic Devices 20, equipment handover module 11, display module
12 and serial ports seat 13 connect with connector 31.
The equipment handover module 11, display module 12 and serial ports seat 13 are arranged on one piece of debugging board 10, described
Connector 31 may be provided on server panel 30.When needing to debug or upgrade, the debugging board 10 can pass through inserting mode
It is connect with connector 30, the debugging serial ports of connector 31 is connect with serial ports seat 13, and GPIO interface and the equipment of connector 31 switch
Module 11, display module 12 connect.When needing not debug and upgrade, debugging board 10 can be taken down from connector 30, disconnect with
The connection of connector 30.The equipment handover module 11 is button, and the display module 12 is charactron.
The Complex Programmable Logic Devices 20 is arranged on server master board 70, and Complex Programmable Logic Devices 20 is logical
It crosses LPC interfaces to connect with CPU61, be communicated with CPU61, and parse LPC agreements.CPU61 receives the state letter of server master board 70
Breath, and the status information of server master board 70 is sent to Complex Programmable Logic Devices 20 by LPC interfaces.The complexity can
Programmed logic device is connect by debugging serial ports and baseboard management controller 62, standby power unit 63 and SAS expansion cards 64 etc..
Complex Programmable Logic Devices 20 is connect with connector 31 by debugging serial ports and GPIO interface.
PORT80 codes are sent to Complex Programmable Logic Devices 20 by CPU61 by lpc bus.PORT80 codes are server
The status information of mainboard.PORT80 codes are sent to charactron 12 by Complex Programmable Logic Devices 20 by connector 31.When need
When debugging or upgrading, the connection of Complex Programmable Logic Devices 20 and CPU61 is the state of gating always, and CPU61 passes through LPC
PORT80 codes are sent to charactron 12 by bus by Complex Programmable Logic Devices 20 and connector 31.Continue on charactron 12
Show PORT80 codes.
When debugging or upgrading, the connection of Complex Programmable Logic Devices 20 and CPU61 is the state of gating, Yong Huke always
The control signal that equipment of serial switches is sent to 20 sum number of Complex Programmable Logic Devices by the button 11 on debugging board 10
Code pipe 12.The control signal switched successively according to the equipment of serial for pushing button 11 transmissions shows setting at this time on charactron 12
Standby number, Complex Programmable Logic Devices 20 switches successively in a predetermined order by the equipment gating in addition to CPU61.External external debugging
Equipment by being connect with serial ports seat 13, and then by connector 31 and Complex Programmable Logic Devices 20 to gating mainboard device into
Row debugging or upgrading.PORT80 codes are sent to charactron 12 by CPU61 by Complex Programmable Logic Devices 20 and connector 31.
Due to there was only a charactron 12 on debugging board, and charactron 12 needs moment display system status information, i.e. moment to show
PORT80 codes use the multiplexing mechanism of charactron, 2s can be shown when button 11 is pressed to solve device number display problem
Device number, later again restore show PORT80 codes.
The button 11, charactron 12 and serial ports seat 13 are arranged on one piece of debugging board.The setting of the connector 31 is taking
It is engaged on device panel 30.When needing to debug or update, the debugging board 10 can be connect by inserting mode with connector 30.It can be right
Mainboard device is realized and easily debugs and update immediately.And the control letter of 11 sending device serial ports of the button switching on debugging board 10
Number, commissioning device number and PORT80 codes are needed, it can be achieved that simple, intuitive understands the reality of mainboard by the multiplexing display of charactron 12
When status information and need commissioning device number.
Complex Programmable Logic Devices 20 is connect by LPC interfaces with CPU61, and CPU61 is by lpc bus by PORT80 codes
Relevant information is sent to Complex Programmable Logic Devices 20, and Complex Programmable Logic Devices 20 parses LPC agreements.Complex programmable
Logical device 20 parses LPC agreements and is realized by writing state machine.Due to Complex Programmable Logic Devices 20 and CPU61
Between realize that the transmission of PORT80 codes is unidirectional, therefore state machine need not realize complete LPC agreements, can be assisted to LPC
View parsing is simplified.The LPC protocol state machines of CPU61 write devices should include 13 states, be respectively RESET, IDLE,
ADDR3、ADDR2、ADDR1、ADDR0、WP80LOW、WP80HIGH、TARIN1、TARIN2、SYNC_RDY、TAROUT1、
TAROUT2.Conversion between state is as shown in state diagram 4.One normal data transmission flow is as follows:
Step S1:LPC beginningizations, state machine are placed in RESET state;
Step S2:When Lframe signals are low, state machine enters IDLE state;
Step S3:Complex Programmable Logic Devices 20 receives the addresses 16bit, since the data line of LPC only has LAD [3:0], therefore
It needs to enter state ADDR3, ADDR2, ADDR1 and ADDR0, receives the 4bit of address every time;
Step S4:When the address that Complex Programmable Logic Devices 20 receives is 0x80, illustrate that the instruction of CPU61 is exactly to transmit
PORT80 codes obtain the PORT80 codes of 8bit by state WP80LOW and WP80HIGH;
Step S5:State TRIN1, TRIN2, SYNC_RDY, TAROUT1, TAROUT2 are also the interface sequence flow of LPC agreements,
Only when these sequential flows are covered, data are just transmitted;
Step S6:After the completion of data transmission, state machine is eventually returned to RESET state.
The present invention also provides a kind of server, which has above-mentioned server debugging apparatus, due to above-mentioned clothes
Business device debugging apparatus has above-mentioned technique effect, and the server with the server debugging apparatus should also be imitated with corresponding technology
Fruit is no longer described in detail herein.
A kind of server debugging apparatus provided by the present invention and server are described in detail above.It answers herein
With specific case, principle and implementation of the present invention are described, and the explanation of above example is only intended to help to manage
Solve core of the invention thought.It should be pointed out that for those skilled in the art, not departing from original of the invention
, can be with several improvements and modifications are made to the present invention under the premise of reason, these improvement and modification also fall into right of the present invention and want
In the protection domain asked.
Claims (10)
1. a kind of server debugging apparatus, which is characterized in that including Complex Programmable Logic Devices, equipment handover module, display
Module and serial ports seat, equipment handover module, display module and serial ports seat are connect with Complex Programmable Logic Devices, the complexity
Programmable logic device is arranged on server master board, and Complex Programmable Logic Devices needs commissioning device to connect on mainboard
It connects.
2. server debugging apparatus according to claim 1, which is characterized in that described device further includes connector, complicated
Programmable logic device, equipment handover module, display module and serial ports seat are connect with connector.
3. server debugging apparatus according to claim 2, which is characterized in that need the commissioning device to include on the mainboard
CPU and need commissioning device with debugging serial ports, the Complex Programmable Logic Devices is connect by LPC interfaces with CPU, described
Complex Programmable Logic Devices needs commissioning device to connect on mainboard by debugging serial ports with debugging serial ports.
4. server debugging apparatus according to claim 3, which is characterized in that the Complex Programmable Logic Devices and company
It connects device and is connected with GPIO interface by debugging serial ports, the debugging serial ports of connector is connect with serial ports seat, equipment handover module, display
Module is connect by GPIO interface with connector.
5. server debugging apparatus according to claim 4, which is characterized in that the equipment handover module, display module
It is arranged on one piece of debugging board with serial ports seat, the connector is arranged on server panel, and the debugging board can pass through
Inserting mode is connect with connector.
6. server debugging apparatus according to claim 5, which is characterized in that the equipment handover module is button.
7. server debugging apparatus according to claim 6, which is characterized in that the display module is charactron.
8. server debugging apparatus according to claim 7, which is characterized in that CPU is sent out PORT80 codes by lpc bus
Give Complex Programmable Logic Devices.
9. server debugging apparatus according to claim 8, which is characterized in that the numeral method PORT80 codes.
10. a kind of server, which is characterized in that including the server debugging apparatus described in any one of claim 1 to 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810626695.2A CN108536562A (en) | 2018-06-19 | 2018-06-19 | A kind of server debugging apparatus and server |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810626695.2A CN108536562A (en) | 2018-06-19 | 2018-06-19 | A kind of server debugging apparatus and server |
Publications (1)
Publication Number | Publication Date |
---|---|
CN108536562A true CN108536562A (en) | 2018-09-14 |
Family
ID=63469834
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810626695.2A Pending CN108536562A (en) | 2018-06-19 | 2018-06-19 | A kind of server debugging apparatus and server |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108536562A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030140291A1 (en) * | 2002-01-04 | 2003-07-24 | Andrew Brown | Method and apparatus for providing JTAG functionality in a remote server management controller |
CN107908582A (en) * | 2017-11-06 | 2018-04-13 | 杭州宏杉科技股份有限公司 | Serial ports switching device and storage device |
-
2018
- 2018-06-19 CN CN201810626695.2A patent/CN108536562A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030140291A1 (en) * | 2002-01-04 | 2003-07-24 | Andrew Brown | Method and apparatus for providing JTAG functionality in a remote server management controller |
CN107908582A (en) * | 2017-11-06 | 2018-04-13 | 杭州宏杉科技股份有限公司 | Serial ports switching device and storage device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101399654B (en) | Serial communication method and apparatus | |
CN101291261B (en) | Method and system for in-board device testing | |
CN108595356B (en) | Hard disk backboard compatible with RSSD hard disk and NVMe hard disk and method | |
CN101141402A (en) | Serial port multiplexing method and device | |
CN110505200A (en) | A kind of multi-protocols daisy chain interface conversion chip | |
CN100382502C (en) | Serial-port mapping system for debugging single board | |
CN105868133A (en) | Remote and concentrated serial port management method for multi-node mainboard | |
CN1972142B (en) | Communications device single board active/standby changeover apparatus and implementation method | |
CN1972143A (en) | Communications device single board active/standby changeover apparatus and implementation method | |
CN208271171U (en) | A kind of server debugging apparatus and server | |
WO2009074074A1 (en) | Cable connector for connecting cable with card and the card | |
CN107942808B (en) | DCS capacity expanding device | |
CN106844277A (en) | A kind of server and its information transferring method | |
CN110096291A (en) | Power management chip upgrades circuit, method and the network equipment | |
CN117793029A (en) | Network-connected central information processing system | |
Laddha et al. | A review on serial communication by UART | |
EP1532534B1 (en) | Universal approach for simulating, emulating, and testing a variety of serial bus types | |
CN108536562A (en) | A kind of server debugging apparatus and server | |
CN117312067A (en) | Network card debugging system, method, equipment and storage medium | |
CN109032978A (en) | A kind of document transmission method based on BMC, device, equipment and medium | |
CN111414327B (en) | Network device | |
CN107395478A (en) | A kind of network control system and network communication module for high speed cigarette packaging facilities | |
CN113063471A (en) | NB-IoT intelligent gas meter based on OpenCPU technology | |
CN112486877A (en) | Outfield guarantee and test platform of universal FC conversion interface module | |
CN107423246B (en) | Slot-adaptive PXI module and PXI system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |