CN107275346B - Display panel and display device - Google Patents
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- CN107275346B CN107275346B CN201710520805.2A CN201710520805A CN107275346B CN 107275346 B CN107275346 B CN 107275346B CN 201710520805 A CN201710520805 A CN 201710520805A CN 107275346 B CN107275346 B CN 107275346B
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- 239000004065 semiconductor Substances 0.000 claims abstract description 112
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- 239000010409 thin film Substances 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims description 68
- 239000002184 metal Substances 0.000 claims description 68
- 238000012360 testing method Methods 0.000 claims description 36
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 15
- 230000004888 barrier function Effects 0.000 claims description 15
- 239000003990 capacitor Substances 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 13
- 229920005591 polysilicon Polymers 0.000 claims description 10
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- 239000011159 matrix material Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 19
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 6
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- 230000008025 crystallization Effects 0.000 description 5
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
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Abstract
This application discloses display panels and display device.Display panel includes substrate, the first semiconductor layer formed on substrate and the second semiconductor layer, and the first semiconductor layer is between substrate and the second semiconductor layer；Display panel is equipped with thin film transistor (TFT) and pressure sensitive unit；Thin film transistor (TFT) includes active layer, and active layer is located at the second semiconductor layer；Pressure sensitive unit includes pressure sensitivity resistance, and pressure sensitivity resistance is located at the first semiconductor layer.The first semiconductor layer that the laser that the display panel and display device can use for protecting substrate and thin film transistor active layer not to be produced in technique is burnt realizes the design of pressure sensitive function; and the pressure sensitive unit can be set in viewing area; the design flexibility of pressure sensitive unit is improved, the accuracy of adherence pressure touch control detection is conducive to.
Description
Technical field
This application involves field of display technology, and in particular to display panel and display device.
Background technique
With the development of display technology, with pressure sensitive function display device using more and more extensive.It is showing
The availability of pressure sensitive function and accuracy are an important indexs in device.
The design of pressure sensitive function is mainly using condenser type or the pressure sensor of resistance-type in existing display screen.In
In the design of resistive pressure sensor, in order to avoid the light transmission rate to viewing area impacts, usually multiple pressure are passed
Sensor is set to frame region, and diffusion effect bring voltage change caused by stress when being pressurized is exported using pressure sensor.
In the design of above-mentioned pressure sensitive function, since pressure is normally acting at viewing area, positioned at the pressure of frame region
Force snesor is difficult to accurately incude the pressure size of the position of pressing.Also, for flexible display apparatus, stress is not concentrated in
Frame region, and it is dispersed in each region of whole display device, the pressure sensor in frame region can not incude pressing
Operation, therefore the design of existing pressure sensor is not suitable for flexible display apparatus.
Summary of the invention
In order to solve at least one technical problem of above-mentioned background technology part, the embodiment of the present application provides display panel
And display device.
On the one hand, the embodiment of the present application provides a kind of display panel, including substrate, formed on substrate the first half leads
Body layer and the second semiconductor layer, the first semiconductor layer is between substrate and the second semiconductor layer；Display panel is equipped with film
Transistor and pressure sensitive unit；Thin film transistor (TFT) includes active layer, and active layer is located at the second semiconductor layer；Pressure sensitive unit
Including pressure sensitivity resistance, pressure sensitivity resistance is located at the first semiconductor layer.
Second aspect, the embodiment of the present application provide a kind of display device, including above-mentioned display panel.
Display panel provided by the present application and display device, by being set to pressure sensitive unit positioned at thin film transistor (TFT)
Active layer where the second semiconductor layer and substrate between the first semiconductor layer, can use for protecting substrate and film
The first semiconductor layer that the laser that transistor active layer is not produced in technique is burnt realizes the design of pressure sensitive function, the pressure
Power sensing unit, which can be set, improves the design flexibility of pressure sensitive unit in viewing area, is conducive to adherence pressure touch-control
The accuracy of detection, and realize the pressure sensitive function of flexible display apparatus.
Detailed description of the invention
Non-limiting embodiment is described in detail referring to made by the following drawings by reading, other features,
Objects and advantages will become more apparent upon:
Fig. 1 is a structural schematic diagram according to the display panel of the embodiment of the present application；
One the schematic diagram of the section structure of display panel shown in Fig. 2 Fig. 1；
Fig. 3 is the structural schematic diagram of an equivalent circuit of the pressure sensitivity unit in display panel shown in Fig. 1；
Fig. 4 is another the schematic diagram of the section structure of display panel shown in Fig. 1；
Fig. 5 is another the schematic diagram of the section structure of display panel shown in Fig. 1；
Fig. 6 is another the schematic diagram of the section structure of display panel shown in Fig. 1；
Fig. 7 is the flow diagram of the production method of display panel shown in Fig. 1；
Fig. 8 is a schematic diagram of the display device of the embodiment of the present application.
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention, rather than the restriction to the invention.It also should be noted that in order to
Convenient for description, part relevant to related invention is illustrated only in attached drawing.
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
Referring to FIG. 1, it illustrates a structural schematic diagrams according to the display panel of the embodiment of the present application.Such as Fig. 1 institute
Show, display panel 100 is equipped with thin film transistor (TFT) 101 and pressure sensitive unit 102.Wherein, thin film transistor (TFT) 101 can be used as
Switching device or driving element may be disposed in viewing area and/or the non-display area of display panel 100.When display panel 100 is
When liquid crystal display panel, thin film transistor (TFT) 101 can be first for providing the switch of display drive signals to pixel in viewing area
Part, or be the switch element in the driving circuit in non-display area；When display panel 100 is organic light emitting display panel,
Thin film transistor (TFT) 101 can be the switch element or driving transistor in pixel circuit in viewing area, or in non-display area
Driving circuit in switch element.
Pressure sensitive unit 102 can be resistive pressure sensor, including pressure sensitivity resistance, the resistance value of pressure sensitivity resistance by
It changes when pressure, depressed position and pressure size be can detecte out by the variation of detection resistance value.
In some optional implementations of the present embodiment, as shown in Figure 1, pressure sensitive unit 102 can shown
It arranges on panel in matrix, the length and width of each pressure sensitive unit 102 is no more than 5mm, i.e., each pressure sensitive unit
The line direction and column direction that are formed by matrix length no more than 5mm.In this way, can be equal by pressure sensitive unit 102
It is distributed the precision for being conducive to adherence pressure touch control detection on a display panel evenly.
Referring to FIG. 2, it illustrates a schematic diagram of the section structure of display panel shown in Fig. 1.
As shown in Fig. 2, display panel 200 (display panel 100 i.e. shown in FIG. 1) includes substrate 20, is formed on substrate
The first semiconductor layer 21 and the second semiconductor layer 22.Wherein, the first semiconductor layer 21 is located at substrate 20 and the second semiconductor layer
Between 22, it is spaced between the first semiconductor layer 21 and the second semiconductor layer 22 by dielectric 23.Thin film transistor (TFT) 101 can
To include the active layer for being used to form conducting channel, which is located at the second semiconductor layer 22.Pressure sensitive unit 102 includes
Pressure sensitivity resistance, the pressure sensitivity resistance are located at the first semiconductor layer 21.
In the present embodiment, the first semiconductor layer 21 can for in manufacture craft to the second semiconductor layer 22 and lining
The film layer that bottom 20 is protected.Specifically, thin film transistor (TFT) can be low temperature polycrystalline silicon (Low Temperature Poly-
Silicon) thin film transistor (TFT), active layer is polysilicon (Poly-silicon) material, in the active layer of thin film transistor (TFT)
In manufacture craft, one layer of amorphous silicon (amorphous silicon, α-Si) material can be deposited first, use quasi- laser later
Molecule annealing (Excimer Laser Annealing, ELA) technology, utilizes the laser (laser A as shown in Figure 2) of certain wavelength
So that the silicon wafer of this layer of amorphous silicon is converted into polysilicon, then again has the active layer pattern that polysilicon graphics turn to thin film transistor (TFT)
Active layer.In ELA technique, if the region that there is the second semiconductor layer 22 gap or amorphous silicon material to lack, laser can be worn
Saturating second semiconductor layer 22.Substrate is damaged in order to avoid laser shines directly into substrate 20 after the second semiconductor layer 22
Wound usually can use the first semiconductor layer 21 and absorb the laser energy for passing through the second semiconductor layer 22 in ELA technique.
In some optional implementations of the present embodiment, display panel is flexible display panels, then substrate 20 can be with
For flexible substrate.Then in the production of flexible display panels, need to provide support to flexible substrate using rigid substrates 201, it
The device and film layer for making display panel on flexible substrates afterwards can use laser after the completion of flexible display panels encapsulation
It removes (Laser Lift Off, LLO) technique, irradiate rigid substrates 201 and flexible liner using laser (laser B as shown in Figure 2)
Release layer between bottom 20, so that rigid substrates 201 be removed from flexible substrate 20.In LLO technique, the first semiconductor layer
21 can be used for the active layer for preventing laser direct irradiation to thin film transistor (TFT), keep thin film transistor (TFT) impaired.
In the present embodiment, pressure is made using the first semiconductor layer of active layer and substrate for protective film transistor
Sensing resistor, pressure sensitivity resistance can be set in viewing area and non-display area in, to improve the design of pressure sensitive unit
Flexibility is conducive to the accuracy of adherence pressure touch control detection.Also, the pressure sensitive unit in the display panel of the present embodiment
The flexible display apparatus of frame region is not centered on suitable for stress, the pressure sensitive function of realizing flexible display apparatus is set
Meter.
In some optional implementations of the present embodiment, above-mentioned second semiconductor layer 22 is the polysilicon layer of doping,
The ion of doping can provide carrier for the active layer of thin film transistor (TFT), and the ion of doping can be arsenic, phosphorus or boron etc..
In some optional implementations of the present embodiment, above-mentioned first semiconductor layer 21 can be the amorphous silicon of doping
Layer or the polysilicon layer of doping.When the first semiconductor layer 21 is the amorphous silicon layer of doping, above-mentioned pressure sensitivity resistance is non-by what is adulterated
Crystal silicon is formed, and with deposited amorphous silicon materials and can be doped in production, later patterned pressure sensitivity resistance.It leads when the first half
When body layer 21 is the polysilicon layer of doping, above-mentioned pressure sensitivity resistance is formed by the polysilicon adulterated, can be with deposited amorphous in production
Silicon materials are simultaneously doped, and the amorphous crystallization of silicon in the amorphous silicon material of doping is then formed the more of doping using ELA technique
Crystal silicon layer, later patterned pressure sensitivity resistance.Due to making the amorphous silicon of the first semiconductor layer be converted into polycrystalline using ELA technique
When silicon, the first semiconductor layer 21 is flood structure, gap is not present, so laser used by ELA technique will not penetrate first
Semiconductor layer 21 and substrate 20 is caused to damage.
In a further embodiment, above-mentioned first semiconductor layer 21 with a thickness of d, 40nm≤d≤60nm, such as d=
45nm.The thickness of above-mentioned second semiconductor layer 22 can be identical as the thickness of the first semiconductor layer.The thickness of first semiconductor layer 21
Degree d is unfavorable for ELA technique to the crystallization of amorphous silicon when being more than 60nm, the thickness d of the first semiconductor layer 21 forms a film when being lower than 40nm
Uniformity will receive influence.By designing the thickness d of the first semiconductor layer 21 between 40nm to 60nm, it is ensured that film forming is equal
Even property is good, and can guarantee that ELA technique can be effectively by all amorphous silicon particles crystallization.
In some embodiments of the present application, above-mentioned pressure sensitive unit may include pressure sensitivity resistance and connect with pressure sensitivity resistance
First input end, the second input terminal, the first test side, the second test side connect.The pressure sensitivity resistance can be used for receiving first defeated
Enter the voltage input signal at end and the input of the second input terminal, and believes to the first test side and the detection of the second test side output voltage
Number, the pressure size sensed can be calculated according to voltage detection signal later.Specifically, pressure sensitivity resistance, which is connected to, includes
Above-mentioned first input end, the second input terminal, the first test side, the second test side circuit in, first input end and second input
End can provide supply voltage to pressure sensitivity resistance, and pressure sensitivity resistance resistance value when being pressurized changes, so that connected to it
The voltage difference of the signal of first test side and the output of the second test side is different from the voltage difference of the signal of the output when not being pressurized.
Further, above-mentioned pressure sensitive unit can be the MEMS (Microelectro of semiconductor material
Mechanical Systems, MEMS) sensor, for example, silicon substrate MEMS sensor.MEMS sensor includes two input terminals
With two output ends and pressure sensitivity resistance, two input terminals apply input voltage when MEMS sensor works, and two output end voltages are poor
Resistance value for output signal, pressure sensitivity resistance changes because MEMS sensor is by plane shear stress, and variable quantity and flat
The size and Orientation of face shear stress is related, therefore can use MEMS sensor as pressure sensitive unit to carry out pressure touching
Control detection.
Referring to FIG. 3, Fig. 3 is the structural schematic diagram of an equivalent circuit of the pressure sensitivity unit in display panel shown in Fig. 1.
As shown in figure 3, pressure sensitive unit 300 (pressure sensitive unit shown in Fig. 1 102) includes first input end IN1,
Two input terminal IN2, the first test side Fout1, the second test side Fout2 and four pressure sensitivity resistance；Here four pressure sensitivity electricity
Resistance is respectively the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, third pressure sensitivity resistance R3 and the 4th pressure sensitivity resistance R4.
The first end of first pressure sensitivity resistance R1, the first end of the 4th pressure sensitivity resistance R4 are electrically connected with first input end IN1, the
The second end of two pressure sensitivity resistance R2 and the second end of third pressure sensitivity resistance R3 are electrically connected with the second input terminal IN2, the first pressure sensitivity electricity
The second end and the first end of the second pressure sensitivity resistance R2 for hindering R1 are connect with the first test side Fout1, and the of third pressure sensitivity resistance R3
The second end of one end and the 4th pressure sensitivity resistance R4 are electrically connected with the second test side Fout2.
In the present embodiment, the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, third pressure sensitivity resistance R3 and the 4th pressure sensitivity
Resistance R4 is both formed in above-mentioned first semiconductor layer, and the resistance value of four pressure sensitivity resistance changes when being pressurized.Wherein first
Pressure sensitivity resistance R1 and third pressure sensitivity resistance R3 stretches simultaneously, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 while shrinking；Or
Person the first pressure sensitivity resistance R1 and third sensing resistor R3 shrink simultaneously, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 while drawing
It stretches.That is, in induction pressure touch-control, the change in resistance direction of the first pressure sensitivity resistance R1 and third pressure sensitivity resistance R3 and the
The change in resistance of two pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 are contrary.The pressure sensitivity resistance of the embodiment of the present application can pass through
Slit is carved on the first semiconductor layer at and the width for carving seam can be smaller, to guarantee that the first semiconductor layer is led to the second half
The protective effect of body layer and substrate will not be influenced by excessive.
In a further embodiment, as shown in Figure 1, display panel 100 can also include integrated drive electronics 104, collection
It include pressure sensitivity detection circuit 105 at driving circuit 104, which can be subtraction circuit.
The first input end IN1 of above-mentioned pressure sensitive unit 300 (or shown in Fig. 1 103), the second input terminal IN2, the first inspection
Survey end Fout1, the second test side Fout2 can be electrically connected with pressure sensitivity detection circuit 105.In pressure touch detection, pressure sensitivity inspection
Slowdown monitoring circuit 105 is used to provide the first level signal to first input end IN1, provides second electrical level signal to the second input terminal IN2,
Detect the first detection signal of the first test side Fout1 and the second detection signal of the second test side Fout2；And according to the first electricity
Ordinary mail number, second electrical level signal, first detection signal and the second detection signal calculate pressure value.
The working principle that pressure sensitivity detection circuit carries out pressure touch detection is further described below in conjunction with Fig. 3.Herein, lead to
It crosses first input end IN1 and the second input terminal IN2 inputs the first level signal and second electrical level signal respectively, utilize the first detection
Hold Fout1 and the second test side Fout2 output first detection signal and the second detection signal.
Assuming that the voltage difference of the first level signal and second electrical level signal of first input end IN1 and the input of the second input terminal
For Uin, the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, third pressure sensitivity resistance R3, the 4th pressure sensitivity resistance R4 resistance value be respectively
r1、r2、r3And r4, in the voltage value U for the first detection signal that the first test side Fout1 is detected1It can be counted using following formula (1)
It calculates:
In the voltage value U for the second detection signal that the second test side Fout2 is detected2It can be calculated using following formula (2):
The first test side Fout1 first detection signal detected and the second test side Fout2 can be detected
Two detection signals carry out subtraction, obtain the voltage difference delta U of the signal of the first test side Fout1 and the second test side Fout2
Are as follows:
In order to simplify pressure touch detection calculating process, can be set the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2,
Third pressure sensitivity resistance R3, resistance value of the 4th pressure sensitivity resistance R4 when not being pressurized are equal, such as are r, and the first pressure sensitivity resistance
The coefficient of strain of R1 and third pressure sensitivity resistance R3 are equal, i.e., the variable quantity phase of resistance when it is by identical pressure size
Deng the coefficient of strain of the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 are equal, i.e., resistance when it is by identical pressure size
The variable quantity of resistance value is equal.The coefficient of strain symbol of first pressure sensitivity resistance R1 and the second pressure sensitivity resistance R2 are on the contrary, i.e. the first pressure sensitivity
Resistance R1 and the second pressure sensitivity resistance R2 resistance value when by same pressure are changed in the opposite direction.
When carrying out pressure detecting, the resistance change of the first pressure sensitivity resistance R1 and third pressure sensitivity resistance R3 are Δ after compression
The resistance change of r, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 are-Δ r, at this moment the first test side Fout1 and second
Pressure differential deltap U between the Fout2 of test side1It can be with are as follows:
Wherein, U '1And U '2The signal that the first test side Fout1 and the second test side Fout2 are detected after being respectively pressurized
Voltage value.
It, can be according to first input end IN1 the first level signal inputted and the second input terminal IN2 using above-mentioned formula (4)
The voltage difference U of the second electrical level signal of inputinAnd the first detection signal that detects of the first output end Fout1 and the after being pressurized
The first pressure sensitivity resistance R1 and third pressure is calculated in the pressure differential deltap U ' between the second detection signal that two output end Fout2 are detected
Variable quantity-Δ of the resistance of the variation delta r of the resistance of sensing resistor R3 and the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4
R is further calculated according to the variation delta r and the coefficient of strain of the first pressure sensitivity resistance R1 and third pressure sensitivity resistance R3 resistance
Obtain the size for the pressure that the pressure sensitive unit senses.
It, can be according to each pressure sensitive list after executing detection method as described above using multiple pressure sensitive units
The pressure size that member senses determines position and the pressure value of pressure touch, to realize the pressure touching of entire display panel
Control detection.
Fig. 4 and Fig. 5 are please referred to, it illustrates other two the schematic diagram of the section structure of display panel shown in Fig. 1.
In some embodiments of the present application, capacitor is additionally provided on display panel.Here capacitor can be driving circuit
In keep current potential or coupling to generate the capacitor of charge for depositing, such as can be the capacitor in gate driving circuit.Above-mentioned film
Transistor can also include grid, source electrode and drain electrode other than including active layer, under the control of grid voltage, active layer
Carrier can drift about between source electrode and drain electrode, so that source electrode and drain electrode is connected.
In some embodiments, display panel can also include the pressure sensitivity signal wire being electrically connected with pressure sensitivity unit.Such as Fig. 1 institute
Show that pressure sensitive unit 102 is electrically connected with a plurality of pressure sensitivity signal wire 103.Here pressure sensitivity signal wire 103 can respectively with Fig. 3 institute
Show the first input end IN1, the second input terminal IN2, the first test side Fout1, the second test side Fout2 electrical connection of pressure sensitivity unit
Signal wire.
Referring to FIG. 4, identical as Fig. 2, display panel 400 includes substrate 40, the first semiconductor layer 41 and the second semiconductor
Layer 42, wherein the first semiconductor layer 41 is located between substrate 40 and the second semiconductor layer 42, thin film transistor (TFT) 410 includes active
Layer, the active layer are located at the second semiconductor layer 42.Pressure sensitive unit includes pressure sensitivity resistance 411, which is located at the
Semi-conductor layer 41.First semiconductor layer 41 and the second semiconductor layer 42 can be spaced by dielectric 43.
As shown in figure 4, display panel 400 further includes gate metal layer 44, capacitance metal layer 45 and Source and drain metal level 46.
The grid 441 of thin film transistor (TFT) 410 is located at gate metal layer 44, and the source electrode 461 of thin film transistor (TFT) 410 and drain electrode 462 are located at source
Leak metal layer 46.Source electrode 461 and drain electrode 462 are connect by via hole with active layer.Capacitor 420 is additionally provided on display panel 400, electricity
A pole plate 451 for holding 420 is located at capacitance metal layer 45, another pole plate 442 of capacitor 420 can be located at gate metal layer
44.In other optional implementations of the present embodiment, another pole plate of capacitor 420 may be located on Source and drain metal level 46.
In some optional implementations of the present embodiment, gate metal layer 44 can be located at the second semiconductor layer 42 with
Between Source and drain metal level 46, capacitance metal layer 45 can be between gate metal layer 44 and Source and drain metal level 46.At other
In optional implementation, gate metal layer 44 can be between the first semiconductor layer 41 and the second semiconductor layer 42, source and drain
Metal layer 46 is located at the second side of the semiconductor layer 42 far from gate metal layer 44, and at this moment, capacitance metal layer 45 can be located at the
Between two semiconductor layers 42 and Source and drain metal level 46.
In this example it is shown that panel 400 further includes pressure sensitivity signal wire 452, pressure sensitivity signal wire 452 is set to capacitor gold
Belong to layer 45.Pressure sensitivity signal wire 452 can be electrically connected by via hole with the pressure sensitivity resistance 411 for being located at the first semiconductor layer 41.Here
Pressure sensitivity signal wire 452 can be pressure sensitivity signal wire 103 shown in FIG. 1, for pressure sensitive unit provide input signal, and
The pressure touch signal that transmission pressure sensitive unit detects.
In embodiment illustrated in fig. 4, on the basis of realizing pressure sensing unit design in viewing area, by by pressure sensitivity signal
The capacitance metal layer of display panel is arranged in line, can make pressure sensitivity signal wire together in the manufacture craft of capacitor, using same
A pole plate and pressure sensitivity signal wire for one of mask plate production capacitor, mask plate and film layer without increasing additional can be real
The signal of existing pressure sensitivity unit is output and input, and is conducive to the thickness for reducing the display device of pressure sensitive function, reducing has pressure
The cost of manufacture of the display device of power inducing function.
Further, above-mentioned substrate 40 can be flexible substrate, and display panel 400 can also include organic luminescent device
420, which is located at side of the thin film transistor (TFT) 410 far from substrate 40, may include anode 47, You Jifa
Luminescent material 48 and cathode 49, luminous organic material 47 is between anode 47 and cathode 49.Cathode 49 can be whole face formula
The cathode of structure, i.e., multiple organic luminescent devices is electrically connected to each other.
Referring to FIG. 5, identical as Fig. 2, display panel 500 includes substrate 50, the first semiconductor layer 51 and the second semiconductor
Layer 52, wherein the first semiconductor layer 51 is located between substrate 50 and the second semiconductor layer 52, thin film transistor (TFT) 510 includes active
Layer, the active layer are located at the second semiconductor layer 52.Pressure sensitive unit includes pressure sensitivity resistance 511, which is located at the
Semi-conductor layer 51.First semiconductor layer 51 and the second semiconductor layer 52 can be spaced by dielectric 53.
As shown in figure 5, display panel 500 further includes gate metal layer, capacitance metal layer (not shown) and source and drain metal
Layer 56.Wherein, gate metal layer includes first grid metal layer 541 and second grid metal layer 542.Thin film transistor (TFT) 510
Grid includes first grid 501 and second grid 502, and first grid 501 is located at first grid metal layer 541, second grid position
In second grid metal layer 542.The source electrode 551 of thin film transistor (TFT) 510 and drain electrode 552 are located at Source and drain metal level 55.551 He of source electrode
Drain electrode 552 is connect by via hole with active layer.Capacitor is additionally provided on display panel 500, one pole plate of capacitor is located at capacitance metal
Layer, another pole plate can be located at first grid metal layer 541, second grid metal layer 542 or Source and drain metal level 55.
In this example it is shown that panel 500 be equipped with pressure sensitivity signal wire 503, the pressure sensitivity signal wire 503 can be set in
First grid metal layer 541 or second grid metal layer 542, and by via hole and the first semiconductor layer 51 can be set to
Pressure sensitivity resistance 511 is electrically connected.
In some optional implementations of the present embodiment, first grid metal layer 541 is located at the first semiconductor layer 51
And second between semiconductor layer 52, second grid metal layer 542 is between the second semiconductor layer 52 and Source and drain metal level 55, i.e.,
First grid metal layer 541 is located at the bottom of second grid metal layer 542, and pressure sensitivity signal wire 503 can be further disposed upon
One gate metal layer 541.The first grid metal layer 541 for being usually located at 542 bottom of second grid metal layer is relatively thin, and the first grid
The cabling of pole metal layer 541 is less, has enough spaces for 503 cabling of pressure sensitivity signal wire, is conducive to simplify pressure sensitivity signal wire
503 cabling design, reduces the signal cross-talk between pressure sensitivity signal wire 503 and display panel other signal wires.
Further, above-mentioned substrate 50 can be flexible substrate, and display panel 500 can also include organic luminescent device
520, which is located at side of the thin film transistor (TFT) 510 far from substrate 50, may include anode 56, You Jifa
Luminescent material 57 and cathode 58, luminous organic material 57 is between anode 56 and cathode 58.Cathode 58 can be whole face formula
The cathode of structure, i.e., multiple organic luminescent devices can be electrically connected to each other.
Referring to FIG. 6, it illustrates another the schematic diagram of the section structure of display panel shown in Fig. 1.
As shown in fig. 6, on the basis of embodiment shown in Fig. 2, display panel 600 further includes positioned at substrate 20 and the first half
First buffer layer 210 between conductor layer 21 and the insulating layer between the first semiconductor layer 21 and the second semiconductor layer 22
23.Herein, the insulating layer 23 between the first semiconductor layer 21 and the second semiconductor layer 22 includes 220 He of second buffer layer
Barrier layer 230 between second buffer layer 220 and the second semiconductor layer 22.Further, barrier layer 230 may include
One barrier layer 231 and the second barrier layer 232.
First buffer layer 210 and second buffer layer 220 can be Si oxide, and thickness can be 500nm.Pass through setting
First buffer layer 210 and second buffer layer 220, it is ensured that when making amorphous crystallization of silicon using ELA technique, substrate is damaged
Probability is smaller.First barrier layer 231 and the second barrier layer 232 can be respectively silicon nitride and Si oxide, the first barrier layer
231 thickness can be 120nm, and the thickness on the second barrier layer 232 can be 300nm.First barrier layer and the second barrier layer can
, as etching barrier layer, active layer and gate patterns can be protected to etch in the active layer and fabrication of thin film transistor (TFT)
Fall, also, the design of barrier bi-layer can reduce the dispersion in optical transmission process and the loss of light energy, is conducive to be promoted aobvious
Show effect.
Referring to FIG. 7, it illustrates the flow diagrams of the production method of display panel shown in Fig. 1.Herein, with production
The production method of the display panel of the embodiment of the present application is described for flexible display panels.
As shown in fig. 7, providing rigid substrates in step 701；Then, it in step 702, is formed on the rigid substrate flexible
Substrate；Then, in step 703, first buffer layer and the first semiconductor layer are formed on flexible substrates, can specifically be passed through
Physical deposition or the mode of sputtering form first buffer layer and the first semiconductor layer, and the first semiconductor layer can be the amorphous of doping
Silicon layer.
Later, in step 704, patterned process is carried out to the first semiconductor layer, specifically can use mask plate to the
Semi-conductor layer is exposed, develops, and forms the pressure sensitivity resistance in pressure sensitivity unit.Then, it in step 705, is led the first half
Second buffer layer and barrier layer are formed on body layer, can specifically be formed by way of physical deposition or sputtering.
Then, in step 706, the second semiconductor layer is formed over the barrier layer, that is, forms second layer amorphous silicon layer, and
In step 707, the amorphous crystallization of silicon of the second semiconductor layer is made using ELA technique, here it is possible to adjust the laser in ELA technique
Intensity makes the amorphous silicon of the first semiconductor layer be also converted to polysilicon.In step 707, if the second semiconductor layer has defect,
I.e. the second semiconductor layer some regions do not have amorphous silicon particles, and the defect from the second semiconductor layer can be absorbed in the first semiconductor layer
The laser of region transmission, avoids laser from causing to damage to substrate.
Later, can in step 708, graphical second semiconductor layer to form the active layer of film transistor device,
And in step 709, grid layer, capacitance metal layer, Source and drain metal level and organic hair are sequentially formed on the second semiconductor layer
Optical device layer, then encapsulating organic light emitting device layer in step 710 again.Wherein, in production grid layer, capacitance metal layer, source and drain
When metal layer, film transistor device and pressure sensitivity signal wire can be produced simultaneously.
Finally in step 711, flexible substrate and rigid substrates are separated using LLO technique, it is aobvious so as to form flexibility
Show panel.In the step 711, the laser energy across substrate is can be absorbed in the first semiconductor layer, prevents laser irradiation to having
Active layer keeps thin film transistor (TFT) impaired.
It can use existing film layer, benefit by the display panel that the above production process can be seen that the embodiment of the present application
Pressure sensitivity resistance and pressure sensitivity signal wire are produced with existing technique, and since pressure sensitivity resistance in the first semiconductor layer can basis
It needs to design, is able to ascend the precision of pressure sensitivity touch control detection, can also realize the pressure sensitive function of flexible display panels.
The embodiment of the present application also provides a kind of display devices, as shown in figure 8, the display device 800 includes above-mentioned each reality
The display panel of example is applied, can be mobile phone, tablet computer, wearable device etc..It is appreciated that display device 800 can also wrap
Structure well known to optical cement, protection glass etc. is included, details are not described herein again.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.Those skilled in the art
Member is it should be appreciated that invention scope involved in the application, however it is not limited to technology made of the specific combination of above-mentioned technical characteristic
Scheme, while should also cover in the case where not departing from the inventive concept, it is carried out by above-mentioned technical characteristic or its equivalent feature
Any combination and the other technical solutions formed.Such as features described above has similar function with (but being not limited to) disclosed herein
Can technical characteristic replaced mutually and the technical solution that is formed.
Claims (16)
1. a kind of display panel, which is characterized in that including substrate, the first semiconductor layer being formed on the substrate and the second half
Conductor layer, first semiconductor layer is between the substrate and second semiconductor layer；
The display panel is equipped with thin film transistor (TFT) and pressure sensitive unit；
The thin film transistor (TFT) includes active layer, and the active layer is located at second semiconductor layer；
The pressure sensitive unit includes pressure sensitivity resistance, and the pressure sensitivity resistance is located at first semiconductor layer.
2. display panel according to claim 1, which is characterized in that second semiconductor layer is the polysilicon of doping
Layer；
First semiconductor layer is the amorphous silicon layer of doping or the polysilicon layer of doping.
3. display panel according to claim 2, which is characterized in that first semiconductor layer with a thickness of d, 40nm≤
d≤60nm。
4. display panel according to claim 1, which is characterized in that be additionally provided with capacitor on the display panel；
The thin film transistor (TFT) further includes grid, source electrode and drain electrode；
The display panel further includes gate metal layer, capacitance metal layer and Source and drain metal level；
The source electrode and the drain electrode are located at the source-drain electrode metal layer, and a pole plate of the capacitor is located at the capacitance metal
Layer；
The display panel further includes the pressure sensitivity signal wire being electrically connected with the pressure sensitive unit.
5. display panel according to claim 4, which is characterized in that
The pressure sensitivity signal wire is set to the capacitance metal layer.
6. display panel according to claim 5, which is characterized in that the grid is located at the gate metal layer；
The gate metal layer is between first semiconductor layer and second semiconductor layer；Or
The gate metal layer is between second semiconductor layer and the Source and drain metal level.
7. display panel according to claim 4, which is characterized in that the gate metal layer includes first grid metal layer
With second grid metal layer,
The grid includes first grid and second grid, and the first grid is located at the first grid metal layer, and described
Two grids are located at the second grid metal layer；
The pressure sensitivity signal wire is set to the first grid metal layer or second grid metal layer.
8. display panel according to claim 7, which is characterized in that the first grid metal layer is located at described the first half
Between conductor layer and second semiconductor layer；
The second grid metal layer is between second semiconductor layer and the Source and drain metal level；
The pressure sensitivity signal wire is set to the first grid metal layer.
9. according to the described in any item display panels of claim 3-8, which is characterized in that the pressure sensitive unit includes described
Pressure sensitivity resistance and the first input end being electrically connected with the pressure sensitivity resistance, the second input terminal, the first test side, the second test side；
The voltage input signal that the pressure sensitivity resistance is inputted for receiving the first input end and second input terminal, and to
First test side and the second test side voltage sense signal.
10. display panel according to claim 9, which is characterized in that the display panel further includes integrated drive electronics,
The integrated drive electronics includes pressure sensitivity detection circuit；
The first input end, second input terminal, first test side and second test side and the pressure sensitivity
Detection circuit electrical connection；
The pressure sensitivity detection circuit is used to provide the first level signal to the first input end, and the second input terminal of Xiang Suoshu provides
Second electrical level signal detects the first detection signal of first test side and the second detection signal of second test side；
And according to first level signal, the second electrical level signal, the first detection signal and the second detection signal meter
Calculate pressure value.
11. display panel according to claim 1, which is characterized in that the pressure sensitive unit is in the display panel
Upper to arrange in matrix, the length and width of each pressure sensitive unit is no more than 5mm.
12. display panel according to claim 1, which is characterized in that the display panel further includes being located at the substrate
First buffer layer between first semiconductor layer and be located at first semiconductor layer and second semiconductor layer it
Between insulating layer.
13. display panel according to claim 12, which is characterized in that the insulating layer includes second buffer layer and is located at
Barrier layer between the second buffer layer and second semiconductor layer.
14. display panel according to claim 1, which is characterized in that the display panel further includes organic luminescent device；
The organic luminescent device is located at side of the thin film transistor (TFT) far from the substrate.
15. display panel according to claim 1, which is characterized in that the substrate is flexible substrate.
16. a kind of display device, which is characterized in that including such as described in any item display panels of claim 1-15.
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| CN201710520805.2A CN107275346B (en) | 2017-06-30 | 2017-06-30 | Display panel and display device |
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| CN109671746B (en) * | 2018-12-11 | 2021-04-27 | 武汉华星光电半导体显示技术有限公司 | Organic light emitting diode display panel and display device |
| CN111624797B (en) * | 2020-06-17 | 2022-08-19 | 武汉天马微电子有限公司 | Display panel |
| CN114023766B (en) * | 2021-10-25 | 2023-06-27 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, preparation method thereof and display panel |
| CN115394198A (en) * | 2022-08-30 | 2022-11-25 | 昆山国显光电有限公司 | Rollable device, display method thereof and rollable terminal |
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| CN205788139U (en) * | 2016-06-03 | 2016-12-07 | 京东方科技集团股份有限公司 | A kind of display floater and display device |
| CN106814912B (en) * | 2017-01-17 | 2021-01-26 | 京东方科技集团股份有限公司 | Pressure touch sensor, display device and driving method thereof |
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