CN104393006B - The preparation method of back-illuminated type CIS products - Google Patents
The preparation method of back-illuminated type CIS products Download PDFInfo
- Publication number
- CN104393006B CN104393006B CN201410522344.9A CN201410522344A CN104393006B CN 104393006 B CN104393006 B CN 104393006B CN 201410522344 A CN201410522344 A CN 201410522344A CN 104393006 B CN104393006 B CN 104393006B
- Authority
- CN
- China
- Prior art keywords
- semiconductor substrate
- thinned
- ion
- back side
- preparation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The present invention provides a kind of preparation method of back-illuminated type CIS products, including:Semiconductor substrate is provided, the Semiconductor substrate front is formed with transistor, formed with interconnection layer on the transistor;The Semiconductor substrate back side is thinned;The back side of Semiconductor substrate after being thinned carries out ion implanting, and energetic ion injection region is formed in the Semiconductor substrate after being thinned;Optical filter is formed at the Semiconductor substrate back side.The present invention carries out ion implanting from the Semiconductor substrate back side, ion dose, the distribution pattern of ion implanted regions is controlled, so as to be advantageous to CIS technology stabilities and technology controlling and process.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of preparation method of back-illuminated type CIS products.
Background technology
CIS products are a kind of graphics collection processing semiconductor devices, and it can be realized changes into electricity letter by optical signalling
Number stored and shown.The technique that existing CIS products have used back-illuminated type.I.e. Semiconductor substrate completes leading portion metal-oxide-semiconductor
And the grinding (purpose is that the thickness of Semiconductor substrate is thinned) at the Semiconductor substrate back side can be carried out after metal connecting line, allow and partly lead
Window of the body substrate back as photoinduction, and the front of Semiconductor substrate can be bonded in other auxiliary Semiconductor substrates above with
Realize light processing function.
During the formation process of CIS products, in order to change the electrical parameter of Semiconductor substrate, it is necessary to be served as a contrast to semiconductor
Bottom carries out ion implanting, for example energetic ion injection is carried out to Semiconductor substrate to form energetic ion injection region, it is therefore an objective to will
Charged ion injects the deeper region of Semiconductor substrate, to realize specific technique purpose.It refer to the existing skill shown in Fig. 1
The device architecture schematic diagram of the back-illuminated type CIS imaging sensors of art.Semiconductor substrate 10 has front 11 and the back side 12, the back of the body
Formed with filter layer 18 on face 12.Formed with grid 13 on described positive 10, shape in the Semiconductor substrate of the lower section of grid 13
Into having trap 13 and energetic ion injection region 17.It is interior mutual formed with metal formed with interconnection layer 15, interconnection layer 15 on described positive 12
Line 16.
Prior art is typically line carries out corresponding technique in Semiconductor substrate front, including forms interconnection layer and metal is mutual
Line, energetic ion injection etc. is carried out to Semiconductor substrate.Then, reduction process is being carried out to semiconductor back surface.
However, energetic ion injection needs higher energy, this requirement for ion implantation device is higher, and high energy
Dosage, the distribution pattern of ion in the semiconductor substrate of ion implanting are difficult to control, this be unfavorable for CIS techniques stability and
Technology controlling and process.
The content of the invention
The present invention is solved the problems, such as to provide a kind of preparation method of back-illuminated type CIS products, carried out from the Semiconductor substrate back side
Ion implanting, ion dose, the distribution pattern of ion implanted regions are controlled, so as to be advantageous to CIS technology stabilities and technique control
System.
To solve the above problems, the present invention provides a kind of preparation method of back-illuminated type CIS products, including:
Semiconductor substrate is provided, the Semiconductor substrate front is formed with transistor, formed with interconnection on the transistor
Layer;
The Semiconductor substrate back side is thinned;
The back side of Semiconductor substrate after being thinned carries out ion implanting, and high energy is formed in the Semiconductor substrate after being thinned
Ion implanted region;
Optical filter is formed at the Semiconductor substrate back side.
Alternatively, the ion implanting is low energy ion beam implantation.
Alternatively, it is described it is thinned utilize chemical mechanical milling tech carry out.
Alternatively, the thickness range of the Semiconductor substrate after being thinned is 4500-5500 angstroms.
Alternatively, the energy range of the ion implanting is 50-210KeV, the energetic ion note that the ion implanting is formed
Enter offset it is positive from semiconductor with a distance from be 3300-3700 angstroms, energetic ion injection region distance be thinned after semiconductor lining
The distance at the back side at bottom is 800-1200 angstroms.
Compared with prior art, the present invention has advantages below:
The preparation method that the present invention changes existing CIS techniques, transistor and interconnection layer are formed on a semiconductor substrate
Afterwards, Semiconductor substrate is thinned, the back side of the Semiconductor substrate after being thinned carries out ion implanting, relative to existing skill
Art forms the energetic ion injection region of same depth, and the energy of ion implanting that the present invention needs is relatively low, so as to alleviate to from
The requirement of the energy of son injection board, the dosage and ion of the ion more favorably injected in control Semiconductor substrate are in semiconductor
Distribution in substrate, be advantageous to the control of CIS devices.
Brief description of the drawings
Fig. 1 is the device architecture schematic diagram of the back-illuminated type CIS imaging sensors of prior art.
Fig. 2 is the preparation method schematic flow sheet of the back-illuminated type CIS imaging sensors of one embodiment of the invention.
Fig. 3-Fig. 6 is the cross-sectional view of the back-illuminated type CIS imaging sensors of one embodiment of the invention.
Embodiment
Prior art in order in the Semiconductor substrate of CIS products formed with certain depth energetic ion injection region,
Need to carry out ion implanting from the front of Semiconductor substrate in the case of high-energy using ion injection machine table, this notes ion
Enter the energy requirement height of board, and dosage, the distribution pattern of ion in the semiconductor substrate of energetic ion injection are difficult to control
System, this is unfavorable for the stability and technology controlling and process of CIS techniques.
To solve the above problems, the present invention provides a kind of preparation method of back-illuminated type CIS products, refer to shown in Fig. 2
The preparation method schematic flow sheet of the back-illuminated type CIS imaging sensors of one embodiment of the invention, methods described include:
Step S1, there is provided Semiconductor substrate, the Semiconductor substrate front are formed on the transistor formed with transistor
There is interconnection layer;
Step S2, the Semiconductor substrate back side is thinned;
Step S3, the back side of the Semiconductor substrate after being thinned carries out ion implanting, in the Semiconductor substrate after being thinned
Form energetic ion injection region;
Step S4, optical filter is formed at the Semiconductor substrate back side.
Below incorporated by reference to the one embodiment of the invention shown in Fig. 3-Fig. 6 back-illuminated type CIS imaging sensors section knot
Structure schematic diagram.
First, with reference to figure 3, there is provided Semiconductor substrate 100, the front 110 of Semiconductor substrate 100 formed with transistor,
Formed with interconnection layer 150 on the transistor.The transistor includes:Grid 130 and trap 140, the interconnection layer 150 include being situated between
Matter layer (not shown) and the metal interconnecting wires 160 in dielectric layer.Region 200 in Semiconductor substrate 100 will subsequently lead to
Cross ion implanting and form energetic ion injection injection region.
Then, with reference to figure 4, the back side 120 of Semiconductor substrate 100 is thinned, it is described thinned to utilize chemical machinery
Grinding technics is carried out.As one embodiment, it is described be thinned after Semiconductor substrate 100 thickness range be 4500-5500 angstroms.
For example the thickness of Semiconductor substrate 100 is 5000 angstroms after being thinned.
Then, with reference to figure 5, the back side 120 of the Semiconductor substrate 100 after being thinned carries out ion implanting, after being thinned
Energetic ion injection region 170 is formed in Semiconductor substrate 100.Due to carrying out ion note from the back side 120 of Semiconductor substrate 100
Enter, therefore, need not use higher ion implantation energy can be with realization and existing energetic ion compared to prior art
Identical effect is injected, i.e., forms energetic ion injection region 170 in the position of the desired depth of Semiconductor substrate 100.The height
Energy ion implanted region 170 is formed using low energy ion beam implantation.
It should be noted that energetic ion of the present invention injection injection, low energy ion beam implantation are relative energies, i.e., pair
In identical ion, same position in Semiconductor substrate is reached, the energy of low energy ion beam implantation of the invention is less than existing skill
The energy of the ion implanting of art.This chief reason is precisely due to Semiconductor substrate is thinned the present invention, from semiconductor
The back side of substrate carries out ion implanting so that ion implanting is easier to make for.
As one embodiment, the energy range of the low energy ion beam implantation is 50-210KeV, and the ion implanting is formed
Energetic ion injection region apart from the positive distance of semiconductor be 3300-3700 angstroms, energetic ion injection region distance is thinned
The distance at the back side of Semiconductor substrate afterwards is 800-1200 angstroms.In the present embodiment, the energetic ion of the ion implanting formation
Injection region is 3500 angstroms apart from the positive distance of semiconductor, the Semiconductor substrate after the energetic ion injection region distance is thinned
The distance at the back side is 1000 angstroms.
To sum up, the present invention change existing CIS techniques preparation method, on a semiconductor substrate formed transistor and mutually
Even after layer, Semiconductor substrate is thinned, the back side of the Semiconductor substrate after being thinned carries out ion implanting, relative to existing
There is the energetic ion injection region that technology forms same depth, the energy for the ion implanting that the present invention needs is relatively low, so as to alleviate
Requirement to the energy of ion injection machine table, the dosage and ion of the ion more favorably injected in control Semiconductor substrate are half
Distribution in conductor substrate, be advantageous to the control of CIS devices.
Therefore, the technical concepts and features of above-mentioned preferred embodiment only to illustrate the invention, its object is to allow be familiar with this
The personage of item technology can understand present disclosure and implement according to this, and it is not intended to limit the scope of the present invention.It is all
The equivalent change or modification made according to spirit of the invention, it should all be included within the scope of the present invention.
Claims (4)
- A kind of 1. preparation method of back-illuminated type CIS products, it is characterised in that including:Semiconductor substrate is provided, the Semiconductor substrate front is formed with transistor, formed with interconnection layer on the transistor;The Semiconductor substrate back side is thinned;The back side of Semiconductor substrate after being thinned carries out low energy ion beam implantation, and high energy is formed in the Semiconductor substrate after being thinned Ion implanted region;Optical filter is formed at the Semiconductor substrate back side;The Implantation Energy scope of the low energy ion is more than 50KeV and to be less than or equal to 210KeV, the energetic ion injection region It it is 3300-3700 angstroms apart from the positive distance of semiconductor.
- 2. the preparation method of CIS products as claimed in claim 1, it is characterised in that described thinned to utilize cmp Technique is carried out.
- 3. the preparation method of CIS products as claimed in claim 1, it is characterised in that the thickness of the Semiconductor substrate after being thinned Scope is 4500-5500 angstroms.
- 4. the preparation method of CIS products as claimed in claim 1, it is characterised in that energetic ion injection region distance subtracts The distance at the back side of the Semiconductor substrate after thin is 800-1200 angstroms.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410522344.9A CN104393006B (en) | 2014-09-30 | 2014-09-30 | The preparation method of back-illuminated type CIS products |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410522344.9A CN104393006B (en) | 2014-09-30 | 2014-09-30 | The preparation method of back-illuminated type CIS products |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104393006A CN104393006A (en) | 2015-03-04 |
CN104393006B true CN104393006B (en) | 2018-03-30 |
Family
ID=52610881
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410522344.9A Active CN104393006B (en) | 2014-09-30 | 2014-09-30 | The preparation method of back-illuminated type CIS products |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104393006B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107785389A (en) * | 2017-11-15 | 2018-03-09 | 德淮半导体有限公司 | Imaging sensor and its manufacture method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728325A (en) * | 2008-10-14 | 2010-06-09 | 东部高科股份有限公司 | Method for manufacturing image sensor |
KR20100079249A (en) * | 2008-12-31 | 2010-07-08 | 주식회사 동부하이텍 | Back side illumination image sensor and method for manufacturing the same |
CN103165633A (en) * | 2011-12-09 | 2013-06-19 | 台湾积体电路制造股份有限公司 | Backside illuminated cmos image sensor |
CN103227183A (en) * | 2013-04-08 | 2013-07-31 | 上海华力微电子有限公司 | Method for inhibiting electrical mutual interference of backside illuminated CMOS image sensor |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103500704A (en) * | 2013-09-29 | 2014-01-08 | 武汉新芯集成电路制造有限公司 | Ion implantation method for back face of wafer |
-
2014
- 2014-09-30 CN CN201410522344.9A patent/CN104393006B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728325A (en) * | 2008-10-14 | 2010-06-09 | 东部高科股份有限公司 | Method for manufacturing image sensor |
KR20100079249A (en) * | 2008-12-31 | 2010-07-08 | 주식회사 동부하이텍 | Back side illumination image sensor and method for manufacturing the same |
CN103165633A (en) * | 2011-12-09 | 2013-06-19 | 台湾积体电路制造股份有限公司 | Backside illuminated cmos image sensor |
CN103227183A (en) * | 2013-04-08 | 2013-07-31 | 上海华力微电子有限公司 | Method for inhibiting electrical mutual interference of backside illuminated CMOS image sensor |
Also Published As
Publication number | Publication date |
---|---|
CN104393006A (en) | 2015-03-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105702564B (en) | A method of improving silicon wafer warpage degree | |
EP4250337A3 (en) | Method for separating semiconductor substrate body from functional layer thereon | |
WO2011152986A3 (en) | Selective emitter solar cells formed by a hybrid diffusion and ion implantation process | |
TW200742069A (en) | Vertical semiconductor device | |
CN108257869A (en) | The preparation method of shield grid groove MOSFET | |
CN102956448A (en) | Method for manufacturing semiconductor device e.g. mosfet, involves removing semiconductor body from side up to range defined by foreign substances or pn junction, where pn junction is defined by foreign substances | |
CN102437028A (en) | PMOS source drain region ion implantation method and corresponding device manufacturing method | |
CN104393006B (en) | The preparation method of back-illuminated type CIS products | |
DE102016114264B4 (en) | MANUFACTURING PROCESS INCLUDING ACTIVATION OF DOPANTS | |
US9490315B2 (en) | Power semiconductor device and method of fabricating the same and cutoff ring | |
CN103367157A (en) | Preparation method of super junction MOSFET | |
CN105977161A (en) | Super-junction structure and preparation method thereof | |
US10153365B2 (en) | Semiconductor device and a method of making a semiconductor device | |
DE112015001993B4 (en) | Manufacturing method for a semiconductor device and semiconductor device | |
DE102014105438B4 (en) | Manufacturing method and semiconductor integrated circuit with dislocations | |
WO2015037101A1 (en) | Semiconductor device and method for manufacturing same | |
US9520436B2 (en) | Solid-state imaging device and manufacturing method thereof | |
JP2016526796A5 (en) | ||
EP2557598A2 (en) | Optoelectric integrated circuit substrate and method of fabricating the same | |
US9780163B2 (en) | Method of manufacturing semiconductor device and semiconductor device | |
US20120329256A1 (en) | Method of manufacturing semiconductor device and ion implanter | |
CN104022154A (en) | SOI PMOS ESD device and manufacturing method thereof | |
CN106033729B (en) | The doping method of FinFET | |
CN104167384A (en) | Method for eliminating shallow trench isolation pits | |
US9818790B2 (en) | Solid-state imaging device and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |