AU2001264014A1 - Digital modulation synthesizer - Google Patents
Digital modulation synthesizerInfo
- Publication number
- AU2001264014A1 AU2001264014A1 AU2001264014A AU6401401A AU2001264014A1 AU 2001264014 A1 AU2001264014 A1 AU 2001264014A1 AU 2001264014 A AU2001264014 A AU 2001264014A AU 6401401 A AU6401401 A AU 6401401A AU 2001264014 A1 AU2001264014 A1 AU 2001264014A1
- Authority
- AU
- Australia
- Prior art keywords
- frequency modulation
- accentuation
- filter
- pll
- accentuated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 230000001944 accentuation Effects 0.000 abstract 5
- 101150066718 FMOD gene Proteins 0.000 abstract 2
- 238000001914 filtration Methods 0.000 abstract 2
- 230000000694 effects Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0991—Modifications of modulator for regulating the mean frequency using a phase locked loop including calibration means or calibration methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
- H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
- H03C3/0933—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/12—Modulator circuits; Transmitter circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Transmitters (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Holo Graphy (AREA)
- Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The invention concerns a digital modulation synthesizer for generating an output frequency or phase modulated radiofrequency signal (SOUT), comprising a pre-accentuation filter (18) receiving a frequency modulation digital signal (Fmod) in input to produce a pre-accentuated frequency modulation signal (F'mod), a modulator Sigma-Delta (15) having an input receiving the pre-accentuated frequency modulation signal (F'mod), and an output delivering a pre-accentuated and scrambled frequency modulation signal (Sc), a phase locked loop (PLL) with variable radio frequency divider (14) in the feedback path, the filtering by the phase locked loop (PLL) enabling to filter the quantizing distortion introduced by the modulator Sigma-Delta (15) and the pre-accentuation filter (18) applying a pre-accentuation to the frequency modulation signal (Fmod) enabling to compensate the effect of said filtering on the modulation inside a usful band, means for automatic calibration of the pre-accentuation filter (18) enabling further to adjust the pre-accentuation filter (18) function to that of the PLL.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0007059A FR2809890B1 (en) | 2000-05-31 | 2000-05-31 | DIGITAL MODULATION SYNTHESIZER |
FR0007059 | 2000-05-31 | ||
PCT/FR2001/001606 WO2001093415A1 (en) | 2000-05-31 | 2001-05-23 | Digital modulation synthesizer |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001264014A1 true AU2001264014A1 (en) | 2001-12-11 |
Family
ID=8850887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001264014A Abandoned AU2001264014A1 (en) | 2000-05-31 | 2001-05-23 | Digital modulation synthesizer |
Country Status (7)
Country | Link |
---|---|
US (1) | US20040041638A1 (en) |
EP (1) | EP1290783B1 (en) |
AT (1) | ATE261207T1 (en) |
AU (1) | AU2001264014A1 (en) |
DE (1) | DE60102237D1 (en) |
FR (1) | FR2809890B1 (en) |
WO (1) | WO2001093415A1 (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7388939B2 (en) * | 2001-10-31 | 2008-06-17 | Sirf Technology, Inc. | Fractional-R frequency synthesizer |
US7190747B2 (en) * | 2002-03-25 | 2007-03-13 | Bae Systems Information And Electronic Systems Integration Inc. | Frequency mismatch compensation for multiuser detection |
DE10243382A1 (en) * | 2002-06-27 | 2004-04-08 | Infineon Technologies Ag | Circuit arrangement with phase locked loop and transceiver with the circuit arrangement |
US7430265B2 (en) | 2002-06-27 | 2008-09-30 | Infineon Technologies Ag | Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit arrangement |
JP4282998B2 (en) * | 2003-01-08 | 2009-06-24 | パナソニック株式会社 | Modulator and correction method thereof |
US7912145B2 (en) * | 2003-12-15 | 2011-03-22 | Marvell World Trade Ltd. | Filter for a modulator and methods thereof |
US20050215216A1 (en) * | 2004-03-25 | 2005-09-29 | Ess Technology, Inc. | Sigma delta modulator loop configured to compensate amplifier noise affecting signals in the AM radio frequency band |
US7477686B2 (en) * | 2004-09-01 | 2009-01-13 | Intel Corporation | Apparatus and method of adaptive filter |
US20080232443A1 (en) * | 2007-03-23 | 2008-09-25 | Tai-Yuan Yu | Signal generating apparatus |
US7382201B1 (en) * | 2007-03-23 | 2008-06-03 | Mediatek Inc. | Signal generating apparatus and method thereof |
US7991102B2 (en) * | 2007-09-20 | 2011-08-02 | Mediatek Inc. | Signal generating apparatus and method thereof |
US8081936B2 (en) * | 2009-01-22 | 2011-12-20 | Mediatek Inc. | Method for tuning a digital compensation filter within a transmitter, and associated digital compensation filter and associated calibration circuit |
CN102545886B (en) * | 2010-12-23 | 2014-02-05 | 博通集成电路(上海)有限公司 | Gaussian frequency shift keying (GFSK) modulator, GFSK modulation method and transmitter |
TWI524705B (en) * | 2013-05-15 | 2016-03-01 | 瑞昱半導體股份有限公司 | Calibration method and calibration apparatus for communication system |
CN115425969B (en) * | 2022-09-14 | 2023-09-08 | 深圳市华智芯联科技有限公司 | Method and device for designing compensation filter of phase-locked loop and computer equipment |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6008703A (en) * | 1997-01-31 | 1999-12-28 | Massachusetts Institute Of Technology | Digital compensation for wideband modulation of a phase locked loop frequency synthesizer |
US6047029A (en) * | 1997-09-16 | 2000-04-04 | Telefonaktiebolaget Lm Ericsson | Post-filtered delta sigma for controlling a phase locked loop modulator |
US5952895A (en) * | 1998-02-23 | 1999-09-14 | Tropian, Inc. | Direct digital synthesis of precise, stable angle modulated RF signal |
EP0961412B1 (en) * | 1998-05-29 | 2004-10-06 | Motorola Semiconducteurs S.A. | Frequency synthesiser |
-
2000
- 2000-05-31 FR FR0007059A patent/FR2809890B1/en not_active Expired - Fee Related
-
2001
- 2001-05-23 WO PCT/FR2001/001606 patent/WO2001093415A1/en active IP Right Grant
- 2001-05-23 AU AU2001264014A patent/AU2001264014A1/en not_active Abandoned
- 2001-05-23 AT AT01938325T patent/ATE261207T1/en not_active IP Right Cessation
- 2001-05-23 DE DE60102237T patent/DE60102237D1/en not_active Expired - Lifetime
- 2001-05-23 US US10/296,862 patent/US20040041638A1/en not_active Abandoned
- 2001-05-23 EP EP01938325A patent/EP1290783B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2809890A1 (en) | 2001-12-07 |
EP1290783A1 (en) | 2003-03-12 |
WO2001093415A1 (en) | 2001-12-06 |
FR2809890B1 (en) | 2002-08-16 |
US20040041638A1 (en) | 2004-03-04 |
ATE261207T1 (en) | 2004-03-15 |
EP1290783B1 (en) | 2004-03-03 |
DE60102237D1 (en) | 2004-04-08 |
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