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NL7408203A - Geheugeninrichting. - Google Patents

Geheugeninrichting.

Info

Publication number
NL7408203A
NL7408203A NL7408203A NL7408203A NL7408203A NL 7408203 A NL7408203 A NL 7408203A NL 7408203 A NL7408203 A NL 7408203A NL 7408203 A NL7408203 A NL 7408203A NL 7408203 A NL7408203 A NL 7408203A
Authority
NL
Netherlands
Prior art keywords
memory device
memory
Prior art date
Application number
NL7408203A
Other languages
English (en)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of NL7408203A publication Critical patent/NL7408203A/nl

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
NL7408203A 1973-07-11 1974-06-19 Geheugeninrichting. NL7408203A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US378052A US3876991A (en) 1973-07-11 1973-07-11 Dual threshold, three transistor dynamic memory cell

Publications (1)

Publication Number Publication Date
NL7408203A true NL7408203A (nl) 1975-01-14

Family

ID=23491536

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7408203A NL7408203A (nl) 1973-07-11 1974-06-19 Geheugeninrichting.

Country Status (6)

Country Link
US (1) US3876991A (nl)
JP (1) JPS5039838A (nl)
DE (1) DE2433077A1 (nl)
FR (1) FR2237272B1 (nl)
GB (1) GB1456326A (nl)
NL (1) NL7408203A (nl)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2442132C3 (de) * 1974-09-03 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Dynamisches Schieberegister und Verfahren zu seinem Betrieb
JPS51139220A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Sense amplifier
US4059826A (en) * 1975-12-29 1977-11-22 Texas Instruments Incorporated Semiconductor memory array with field effect transistors programmable by alteration of threshold voltage
JPS544086A (en) * 1977-06-10 1979-01-12 Fujitsu Ltd Memory circuit unit
US4450537A (en) * 1981-08-19 1984-05-22 Siemens Aktiengesellschaft Monolithically integrated read-only memory
US4799192A (en) * 1986-08-28 1989-01-17 Massachusetts Institute Of Technology Three-transistor content addressable memory
US5396452A (en) * 1993-07-02 1995-03-07 Wahlstrom; Sven E. Dynamic random access memory
US6242772B1 (en) 1994-12-12 2001-06-05 Altera Corporation Multi-sided capacitor in an integrated circuit
US6420746B1 (en) 1998-10-29 2002-07-16 International Business Machines Corporation Three device DRAM cell with integrated capacitor and local interconnect
US8648403B2 (en) 2006-04-21 2014-02-11 International Business Machines Corporation Dynamic memory cell structures

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3114177A (en) * 1961-01-09 1963-12-17 Simard Joseph Gerard Sashless window
US3765000A (en) * 1971-11-03 1973-10-09 Honeywell Inf Systems Memory storage cell with single selection line and single input/output line
US3774177A (en) * 1972-10-16 1973-11-20 Ncr Co Nonvolatile random access memory cell using an alterable threshold field effect write transistor

Also Published As

Publication number Publication date
JPS5039838A (nl) 1975-04-12
GB1456326A (en) 1976-11-24
FR2237272B1 (nl) 1977-10-07
US3876991A (en) 1975-04-08
FR2237272A1 (nl) 1975-02-07
DE2433077A1 (de) 1975-07-10

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Legal Events

Date Code Title Description
BV The patent application has lapsed