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MY103516A - Process for manufacturing plastic pin grid arrays and the product produced thereby - Google Patents

Process for manufacturing plastic pin grid arrays and the product produced thereby

Info

Publication number
MY103516A
MY103516A MYPI88000164A MYPI19880164A MY103516A MY 103516 A MY103516 A MY 103516A MY PI88000164 A MYPI88000164 A MY PI88000164A MY PI19880164 A MYPI19880164 A MY PI19880164A MY 103516 A MY103516 A MY 103516A
Authority
MY
Malaysia
Prior art keywords
pin grid
tape
pins
product produced
grid arrays
Prior art date
Application number
MYPI88000164A
Inventor
Alex Armer Thomas
Chang Kin-Shiung
Garlen Bridges William
Original Assignee
Olin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/052,327 external-priority patent/US4816426A/en
Priority claimed from US07/145,977 external-priority patent/US4965227A/en
Application filed by Olin Corp filed Critical Olin Corp
Publication of MY103516A publication Critical patent/MY103516A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/18—Construction of rack or frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/10—Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1053—Plug-in assemblages of components, e.g. IC sockets having interior leads
    • H05K7/1076—Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by sliding
    • H05K7/1084—Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by sliding pin grid array package carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

A PROCESS FOR FORMING AN INTEGRATED CIRCUIT PIN GRID ARRAY PACKAGE 10, 80, 80', 120, 150, 182, 210, 220, 268, 284 COMPRISING A FLEXIBLE METAL TAPE 20, 20', 200, 218, ADAPTED FOR USE IN TAPE AUTOMATED BONDING WITH A PLURALITY OF HOLES 24. TERMINAL PINS 26, 26'', 26", 26A, 196', 196 ARE INSERTED IN THE HOLES AND THE TAPE AND PINS ARE DISPOSED WITHIN A MOLD 50, 128, 152, 172, 180, 250 SO THAT A CAVITY IS FORMED ABOUT THE PINS AND TAPE. THE CAVITY IS FILLED WITH A POLYMER RESIN 78, 78'', 78", 78''", 202, 270 SO AS TO AT LEAST PARTIALLY SURROUND AND SUPPORT THE PINS AND TAPE AND THEREBY FORM THE PLASTIC ENCAPSULATED PIN GRID ARRAY.(FIG. 3D)
MYPI88000164A 1987-02-19 1988-02-16 Process for manufacturing plastic pin grid arrays and the product produced thereby MY103516A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US1661487A 1987-02-19 1987-02-19
US07/052,327 US4816426A (en) 1987-02-19 1987-05-21 Process for manufacturing plastic pin grid arrays and the product produced thereby
US07/145,977 US4965227A (en) 1987-05-21 1988-02-02 Process for manufacturing plastic pin grid arrays and the product produced thereby

Publications (1)

Publication Number Publication Date
MY103516A true MY103516A (en) 1993-07-31

Family

ID=27360610

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI88000164A MY103516A (en) 1987-02-19 1988-02-16 Process for manufacturing plastic pin grid arrays and the product produced thereby

Country Status (7)

Country Link
EP (1) EP0382714A1 (en)
JP (1) JPH02502322A (en)
KR (1) KR960010011B1 (en)
AU (1) AU1298988A (en)
MX (1) MX166066B (en)
MY (1) MY103516A (en)
WO (1) WO1988006395A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03152999A (en) * 1989-11-09 1991-06-28 Nec Corp Hybrid integrated circuit
JPH0462865A (en) * 1990-06-25 1992-02-27 Fujitsu Ltd Semiconductor device and manufacture thereof
US5293072A (en) * 1990-06-25 1994-03-08 Fujitsu Limited Semiconductor device having spherical terminals attached to the lead frame embedded within the package body
IT220657Z2 (en) * 1990-10-30 1993-10-08 Marelli Autronica ELECTRONIC DEVICE INCLUDING AN INTEGRATED CIRCUIT MOUNTED ON AN INSULATING BASE.
US5877554A (en) * 1997-11-03 1999-03-02 Advanced Interconnections Corp. Converter socket terminal
US6256202B1 (en) 2000-02-18 2001-07-03 Advanced Interconnections Corporation Integrated circuit intercoupling component with heat sink
US8303681B2 (en) 2006-08-08 2012-11-06 Seoul National University Industry Foundation Mixed powder and sintered body, mixed cermet powder and cermet, and fabrication methods thereof
CN107598324B (en) * 2017-10-23 2024-02-20 中国电子科技集团公司第四十三研究所 Packaged product preheating device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IN148328B (en) * 1977-04-18 1981-01-17 Rca Corp
JPS5471572A (en) * 1977-11-18 1979-06-08 Fujitsu Ltd Semiconductor device
US4338621A (en) * 1980-02-04 1982-07-06 Burroughs Corporation Hermetic integrated circuit package for high density high power applications
US4582556A (en) * 1982-11-22 1986-04-15 Olin Corporation Adhesion primers for encapsulating epoxies
US4521469A (en) * 1982-11-22 1985-06-04 Olin Corporation Casing for electronic components
US4525422A (en) * 1982-11-22 1985-06-25 Olin Corporation Adhesion primers for encapsulating epoxies
US4552422A (en) * 1983-03-14 1985-11-12 Amp Incorporated Modular receptacle pin grid array
USRE32540E (en) * 1983-03-22 1987-11-10 Advanced Interconnections, Inc. Terminal positioning method and construction
US4677526A (en) * 1984-03-01 1987-06-30 Augat Inc. Plastic pin grid array chip carrier
US4593342A (en) * 1984-11-15 1986-06-03 General Electric Company Heat sink assembly for protecting pins of electronic devices
US4549651A (en) * 1984-12-21 1985-10-29 Alemanni James C Carrier for pin grid array
US4618739A (en) * 1985-05-20 1986-10-21 General Electric Company Plastic chip carrier package
US4729010A (en) * 1985-08-05 1988-03-01 Hitachi, Ltd. Integrated circuit package with low-thermal expansion lead pieces

Also Published As

Publication number Publication date
KR890701001A (en) 1989-04-28
EP0382714A1 (en) 1990-08-22
WO1988006395A1 (en) 1988-08-25
JPH02502322A (en) 1990-07-26
EP0382714A4 (en) 1990-06-05
MX166066B (en) 1992-12-17
AU1298988A (en) 1988-09-14
KR960010011B1 (en) 1996-07-25

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