Nothing Special   »   [go: up one dir, main page]

Skip to main content

Carnegie Mellon’s System Architect’s Workbench

  • Chapter
A Survey of High-Level Synthesis Systems

Abstract

Carnegie Mellon University’s System Architect’s Workbench is the successor to the first and second Carnegie Mellon University Design Automation (CMU-DA) systems. The Workbench supports three synthesis paths: a general synthesis path, using the transformations, APARTY, CSTEP, and EMUCS; a pipelined-instruction-set-processor-specific synthesis path,using SAM; and a microprocessor-specific synthesis path, using SUGAR. See also Carnegie Mellon’s (First) CMU-DA System and Carnegie Mellon’s (Second) CMU-DA System, the predecessors of this system.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

eBook
USD 15.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. D.L. Springer and D.E. Thomas, “Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis”, Proc. of ICCAD’90, pages 254–257, November 1990.

    Google Scholar 

  2. Richard J. Cloutier and Donald E. Thomas, “The Combination of Scheduling, Allocation, and Mapping in a Single Algorithm”, Proc. of the 27th DAC, pages 71–76, June 1990.

    Google Scholar 

  3. D.E. Thomas, E.D. Lagnese, R.A. Walker, J.A. Nestor, J.V. Rajan, and R.L. Blackburn, Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench, Kluwer Academic Publishers, Boston, 1990.

    Book  Google Scholar 

  4. Robert A. Walker and Donald E. Thomas, “Behavioral Transformation for Algorithmic Level IC Design”, IEEE Trans. on CAD, pages 1115–1128, October 1989.

    Google Scholar 

  5. E. Dirkes Lagnese and D.E. Thomas, “Architectural Partitioning for System Level Design”, Proc. of the 26th DAC, pages 62–67, June 1989.

    Google Scholar 

  6. Elizabeth Dirkes Lagnese, Architectural Partitioning for System Level Design of Integrated Circuits, PhD Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, March 1989.

    Google Scholar 

  7. Jayanth V. Rajan, Automatic Synthesis of Microprocessors, PhD Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, January 1989.

    Google Scholar 

  8. Rajeev Murgai, Automatic Design of Control Paths for System Level Synthesis, Master’s Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, January 1989.

    Google Scholar 

  9. Edware D. Un, Evaluating Register-Transfer Level Synthesis Tools Using Gate Level Simulation, Master’s Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, January 1989.

    Google Scholar 

  10. Robert L. Blackburn, Relating Design Representations in an Automated IC Design System, PhD Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, October 1988.

    Google Scholar 

  11. D.E. Thomas, E.M. Dirkes, R.A. Walker, J.V. Rajan, J.A. Nestor, and R.L. Blackburn, “The System Architect’s Workbench”, Proc. of the 25th DAC, pages 337–343, June 1988.

    Google Scholar 

  12. Robert L. Blackburn, Donald E. Thomas, and Patti M. Koenig, “CORAL II: Linking Behavior and Structure in an IC Design System”, Proc. of the 25th DAC, pages 529–535, June 1988.

    Google Scholar 

  13. Robert Allen Walker, Design Representation and Behavioral Transformation for Algorithmic Level Integrated Circuit Design, PhD Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, April 1988.

    Google Scholar 

  14. Patti M. Koenig, SEE-SAW: A Graphical Interface for System Level Design, Master’s Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, December 1987.

    Google Scholar 

  15. Robert A. Walker and Donald E. Thomas, “Design Representation and Transformation in the System Architect’s Workbench”, Proc. of ICCAD’87, pages 166–169, November 1987.

    Google Scholar 

  16. John Anthony Nestor, Specification and Synthesis of Digital Systems with Interfaces, PhD Thesis, Dept. of Electrical and Computer Engineering, Carnegie Mellon University, April 19887.

    Google Scholar 

  17. J.A. Nestor and D.E. Thomas, “Behavioral Synthesis with Interfaces”, Proc. of ICCAD’86, pages 112–115, November 1986.

    Google Scholar 

  18. Robert A. Walker and Donald E. Thomas, “A Model of Design Representation and Synthesis”, Proc. of the 22nd DAC, pages 453--459, June 1985.

    Google Scholar 

  19. Jayanth V. Rajan and Donald E. Thomas, “Synthesis by Delayed Binding of Decisions”, Proc. of the 22nd DAC, pages 367–373, June 1985.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 1991 Springer Science+Business Media New York

About this chapter

Cite this chapter

Walker, R.A., Camposano, R. (1991). Carnegie Mellon’s System Architect’s Workbench. In: Walker, R.A., Camposano, R. (eds) A Survey of High-Level Synthesis Systems. The Springer International Series in Engineering and Computer Science, vol 135. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3968-1_9

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-3968-1_9

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6772-7

  • Online ISBN: 978-1-4615-3968-1

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics