Carleton’s HAL System

1. Pierre G. Paulin and John P. Knight, “Algorithms for High-Level Synthesis”, IEEE Design and Test, pages 18–31, December 1989.

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2. Pierre G. Paulin and John P. Knight, “Scheduling and Binding Algorithms for High-Level Synthesis”, Proc. of the 26th DAC, pages 1–6, June 1989.

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3. Pierre G. Paulin and John P. Knight, “Force-Directed Scheduling for the Behavioral Synthesis of ASIC’s”, IEEE Trans. on CAD, pages 661–679, June 1989.

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4. Pierre G. Paulin, High-Level Synthesis of Digital Circuits Using Global Scheduling and Binding Algorithms, PhD Thesis, Dept. of Electronics, Carleton University, January 1988.

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5. P.G. Paulin and J.P. Knight, “Force-Directed Scheduling in Automatic Data Path Synthesis”, Proc. of the 24th DAC, pages 195–202, June 1987.

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6. P.G. Paulin, J.P. Knight, and E.F. Girczyc, “HAL: A Multi-Paradigm Approach to Automatic Data Path Synthesis”, Proc. of the 23rd DAC, pages 263–270, June 1986.

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