Abstract
Fault Injections (FI) against hardware circuits can make a system inoperable or lead to information security breaches. FI can be used preemptively in order to detect and mitigate weaknesses in a design. FI is an old field of study and therefore numerous techniques and tools can be used for that purpose. Each technique can be used at different levels of circuit design, and has strengths and weaknesses. In this paper, we review these techniques to show their pros and cons and more precisely we highlight their shortcomings with respect to the complexity of modern systems.
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References
Hardie, F.H., Suhocki, R.J.: Design and use of fault simulation for saturn computer design. IEEE Trans. Electron. Comput. 4, 412–429 (1967)
Armstrong, D.: A deductive method for simulating faults in logic circuits. IEEE Trans. Comput. 21, 464–471 (1972)
Ulrich, E.G., Baker, T., Williams, L.: Fault-test analysis techniques based on logic simulation. In: Proceedings of the 9th Design Automation Workshop, pp. 111–115. ACM (1972)
Menon, P.R., Chappell, S.G.: Deductive fault simulation with functional blocks. IEEE Trans. Comput. 27(8), 689–695 (1978)
Arlat, J.: Validation de la sûreté de fonctionnement par injection de fautes, méthode- mise en oeuvre- application. Ph.D. dissertation (1990)
Joye, M., Tunstall, M.: Fault Analysis in Cryptography, vol. 147. Springer, Heidelberg (2012). https://doi.org/10.1007/978-3-642-29656-7
Lashermes, R., Fournier, J., Goubin, L.: Inverting the final exponentiation of tate pairings on ordinary elliptic curves using faults. In: Bertoni, G., Coron, J.-S. (eds.) CHES 2013. LNCS, vol. 8086, pp. 365–382. Springer, Heidelberg (2013). https://doi.org/10.1007/978-3-642-40349-1_21
Barenghi, A., Breveglieri, L., Koren, I., Naccache, D.: Fault injection attacks on cryptographic devices: theory, practice, and countermeasures. Proc. IEEE 100(11), 3056–3076 (2012)
Moro, N., Dehbaoui, A., Heydemann, K., Robisson, B., Encrenaz, E.: Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller. arXiv preprint arXiv:1402.6421 (2014)
Timmers, N., Spruyt, A., Witteman, M.: Controlling PC on ARM using fault injection. In: 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp. 25–35. IEEE (2016)
Tunstall, M., Mukhopadhyay, D., Ali, S.: Differential fault analysis of the advanced encryption standard using a single fault. In: Ardagna, C.A., Zhou, J. (eds.) WISTP 2011. LNCS, vol. 6633, pp. 224–233. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-21040-2_15
Buchner, S., et al.: Laser simulation of single event upsets. IEEE Trans. Nucl. Sci. 34(6), 1227–1233 (1987)
Arlat, J., et al.: Fault injection for dependability validation: a methodology and some applications. IEEE Trans. Software Eng. 16(2), 166–182 (1990)
Madeira, H., Rela, M., Moreira, F., Silva, J.G.: RIFLE: a general purpose pin-level fault injector. In: Echtle, K., Hammer, D., Powell, D. (eds.) EDCC 1994. LNCS, vol. 852, pp. 197–216. Springer, Heidelberg (1994). https://doi.org/10.1007/3-540-58426-9_132
Sieh, V., Tschache, O., Balbach, F.: VERIFY: evaluation of reliability using VHDL-models with embedded fault descriptions. In: Twenty-Seventh Annual International Symposium on Fault-Tolerant Computing, FTCS-27. Digest of Papers, pp. 32–36. IEEE (1997)
Folkesson, P., Svensson, S., Karlsson, J.: A comparison of simulation based and scan chain implemented fault injection. In: Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing. Digest of Papers, pp. 284–293. IEEE (1998)
Sieh, V.: Faumachine. http://www3.informatik.uni-erlangen.de/EN/Research/FAUmachine/description.shtml
Potyra, S., Sieh, V., Cin, M.D.: Evaluating fault-tolerant system designs using FAUmachine. In: Proceedings of the 2007 Workshop on Engineering Fault Tolerant Systems, p. 9. ACM (2007)
Sand, M., Potyra, S., Sieh, V.: Deterministic high-speed simulation of complex systems including fault-injection. In: 2009 IEEE/IFIP International Conference on Dependable Systems & Networks, pp. 211–216. IEEE (2009)
Civera, P., Macchiarulo, L., Rebaudengo, M., Reorda, M.S., Violante, A.: Exploiting FPGA for accelerating fault injection experiments. In: Proceedings of the Seventh International On-Line Testing Workshop, pp. 9–13. IEEE (2001)
Leveugle, R.: Fault injection in VHDL descriptions and emulation. In: Proceedings-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems, pp. 414–419. IEEE Comput. Soc., Los Alamitos (2000)
Antoni, L., Leveugle, R., Feher, M.: Using run-time reconfiguration for fault injection in hardware prototypes. In: Proceedings of the 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2002, pp. 245–253. IEEE (2002)
Velazco, R., Rezgui, S., Ecoffet, R.: Predicting error rate for microprocessor-based digital architectures through C.E.U. (Code Emulating Upsets) injection. IEEE Trans. Nucl. Sci. 47(6), 2405–2411 (2000)
Han, S., Shin, K.G., Rosenberg, H.A.: Doctor: an integrated software fault injection environment for distributed real-time systems. In: Proceedings of the International Computer Performance and Dependability Symposium, pp. 204–213. IEEE (1995)
Riviere, L., Bringer, J., Le, T.-H., Chabanne, H.: A novel simulation approach for fault injection resistance evaluation on smart cards. In: 2015 IEEE Eighth International Conference on Software Testing, Verification and Validation Workshops (ICSTW), pp. 1–8. IEEE (2015)
Kanawati, G.A., Kanawati, N.A., Abraham, J.A.: FERRARI: a flexible software-based fault and error injection system. IEEE Trans. Comput. 44(2), 248–260 (1995)
Höller, A., Rauter, T., Iber, J., Kreiner, C.: Diverse compiling for microprocessor fault detection in temporal redundant systems. In: 2015 IEEE International Conference on Computer and Information Technology; Ubiquitous Computing and Communications; Dependable, Autonomic and Secure Computing; Pervasive Intelligence and Computing, pp. 1928–1935, October 2015
Carreira, J., Madeira, H., Silva, J.G., et al.: Xception: software fault injection and monitoring in processor functional units. Dependable Comput. Fault Tolerant Syst. 10, 245–266 (1998)
Yuce, B., Ghalaty, N.F., Schaumont, P.: Improving fault attacks on embedded software using RISC pipeline characterization. In: 2015 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp. 97–108. IEEE (2015)
Riviere, L., Najm, Z., Rauzy, P., Danger, J.-L., Bringer, J., Sauvage, L.: High precision fault injections on the instruction cache of ARMv7-M architectures. arXiv preprint arXiv:1510.01537 (2015)
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Bukasa, S.K., Claudepierre, L., Lashermes, R., Lanet, JL. (2019). When Fault Injection Collides with Hardware Complexity. In: Zincir-Heywood, N., Bonfante, G., Debbabi, M., Garcia-Alfaro, J. (eds) Foundations and Practice of Security. FPS 2018. Lecture Notes in Computer Science(), vol 11358. Springer, Cham. https://doi.org/10.1007/978-3-030-18419-3_16
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