Systolic architectures offer one of the most promising approaches for fulfilling the demand- ing VQ speed requirements in many applications. We propose a novel.

Abstract: A family of architectural techniques are proposed which offer efficient computation of weighted Euclidean distance measures for nearest-neighbor ...

Abstract. We present a new systolic architecture for implementing Finite State Vector Quantization in real-time for both speech and image data.

We present a new systolic architecture for implementing Finite State Vector Quantization in real-time for both speech and image data. This architecture is ...

Apr 1, 1993 · We present a new systolic architecture for implementing Finite State Vector Quantization in real-time for both speech and image data.

Apr 1, 1993 · We present a new systolic architecture for implementing Finite State Vector Quantization in real-time for both speech and image data.

The authors present a new systolic architecture for implementing finite state vector quantization in real-time for both speech and image data.

A basic systolic cell is designed with two modes (forward and reverse) of operation. In the forward mode, the cell executes the basic operation in a VQ encoder, ...

This paper presents a new systolic architecture to realize the encoder of the full-search vector quantization (VQ) for high- speed applications.

The systolic concept is adapted to design architectures that are simple, regular, and that achieve high concurrency, local communication, and high throughput.