A pipeline is common paradigm for very high-speed computation. A pipeline pro- vides high speed because it supports the parallel execution of many ...

Oct 22, 2024 · This work investigates the inherent relations among latch-free dynamic pipelines (LFDP). Approaches to self-checking (SC) LFDP design are also ...

This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, ...

This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, both ...

Each pipeline stage is composed of a dual-rail function block and a completion detector. Each function block consists of dynamic logic gates, whose precharge ...

The concept of the Moebius strip is introduced into LSI circuit design, realizing 8.4 FO4-Inverter throughput for any kind of digital logic circuit.

This method is used in [5], where synchronous pipelines are transformed into asynchronous circuits using dual-rail coding. These desynchronisation methods ...

This paper introduces a novel design method of an asynchronous pipeline based on dual-rail dynamic logic. The overhead of handshake control logic is greatly ...

It has been found that the Dynamic current mode logic (DCML) is faster and has low communication noise. But the main drawback is that they suffer from static.

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