Professor of Computer Engineering, Tallinn University of Technology - Cited by 1192 - high-level & logic synthesis - hardware description languages ...
Professor at Tallinn University of Technology · Experience: Tallinn University of Technology · Location: Estonia · 246 connections on LinkedIn. View Peeter ...
Oct 10, 2024 · Associate Professor, Head of Centre - Study Centre for Computer Systems: Department of Computer Systems: Tallinn University of Technology.
Affiliations: [Department of Computer Systems, Tallinn University of Technology, Tallinn, Estonia].
Peeter Ellervee
Author
Affiliation: Tallinn University of Technology
Research interests: High-Level & Logic Synthesis, Hardware Description Languages, and Hardware/Software Codesign
Peeter ELLERVEE | Cited by 425 | of Tallinn University of Technology, Tallinn (TTU) | Read 71 publications | Contact Peeter ELLERVEE.
Peeter Ellervee · Associate Professor, Head of Centre · 6202258 · peeter.ellervee@taltech.ee · Arvutisüsteemide õppekeskus, Infotehnoloogia teaduskonna dekanaat ...
Oct 10, 2024 · Peeter Ellervee. Born on 07. detsember 1960. COPY LINK ... peeter.ellervee@taltech.ee; ORCID 0000-0002-0745-6743. Üldinfo ...
Oct 29, 2024 · Architectural Solutions for High-Speed Data Processing Demands of CERN LHC Detectors with FPGA and High-Level Synthesis.
List of computer science publications by Peeter Ellervee.