Dec 6, 2007 · This paper presents a built-in self-test (BIST) architecture for testing high-speed analog-to-digital converters (ADCs) with sampling rates ...
Built-In Self-Test for Low-Voltage High-Speed Analog-to-Digital Converters
ieeexplore.ieee.org › iel5
Abstract—This paper presents a built-in self-test (BIST) ar- chitecture for testing high-speed analog-to-digital converters.
A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters · Computer Science, Engineering. IEEE ...
Amplitude and time measurements for the output signal are commonly realized with Analog to Digital Converters (ADC) [19] and Time to Digital Converters (TDC) [ ...
Nov 28, 2019 · Built-in self test of high speed analog-to-digital converters ; Published in: IEEE Instrum.Measur.Mag. 22 (2019) 6, 4-10 ; DOI: 10.1109/MIM.
People also ask
What is the voltage of analog to digital converter?
What are the different types of analog to digital converters?
This fully integrated, low cost, and reconfigurable architecture for coherent self-testing of high speed ADCs is based on two synchronized PLLs, one to ...
We have invented a built-in self test technique for an integrated circuit having an analog to digital converter. A linear ramp voltage is generated on the ...
Missing: Speed | Show results with:Speed
Abstract. This paper presents a new Built-In Self-Test for. Pipeline ADC's. The test set is divided in 3 parts: Monotonicity test for basic functionality ...
This document describes both the characterization and production test methods used by the High Speed Converter Group of Analog Devices, Inc., ...
Missing: Self- | Show results with:Self-
A built-in self-test (BIST) architecture for testing high speed analog-to-digital converters (ADCs) with sampling rates in excess of 1 GHz is presented and ...