This paper presents a new asynchronous data-transfer in a multi-valued current-mode VLSI circuit based on dual-rail differential logic.

In this paper, a new asynchronous data-transfer scheme based on dual-rail differential logic is presented to realize a clock-skew-free multiple-valued current-.

This paper presents a new asynchronous data-transfer in a multi-valued current-mode VLSI circuit based on dual-rail differential logic and demonstrates that ...

One p ossible and exp ected approach to solvingthe ab ove clo ck-distribution problem inside a VLSIchip is to use an asynchronous (or self-timed) datatransfer ...

Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic · Self-Checking Multiple-Valued Circuit ...

Dive into the research topics of 'Asynchronous multiple-valued VLSI system based on dual-rail current-mode differential logic'. Together they form a unique ...

Asynchronous multiple-valued VLSI system based on dual-rail current-mode differential logic. Hanyu T., Saito T., Kameyama M.

In deep submicron VLSI, the asynchronous data protocol is a known technique to solve the performance degradation and increase in power dissipation problems ...

This paper presents a new asynchronous data-transfer scheme in a multiple-valued current-mode VLSI circuit based on dual-rail differential logic.

The dual-rail MVCM circuit is efficiency utilized not only for high-speed and low power arithmetic VLSI systems, but also for asynchronous control circuits and/ ...