We propose two heterogeneity-aware thread schedulers, PBS and LCSS. PBS makes scheduling based on applications' sensitivity on large cores.

Apr 25, 2017 · advocates heterogeneous (or asymmetric) multi-core architectures consisting of a combination of cores with different computational capabilities.

We have implemented these two schedulers in Linux and evaluated their performance with the PARSEC benchmark on different heterogeneous architectures. Overall, ...

We propose a Heterogeneity-Aware Signature-Supported (HASS) scheduling algorithm that performs this mapping using per-thread architectural signatures, which are ...

Despite their benefits in energy and performance, heterogeneous architectures pose significant challenges on the design of operating systems or programming.

Automated techniques for energy efficient scheduling on homogeneous and heterogeneous chip multi-processor architectures. In Proceedings of the 2008 ...

Specialization is effected by an asymmetry-aware thread scheduler, which map threads to cores in consider- ation of the properties of both. Previous asymmetry- ...

Current chip multiprocessors (CMPs) incorporate asymmetric cores (i.e. static asymmetry) and DVFS (i.e. dynamic asymmetry) to enable energy efficient execution.

The scheduler is called HASS (Heterogeneity aware signature supported) scheduler. This scheduler is based on architectural signatures of threads, which can be ...

Apr 16, 2010 · In this paper, we propose bias scheduling for performance asymmetric heterogeneous systems with cores that have dif- ferent microarchitectures.