This 300 MHz quad-issue custom VLSI implementation of the Alpha architecture delivers 1200 MIPS (peak), 600 MFLOPS (peak), 341 SPECint92, and 512 SPECfp92.

This paper describes the circuit and implementation techniques that were used to attain the 300 MHz operating frequency. A. I. INTRODUCTION. SECOND-GENERATION ...

This quad-issue custom VLSI implementation of the Alpha architecture delivers 1200 MIPS/600 MFLOPS (peak) performance. The 16.5/spl times/18.1 mm/sup 2/ die ...

The instruction issue unit can issue up to four instructions per cycle and operates in the first four stages (S0 to S3) of the pipeline. The instructions are ...

Internal organization of the Alpha 21164, a 300-MHz 64-bit quad-issue CMOS RISC microprocessor · Contents. Digital Technical Journal. Volume 7, Issue 1 ...

... 300 MHz 64 b quad-issue CMOS RISC microprocessor. Bowhill W.J., Allmon R.L., Bell S.L., Cooper E.M., Donchin D.R., Edmondson J.H., Fischer T.C., Gronowski ...

The 21164 is a new quad-issue, superscalar Alpha microprocessor that executes 1.2 billion instructions per second and the design's high clock rate, ...

A 300-MHz, custom 64-bit VLSI, second-generation Alpha CPU chip has been developed. The chip was designed in a 0.5-um CMOS technology using four levels of metal ...

The Alpha 21164 microprocessor is now a product of Digital Semiconductor. The chip is the second com- pletely new microprocessor to implement the Alpha ...

Nov 27, 2020 · Edmondson, John H., et al. "Internal organization of the Alpha 21164, a 300-MHz 64-bit quad-issue CMOS RISC microprocessor." Digital Technical ...