Jan 24, 2013 · Abstract: A 2.4-GHz low-noise sub-harmonic direct-conversion receiver (SH-DCR) is demonstrated using standard 0.18- \mu m CMOS technology.

Abstract—A 2.4-GHz low-noise sub-harmonic direct-conversion receiver (SH-DCR) is demonstrated using standard 0.18- m. CMOS technology.

A 2.4-GHz low-noise sub-harmonic direct-conversion receiver (SH-DCR) is demonstrated using standard 0.18-μm CMOS technology. Deep-n-well vertical-NPN ...

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This architecture have a low flicker noise (20.29Hz) and a good double sideband noise figure (9.29dB) while demanding little power consumption. The input ...

Abstract - In this paper a low power CMOS sub-harmonic mixer based on the Gilbert cell for 2.4 GHz. ISM band application is presented, in which the position ...

Fabricated in 0.18 m CMOS and measured at 5 GHz, this passive mixer obtains 3 dB conversion gain, 39 dBm IIP2, and 5 dBm IIP3 with LO driving at 0 dBm. When the ...

This paper presents a low power CMOS RF front-end with a low noise amplifier (LNA) and mixer for long term evolution (LTE) direct conversion receiver. Noise ...

The proposed core uses 1/2×LO generation scheme to overcome LO self-mixing and IMD2 related problems common in conventional Direct Conversion Receivers.

The proposed mixer presents a low flicker noise RF CMOS mixer using TSMC0.13-μm technology for 2.4 GHz wireless communication systems with better ...