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The logic supports modular reasoning about the main features of SPARCv8 ISA (instruction set architecture), including delayed control transfers, delayed writes to special registers, and register windows. It also supports relational reasoning for refinement verification.
In this paper we propose a practical Hoare-style program logic for verifying SPARC assembly code. The logic supports modular reasoning about the main features ...
Inline assembly code is common in system software to interact with the underlying hardware platforms. The safety and correctness of the assembly code is ...
The logic supports modular reasoning about the main features of SPARCv8 ISA (instruction set architecture), including delayed control transfers, delayed writes ...
Program logic for SPARCv8 implementation in Coq (project code). https://github.com/jpzha/VeriSparc; SPARC. https://gaisler.com/doc/sparcv8.pdf; Appel, ...
PDF | On Jan 1, 2018, Junpeng Zha and others published Modular Verification of SPARCv8 Code: 16th Asian Symposium, APLAS 2018, Wellington, New Zealand, ...
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Leroy X, Blazy S. Formal verification of a C-like memory model and its uses for verifying program transformations. Journal of Automated Reasoning, 2008, 41(1): ...
Feb 28, 2022 · Bibliographic details on Modular Verification of SPARCv8 Code.
This allows program modules and their proofs developed in different PCC systems to be linked together. Our system is fully mechanized. We give the complete ...
Modular Verification of SPARCv8 Code · Verification of Real Time Operating System Exception Management Based on SPARCv8 · Formalizing GPU Instruction Set ...