Popular repositories Loading

1. chisel chisel Public

   Chisel: A Modern Hardware Design Language

   Scala 4.4k 641

2. rocket-chip rocket-chip Public

   Rocket Chip Generator

   Scala 3.6k 1.2k

3. verible verible Public

   Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

   C++ 1.7k 254

4. riscv-dv riscv-dv Public

   Random instruction generator for RISC-V processor verification

   Python 1.2k 356

5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

   VeeR EH1 core

   SystemVerilog 901 233

6. firrtl firrtl Public archive

   Flexible Intermediate Representation for RTL

   Scala 748 179