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- research-articleMarch 2022
Fast En/Decoding of Reed-Solomon Codes for Failure Recovery
IEEE Transactions on Computers (ITCO), Volume 71, Issue 3Pages 724–735https://doi.org/10.1109/TC.2021.3060701Reed-Solomon (RS) codes are used in many storage systems for failure recovery. In popular software implementations, RS codes are defined by using a parity check matrix that is either a Cauchy matrix padded with an identity or a Vandermonde matrix. The ...
- research-articleMarch 2022
Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures
- Fernando F. dos Santos,
- Marcelo Brandalero,
- Michael B. Sullivan,
- Pedro M. Basso,
- Michael Hübner,
- Luigi Carro,
- Paolo Rech
IEEE Transactions on Computers (ITCO), Volume 71, Issue 3Pages 573–586https://doi.org/10.1109/TC.2021.3058872Duplication with Comparison (DWC) is an effective software-level solution to improve the reliability of computing devices. However, it introduces performance and energy consumption overheads that could be unsuitable for high-performance computing or real-...
- research-articleFebruary 2020
Comparing Neural Network Based Decoders for the Surface Code
IEEE Transactions on Computers (ITCO), Volume 69, Issue 2Pages 300–311https://doi.org/10.1109/TC.2019.2948612Matching algorithms can be used for identifying errors in quantum systems, being the most famous the Blossom algorithm. Recent works have shown that small distance quantum error correction codes can be efficiently decoded by employing machine learning ...
- research-articleNovember 2019
Tensor Product DFT Codes vs Standard DFT Codes
IEEE Transactions on Computers (ITCO), Volume 68, Issue 11Pages 1678–1688https://doi.org/10.1109/TC.2019.2918791We present a new class of linear error-correcting codes taking numerical data into codewords with numerical symbols. These codes can correct large random numerical errors added to codewords. The goal is for numerical data to be protected directly as ...
- research-articleJune 2016
Single Multiscale-Symbol Error Correction Codes for Multiscale Storage Systems
IEEE Transactions on Computers (ITCO), Volume 65, Issue 6Pages 2005–2009https://doi.org/10.1109/TC.2015.2456024This manuscript proposes three classes of codes for error correction in a storage system in which the memory cells do not have the same number of levels, i.e., a multiscale storage. The proposed codes are single multiscale-symbol error correction (SMSEC) ...
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- research-articleApril 2016
Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality
IEEE Transactions on Computers (ITCO), Volume 65, Issue 4Pages 1090–1102https://doi.org/10.1109/TC.2014.2345387NAND flash-based solid-state drives (SSDs), which can serve as the caches of hard disk drives, have gained popularity in large-scale, high-performance storage. A type of advanced error correction code for SSDs, low-density parity-check (LDPC), is required ...
- research-articleFebruary 2016
A Non-Iterative Multiple Residue Digit Error Detection and Correction Algorithm in RRNS
IEEE Transactions on Computers (ITCO), Volume 65, Issue 2Pages 396–408https://doi.org/10.1109/TC.2015.2435773Error detection and correction code based on Redundant Residue Number System (RRNS) has a unique advantage that arithmetical processing errors can also be corrected. Existing algorithms for multiple residue digit error correction in RRNS require either ...
- research-articleOctober 2015
Parallel Decodable Two-Level Unequal Burst Error Correcting Codes
IEEE Transactions on Computers (ITCO), Volume 64, Issue 10Pages 2902–2911https://doi.org/10.1109/TC.2014.2378290Approximate (or inexact) computing is an attractive paradigm for digital processing at nanometric scales for applications in which imprecision in computation can be tolerated for improvements in other computational figures of merit, such as power ...
- research-articleOctober 2015
Unequal Error Protection of Memories in LDPC Decoders
IEEE Transactions on Computers (ITCO), Volume 64, Issue 10Pages 2981–2993https://doi.org/10.1109/TC.2014.2378271Memories are one of the most critical components of many systems: due to exposure to energetic particles, fabrication defects and aging they are subject to various kinds of permanent and transient errors. In this scenario, Unequal error protection (UEP) ...
- research-articleJuly 2015
Enabling Concurrent Failure Recovery for Regenerating-Coding-Based Storage Systems: From Theory to Practice
IEEE Transactions on Computers (ITCO), Volume 64, Issue 7Pages 1898–1911https://doi.org/10.1109/TC.2014.2349518Data availability is critical in distributed storage systems, especially when node failures are prevalent in real life. A key requirement is to minimize the amount of data transferred among nodes when recovering the lost or unavailable data of failed ...
- research-articleJuly 2015
Non-Binary Orthogonal Latin Square Codes for a Multilevel Phase Charge Memory (PCM)
IEEE Transactions on Computers (ITCO), Volume 64, Issue 7Pages 2092–2097https://doi.org/10.1109/TC.2014.2346182This manuscript proposes non-binary orthogonal Latin square (OLS) codes that are amenable to a multilevel phase change memory (PCM). This is based on the property that the proposed (n symbols, ksymbols) t-symbol error correcting code uses the same H ...
- research-articleMay 2015
Low Delay Single Symbol Error Correction Codes Based on Reed Solomon Codes
IEEE Transactions on Computers (ITCO), Volume 64, Issue 5Pages 1497–1501https://doi.org/10.1109/TC.2014.2322599To avoid data corruption, error correction codes (ECCs) are widely used to protect memories. ECCs introduce a delay penalty in accessing the data as encoding or decoding has to be performed. This limits the use of ECCs in high-speed memories. This has led ...
- research-articleFebruary 2009
Error-Correcting Codes for Ternary Content Addressable Memories
IEEE Transactions on Computers (ITCO), Volume 58, Issue 2Pages 275–279https://doi.org/10.1109/TC.2008.179As VLSI silicon technology continues its relentless advance and memory densities increase, the problem of soft errors--bit upsets caused by alpha particles or neutron hits--demands solutions. Error-correcting codes (ECCs) are routinely used on random-...
- research-articleJuly 2008
STAR: An Efficient Coding Scheme for Correcting Triple Storage Node Failures
IEEE Transactions on Computers (ITCO), Volume 57, Issue 7Pages 889–901https://doi.org/10.1109/TC.2007.70830Proper data placement schemes based on erasure correcting code are one of the most important components for a highly available data storage system. For such schemes, low decoding complexity for correcting (or recovering) storage node failures is ...
- research-articleDecember 2007
Communication Links for Distributed Quantum Computation
IEEE Transactions on Computers (ITCO), Volume 56, Issue 12Pages 1643–1653https://doi.org/10.1109/TC.2007.70775Distributed quantum computation requires quantum operations that act over a distance on error correction-encoded states of logical qubits, such as the transfer of qubits via teleportation. We evaluate the performance of several quantum error correction ...
- research-articleOctober 2007
Mixed-Radix Gray Codes in Lee Metric
IEEE Transactions on Computers (ITCO), Volume 56, Issue 10Pages 1297–1307https://doi.org/10.1109/TC.2007.1083Gray codes, where two consecutive codewords differ in exactly one position by $\pm 1$,are given. In a single radix code, all dimensions have the same base, say $k$, whereas in a mixed radix code the base in one dimension can be different from the base ...
- research-articleJune 2007
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers (ITCO), Volume 56, Issue 6Pages 785–798https://doi.org/10.1109/TC.2007.1025Asynchronous controllers exhibit various characteristics that limit the effectiveness and applicability of the Concurrent Error Detection (CED) methods developed for their synchronous counterparts. Asynchronous Burst-Mode Machines (ABMMs), for example, ...
- research-articleMay 2007
Estimating Error Rate in Defective Logic Using Signature Analysis
IEEE Transactions on Computers (ITCO), Volume 56, Issue 5Pages 650–661https://doi.org/10.1109/TC.2007.1017As feature size approaches molecular dimensions and the number of devices per chip reaches astronomical values, VLSI manufacturing yield significantly decreases. This motivates interests in new computing models. One such model is called error tolerance. ...
- research-articleMay 2007
An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers
IEEE Transactions on Computers (ITCO), Volume 56, Issue 5Pages 635–649https://doi.org/10.1109/TC.2007.1015One of the most effective ways of attacking a cryptographic device is by deliberate fault injection during computation, which allows retrieving the secret key with a small number of attempts. Several attacks on symmetric and public-key cryptosystems ...
- research-articleApril 2007
ARQ Protocols and Unidirectional Codes
IEEE Transactions on Computers (ITCO), Volume 56, Issue 4Pages 433–443https://doi.org/10.1109/TC.2007.1006Forward error control (FEC) and Automatic-repeat request (ARQ) are two main techniques used for reliable data transmission in computer and communication systems. In this paper, some simple, low cost error control techniques for ARQ protocols used with ...