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- ArticleApril 1982
A recursive computer architecture for VLSI
We present a general-purpose computer architecture based on the concept of recursion, suitable for VLSI computer systems built from replicated (LEGO-like) computing elements. The recursive computer architecture is defined by presenting a program ...
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ACM SIGARCH Computer Architecture News: Volume 10 Issue 3 - ArticleApril 1982
Fault-tolerant wafer-scale architectures for VLSI
The basic problem which limits both yields and chip sizes is the fact that circuits created using current design techniques will not function correctly in the presence of even a single flaw of sufficient size anywhere on the chip. In this work we ...
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ACM SIGARCH Computer Architecture News: Volume 10 Issue 3 - ArticleApril 1982
A logic simulation machine
Special-purpose CAD hardware is increasingly being considered as a means to meet the challenge posed to conventional (software-based) CAD tools by the growing complexity of VLSI circuits. In this paper we describe the architecture of a logic simulation ...
Also Published in:
ACM SIGARCH Computer Architecture News: Volume 10 Issue 3 - ArticleApril 1982
Asynchronous and clocked control structures for VLSI based interconnection networks
A central issue in the design of multiprocessor systems is the interconnection network which provides communications paths between the processors. For large systems, high bandwidth interconnection networks will require numerous 'network chips' with each ...
Also Published in:
ACM SIGARCH Computer Architecture News: Volume 10 Issue 3 - ArticleApril 1982
VLSI architectures for high speed recognition of context-free languages and finite-state languages
This paper presents two VLSI architectures for the recognition of context-free languages and finite-state languages. The architecture for context-free languages consists of n(n+1)/2 identical cells and it is capable of recognizing an input string of ...
Also Published in:
ACM SIGARCH Computer Architecture News: Volume 10 Issue 3 - ArticleApril 1982
Measurement and analysis of instruction use in the VAX-11/780
This paper reports measurements of instruction set use on the VAX-11/780 computer. A hardware monitor was used to measure the frequency and time taken by each VAX instruction. Data from benchmark programs, a compiler, a linker, and a synthetic ...
Also Published in:
ACM SIGARCH Computer Architecture News: Volume 10 Issue 3