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- research-articleJanuary 2023
Automatic Generation of Complete Polynomial Interpolation Design Space for Hardware Architectures
ASPDAC '23: Proceedings of the 28th Asia and South Pacific Design Automation ConferencePages 573–578https://doi.org/10.1145/3566097.3567840Hardware implementations of elementary functions regularly deploy piecewise polynomial approximations. This work determines the complete design space of piecewise polynomial approximations meeting a given accuracy specification. Knowledge of this design ...
- research-articleJanuary 2023
An improved reptile search algorithm based on mathematical optimization accelerator and elementary functions
Journal of Intelligent & Fuzzy Systems: Applications in Engineering and Technology (JIFS), Volume 45, Issue 3Pages 4179–4208https://doi.org/10.3233/JIFS-223210The reptile search algorithm (RSA) is a dynamic and effective meta-heuristic algorithm inspired by the behavior of crocodiles in nature and the way of hunting prey. Unlike other crawler search algorithms, it uses four novel mechanisms to update the ...
- research-articleSeptember 2020
Polynomial Evaluation on Superscalar Architecture, Applied to the Elementary Function ex
ACM Transactions on Mathematical Software (TOMS), Volume 46, Issue 3Article No.: 28, Pages 1–22https://doi.org/10.1145/3408893The evaluation of small degree polynomials is critical for the computation of elementary functions. It has been extensively studied and is well documented. In this article, we evaluate existing methods for polynomial evaluation on superscalar ...
- research-articleOctober 2018
Hardware/software codesign for mathematical function acceleration
CASCON '18: Proceedings of the 28th Annual International Conference on Computer Science and Software EngineeringPages 168–177Many important workloads depend on the efficient computation of elementary functions like square root and logarithm. Accurate computation of these functions is time-consuming, and hard for compilers to schedule, because of conditional execution. These ...
- research-articleDecember 2016
GPU-Accelerated Generation of Correctly Rounded Elementary Functions
ACM Transactions on Mathematical Software (TOMS), Volume 43, Issue 3Article No.: 22, Pages 1–26https://doi.org/10.1145/2935746The IEEE 754-2008 standard recommends the correct rounding of some elementary functions. This requires solving the Table Maker’s Dilemma (TMD), which implies a huge amount of CPU computation time. In this article, we consider accelerating such ...
- research-articleJuly 2014
FPGA Implementation of a Special-Purpose VLIW Structure for Double-Precision Elementary Function
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 7, Issue 2Article No.: 8, Pages 1–21https://doi.org/10.1145/2617594In the current article, the capability and flexibility of field programmable gate-arrays (FPGAs) to implement IEEE-754 double-precision floating-point elementary functions are explored. To perform various elementary functions on the unified hardware ...
- research-articleSeptember 2013
VLIW coprocessor for IEEE-754 quadruple-precision elementary functions
ACM Transactions on Architecture and Code Optimization (TACO), Volume 10, Issue 3Article No.: 12, Pages 1–22https://doi.org/10.1145/2512430In this article, a unified VLIW coprocessor, based on a common group of atomic operation units, for Quad arithmetic and elementary functions (QP_VELP) is presented. The explicitly parallel scheme of VLIW instruction and Estrin's evaluation scheme for ...
- ArticleApril 2013
Elementary Function Implementation with Optimized Sub Range Polynomial Evaluation
FCCM '13: Proceedings of the 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing MachinesPages 202–205https://doi.org/10.1109/FCCM.2013.30Efficient elementary function implementations require primitives optimized for modern FPGAs. Fixed-point function generators are one such type of primitives. When built around piecewise polynomial approximations they make use of memory blocks and ...
- ArticleSeptember 2011
FPGA implementation of variable-precision floating-point arithmetic
APPT'11: Proceedings of the 9th international conference on Advanced parallel processing technologiesPages 127–141This paper explores the capability of FPGA solutions to accelerate scientific applications with variable-precision floating-point (VP) arithmetic. First, we present a special-purpose Very Large Instruction Word (VLIW) architecture for VP arithmetic (VV-...
- ArticleJune 2009
Certified and Fast Computation of Supremum Norms of Approximation Errors
ARITH '09: Proceedings of the 2009 19th IEEE Symposium on Computer ArithmeticPages 169–176https://doi.org/10.1109/ARITH.2009.18In many numerical programs there is a need for a high-quality floating-point approximation of useful functions f, such as such as exp, sin, erf. In the actual implementation, the function is replaced by a polynomial p, which leads to an approximation ...
- ArticleMarch 2008
Highly Efficient Structure of 64-Bit Exponential Function Implemented in FPGAs
ARC '08: Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and ApplicationsPages 274–279https://doi.org/10.1007/978-3-540-78610-8_28This paper presents implementation of the double precision exponential function. A novel table-based architecture, together with short Taylor expansion, provides low latency (30 clock cycles) which is comparable to 32-bit implementations. Low area ...
- articleJune 2007
MPFR: A multiple-precision binary floating-point library with correct rounding
ACM Transactions on Mathematical Software (TOMS), Volume 33, Issue 2Pages 13–eshttps://doi.org/10.1145/1236463.1236468This article presents a multiple-precision binary floating-point library, written in the ISO C language, and based on the GNU MP library. Its particularity is to extend to arbitrary-precision, ideas from the IEEE 754 standard, by providing correct ...
- chapterNovember 2004
A study of secure multi-party elementary function computation protocols
InfoSecu '04: Proceedings of the 3rd international conference on Information securityPages 5–12https://doi.org/10.1145/1046290.1046293The growth of the Internet has triggered tremendous opportunities for cooperative computation, where people are jointly conducting computation tasks based on the private inputs they each supply. These computations could occur between mutually untrusted ...
- research-articleNovember 1997
Hybrid CORDIC Algorithms
IEEE Transactions on Computers (ITCO), Volume 46, Issue 11Pages 1202–1207https://doi.org/10.1109/12.644295Each coordinate rotation digital computer iteration selects the rotation direction by analyzing the results of the previous iteration. In this paper, we introduce two arctangent radices and show that about 2/3 of the rotation directions can be derived ...