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DBSR: An Efficient Storage Format for Vectorizing Sparse Triangular Solvers on Structured Grids
SC '24: Proceedings of the International Conference for High Performance Computing, Networking, Storage, and AnalysisArticle No.: 59, Pages 1–14https://doi.org/10.1109/SC41406.2024.00065The Sparse Triangular Solver (SPTRSV) plays a critical role in solving structured grid problems. Yet, the commonly used sparse matrix storage formats for structured grid methods do not efficiently support SPTRSV in utilizing the instruction parallelism ...
- ArticleNovember 2024
Segmentation-Guided Layer-Wise Image Vectorization with Gradient Fills
AbstractThe widespread use of vector graphics creates a significant demand for vectorization methods. While recent learning-based techniques have shown their capability to create vector images of clear topology, filling these primitives with gradients ...
- ArticleSeptember 2024
Historical Astronomical Diagrams Decomposition in Geometric Primitives
Document Analysis and Recognition - ICDAR 2024Pages 108–125https://doi.org/10.1007/978-3-031-70543-4_7AbstractAutomatically extracting the geometric content from the hundreds of thousands of diagrams drawn in historical manuscripts would enable historians to study the diffusion of astronomical knowledge on a global scale. However, state-of-the-art ...
- research-articleAugust 2024
Optimizing Stencil Computation on Multi-core DSPs
- Fugeng Zhu,
- Xinxin Qi,
- Peng Zhang,
- Jianbin Fang,
- Tao Tang,
- Yonggang Che,
- Kainan Yu,
- Jing Xie,
- Chun Huang,
- Jie Ren
ICPP '24: Proceedings of the 53rd International Conference on Parallel ProcessingPages 679–690https://doi.org/10.1145/3673038.3673062Stencil is a common computation pattern in high-performance computing (HPC) applications. While extensive work has been proposed to optimize stencil kernels on CPUs and GPUs, there is no consensus on how to best optimize stencils on multi-core Digital ...
- research-articleAugust 2024
Optimizing SpMV on Heterogeneous Multi-Core DSPs through Improved Locality and Vectorization
ICPP '24: Proceedings of the 53rd International Conference on Parallel ProcessingPages 1145–1155https://doi.org/10.1145/3673038.3673061The sparse matrix-vector multiplication (SpMV) is widely used in large-scale scientific computing and engineering. However, optimizing SpMV for high-performance digital signal processors (DSPs) has received limited attention. We present HaLAV, a method ...
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- research-articleJuly 2024
Vectfem: a generalized MATLAB-based vectorized algorithm for the computation of global matrix/force for finite elements of any type and approximation order in linear elasticity
- ArticleJuly 2024
Parallel Vectorized Algorithms for Computing Trigonometric Sums Using AVX-512 Extensions
AbstractThe aim of this paper is to show that Goertzel and Reinsch algorithms for computing trigonometric sums can be efficiently vectorized using Intel AVX-512 intrinsics in order to utilize SIMD extensions of modern processors. Numerical experiments ...
- research-articleAugust 2024
PSDCLS: Parallel simultaneous diffusion–confusion image cryptosystem based on Latin square
Journal of Information Security and Applications (JISA), Volume 83, Issue Chttps://doi.org/10.1016/j.jisa.2024.103785AbstractToday, due to the unparalleled growth of multimedia data sharing, especially digital images, between users over insecure channels in real-time applications, cryptography algorithms have gained increasing attention for the secure and efficient ...
- extended-abstractJuly 2024
muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension
CF '24 Companion: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special SessionsPages 75–78https://doi.org/10.1145/3637543.3652878With the rapid adoption of deep learning workloads to resource-constrained edge devices, efficient and data-parallel computing paradigms are becoming increasingly important. The RISC-V ISA provides a set of vector extensions featuring powerful data ...
- research-articleJuly 2024
VPPLR: Privacy-preserving logistic regression on vertically partitioned data using vectorization sharing
Journal of Information Security and Applications (JISA), Volume 82, Issue Chttps://doi.org/10.1016/j.jisa.2024.103725AbstractThe construction of high-precision machine learning models relies on large-scale data collection from IoT devices. Since the training data involves sensitive user information, it is essential to design a privacy-preserving machine learning (PPML) ...
- ArticleMarch 2024
- ArticleMarch 2024
- research-articleOctober 2023
Anomaly detection of vectorized time series on aircraft battery data
Expert Systems with Applications: An International Journal (EXWA), Volume 227, Issue Chttps://doi.org/10.1016/j.eswa.2023.120219AbstractThe power supply system, as an indispensable electronic hardware module in most vehicles, needs the highest level of security and reliability to ensure the normal operation of the vehicle. Efficiently identifying any faulty battery at ...
Highlights- Proposing a new time series feature extraction and transformation method PVT.
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- research-articleJune 2023
Topology- and Perception-Aware Image Vectorization
Journal of Mathematical Imaging and Vision (JMIV), Volume 65, Issue 6Pages 874–893https://doi.org/10.1007/s10851-023-01149-8AbstractWe propose a new color image vectorization method converting raster images to resolution-independent scalable vector graphics. Starting from a quantized raster image, the method builds a hierarchical structure to represent its discontinuity set. ...
- research-articleMarch 2023
SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning
ASPLOS 2023: Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3Pages 660–678https://doi.org/10.1145/3582016.3582047Sparse tensors are rapidly becoming critical components of modern deep learning workloads. However, developing high-performance sparse operators can be difficult and tedious, and existing vendor libraries cannot satisfy the escalating demands from new ...
- research-articleMarch 2023
Coyote: A Compiler for Vectorizing Encrypted Arithmetic Circuits
ASPLOS 2023: Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3Pages 118–133https://doi.org/10.1145/3582016.3582057Fully Homomorphic Encryption (FHE) is a scheme that allows a computational circuit to operate on encrypted data and produce a result that, when decrypted, yields the result of the unencrypted computation. While FHE enables privacy-preserving ...
- research-articleFebruary 2023
Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows
CGO '23: Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and OptimizationPages 186–198https://doi.org/10.1145/3579990.3580019Achieving peak throughput on modern CPUs requires maximizing the use of single-instruction, multiple-data (SIMD) or vector compute units. Single-program, multiple-data (SPMD) programming models are an effective way to use high-level programming languages ...
- research-articleFebruary 2023
Code Generation for In-Place Stencils
CGO '23: Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and OptimizationPages 2–13https://doi.org/10.1145/3579990.3580006Numerical simulation often resorts to iterative in-place stencils such as the Gauss-Seidel or Successive Overrelaxation (SOR) methods. Writing high performance implementations of such stencils requires significant effort and time; it also involves non-...
- research-articleFebruary 2023