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- research-articleDecember 2022
- ArticleJanuary 2022
Scaling Up Livelock Verification for Network-on-Chip Routing Algorithms
Verification, Model Checking, and Abstract InterpretationPages 378–399https://doi.org/10.1007/978-3-030-94583-1_19AbstractAs an efficient interconnection network, Network-on-Chip (NoC) provides significant flexibility for increasingly prevalent many-core systems. It is desirable to deploy fault-tolerance in a dependable safety-critical NoC design. However, this ...
- research-articleMay 2020
A degradable NoC router for the improvement of fault-tolerant routing performance
Artificial Life and Robotics (SPALR), Volume 25, Issue 2Pages 301–307https://doi.org/10.1007/s10015-019-00579-1AbstractNetwork-on-chip (NoC) provides high computation performance for a wide range of applications including robotics and artificial intelligence. This paper deals with the issue of improving the fault-tolerant routing performance for realizing high-...
- research-articleMay 2020
Effect of Virtual Channels for a Fault-Tolerant XY Routing Method with the Passage of Faulty Nodes
ICIET 2020: Proceedings of the 2020 8th International Conference on Information and Education TechnologyPages 267–272https://doi.org/10.1145/3395245.3396419The purpose of this paper is to reveal the effect of Virtual Channels (VCs) for our novel proposed fault-tolerant routing method which allows the passage of faulty nodes in Network on Chips (NoCs). Conventional fault-tolerant routing methods can be ...
- research-articleDecember 2018
Fault-Tolerant Unicast-Based Multicast for Reliable Network-on-Chip Testing
ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 23, Issue 6Article No.: 73, Pages 1–23https://doi.org/10.1145/3243214We present a unified test technique that targets faults in links, routers, and cores of a network-on-chip design based on test sessions. We call an entire procedure, that delivers test packets to the subset of routers/cores, a test session. Test ...
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- research-articleNovember 2017
Node-independent spanning trees in Gaussian networks
Journal of Parallel and Distributed Computing (JPDC), Volume 109, Issue CPages 324–332https://doi.org/10.1016/j.jpdc.2017.06.018Message broadcasting in networks can be efficiently carried over spanning trees. A set of spanning trees in the same network is node independent if two conditions are satisfied. First, all trees are rooted at the same node r. Second, for every node u in ...
- articleApril 2015
A fault-tolerant routing algorithm in HyperX topology based on unsafety vectors
The Journal of Supercomputing (JSCO), Volume 71, Issue 4Pages 1224–1248https://doi.org/10.1007/s11227-014-1355-yHyperX is a promising high-radix topology proposed by a group of researchers in HP laboratories. The topology offers numerous advantages of high-radix routers, among which are very low diameter and low average distance. Increasing degree of routers and ...
- research-articleAugust 2014
Reliability analysis and fault tolerance for hypercube multi-computer networks
Information Sciences: an International Journal (ISCI), Volume 276, Issue CPages 295–318https://doi.org/10.1016/j.ins.2013.10.031A multi-computer system (MCS) offers the high speed and throughput needed in solving computing-intensive problems. Two main components constitute a MCS. These are the processing elements (PEs) and the interconnection network (IN). A faulty IN can lead ...
- research-articleJuly 2014
Fault-tolerant routing based on approximate directed routable probabilities for hypercubes
Future Generation Computer Systems (FGCS), Volume 37, Issue CPages 88–96https://doi.org/10.1016/j.future.2013.12.003Recently, parallel processing systems have been studied very actively, and many topologies have been proposed. A hypercube is one of the most popular topologies for interconnection networks. In this paper, we propose two new fault-tolerant routing ...
- research-articleApril 2014
Localization-free and energy-efficient hole bypassing techniques for fault-tolerant sensor networks
Nowadays, since wireless sensor networks (WSNs) are increasingly being used in challenged environments such as underground mines, tunnels, oceans and the outer space, fault-tolerance need has become a major requirement for routing protocols. So far, the ...
- ArticleSeptember 2013
A Fault-Tolerant Routing Algorithm Design for On-Chip Optical Networks
SRDS '13: Proceedings of the 2013 IEEE 32nd International Symposium on Reliable Distributed SystemsPages 1–9https://doi.org/10.1109/SRDS.2013.9Optical networks have been considered for on-chip communications due to its advantages on bandwidth density, power efficiency and propagation speed over the electrical counterpart. However, the major optical device-micro ring resonator is very sensitive ...
- articleJune 2013
A Region-based Fault-Tolerant Routing Algorithmfor 2D Irregular Mesh Network-on-Chip
Journal of Electronic Testing: Theory and Applications (JELT), Volume 29, Issue 3Pages 415–429https://doi.org/10.1007/s10836-013-5377-9This paper presents a deadlock-free fault-tolerant routing algorithm for irregular mesh network-on-chips based on a region-based approach. In this approach, a set of rectangular faulty regions called faulty blocks is formed for faulty nodes and a detour ...
- articleJanuary 2013
Optimal fault-tolerant routing algorithm and fault-tolerant diameter in directed double-loop networks
This paper addresses the reliability of directed double-loop networks G(N;r,s), and studies the problems about optimal fault-tolerant routing, fault-tolerant diameter, etc., in G(N;r,s). Firstly, we study the shapes of the L-shaped tiles which are the ...
- ArticleApril 2011
Improving Dependability and Performance of Fully Asynchronous On-chip Networks
ASYNC '11: Proceedings of the 2011 17th IEEE International Symposium on Asynchronous Circuits and SystemsPages 65–76https://doi.org/10.1109/ASYNC.2011.15Network-on-Chip (NoC) is now considered to be a promising approach to implementing many-core systems. In this paper, we propose fully asynchronous on-chip networks which have improved tolerance against stuck-at-faults, aging degradation faults and ...
- research-articleJanuary 2011
A Distributed Algorithm for Finding All Best Swap Edges of a Minimum-Diameter Spanning Tree
IEEE Transactions on Dependable and Secure Computing (TDSC), Volume 8, Issue 1Pages 1–12https://doi.org/10.1109/TDSC.2009.17Communication in networks suffers if a link fails. When the links are edges of a tree that has been chosen from an underlying graph of all possible links, a broken link even disconnects the network. Most often, the link is restored rapidly. A good ...
- ArticleDecember 2010
A New Fault-Tolerant Routing Methodology on 2-D Mesh Networks-on-Chip Based on Construction of Convex and Concave Fault Regions
The move towards nanoscale Integrated Circuits (ICs) increases performance and capacity, but poses process variation and reliability challenges which may cause several faults on routers in Networks-on-Chip (NoCs). While utilizing healthy routers in a ...
- articleNovember 2010
Construction of vertex-disjoint paths in alternating group networks
The Journal of Supercomputing (JSCO), Volume 54, Issue 2Pages 206–228https://doi.org/10.1007/s11227-009-0304-7The existence of parallel node-disjoint paths between any pair of nodes is a desirable property of interconnection networks, because such paths allow tolerance to node and/or link failures along some of the paths, without causing disconnection. ...
- ArticleJune 2010
A Novel Routing Algorithm for Achieving Static Fault-Tolerance in 2-D Meshes
CIT '10: Proceedings of the 2010 10th IEEE International Conference on Computer and Information TechnologyPages 2621–2627https://doi.org/10.1109/CIT.2010.442Interconnection networks encompass a large number of technologies; from chip-to-chip communications to the system area networks (SANS), and in particular as the communication medium for multiprocessors. Interconnection networks offer communication with ...
- ArticleNovember 2009
A New Multiple-Round DOR Routing for 2D Network-on-Chip Meshes
PRDC '09: Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable ComputingPages 276–281https://doi.org/10.1109/PRDC.2009.50The Network-on-Chip (NoC) meshes are limited by the reliability constraint, which impels us to exploit the fault tolerant routing. Particularly, one of the main design issues is minimizing the loss of non-faulty routers at the presence of faults. To ...
- ArticleJanuary 2009
A Location-Based Fault-Tolerant Routing Algorithm for Mobile Ad Hoc Networks
CMC '09: Proceedings of the 2009 WRI International Conference on Communications and Mobile Computing - Volume 02Pages 92–96https://doi.org/10.1109/CMC.2009.41In mobile ad hoc networks, the normal routing is easily broken by malfunction nodes, routing protocols should have fault tolerant capability to guarantee the delivery of message. A location-based fault tolerant routing algorithm (FTRA) for mobile ad hoc ...