Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/115952.115981acmconferencesArticle/Chapter ViewAbstractPublication PagesiscaConference Proceedingsconference-collections
Article
Free access

Exploiting fine-grained parallelism through a combination of hardware and software techniques

Published: 01 April 1991 Publication History
First page of PDF

References

[1]
Bell, C. G., and Newell, A., editors, Computer Structures: Readings and Examples, McGraw-Hill, 1971.
[2]
Buchholz, W., editor, Planning A Computer System, McGraw-Hill, 1962.
[3]
Burks, A. W., Goldstine, H. H., and von Neumann, J., "Preliminary discussion of the logical design of an electronic computing instrument," report to the U.S. Army Ordnance Department, 1946 (reproduced in {Taub63}, {BeNe71}).
[4]
Fisher, J. A., "Trace Scheduling: A Technique for Global Microcode Compaction," IEEE Transactions on Computers, vol. C-30, no. 7, July 1981,
[5]
Hwu, W. W., "HPSm: Exploiting Concurrency to Achieve High Performance in a Single-chip Microarchitecture," Ph.D. Dissertation, University of California, Berkeley, December, 1987.
[6]
Hwu, W. W., and Patt, Y. N., "Checkpoint Repair for Out-of-order Execution Machines," Proceedings, 14th Annual International Symposium on Computer Architecture, June 2-5, 1987, Pittsburgh, PA.
[7]
Hwu, W. W., and Patt, Y. N., "HPSm, A High Performance Restricted Data Flow Architecture Having Minimal FunctionaI ity," Proceedings, 13 th Annual International Symposium on Computer Architecture, Tokyo, June 1986.
[8]
Jouppi, N. P., and Wall, D. W., "Available Instruction- Level Parallelism for Superscalar and Superpipelined Machines," Proceedings, Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, April 3-6, 1989, pp. 272-282.
[9]
Keller, R. M., "Look Ahead Processors," Computing Surveys, vol. 7, no. 4, December 1975.
[10]
Melvin, S. W., Shebanow, M. C., and Patt, Y. N., "Hardware Support for Large Atomic Units in Dynamically Scheduled Machines," Proceedings, 21st Annual Workshop on Microprogramming and Microarchitecture, San Diego, CA, November 1988.
[11]
Patt, Y. N., Hwu, W. W., and Shebanow, M. C., "HPS, A New Microarchitecture: Rationale and Introduction," Proceedings, 18th Annual Workshop on Microprogramming, December 3-6, 1985, Asilomar, CA.
[12]
Patt, Y. N., Melvin, S. W., Hwu, W. W., and Shebanow, M. C., "Critical Issues Regarding HPS, A High Performance Microarchitecture," Proceedings, 18th Annual Workshop on Microprogramming, December 3-6, 1985, Asilomar, CA.
[13]
Patt, Y. N., Shebanow, M. C., Hwu, W., and Melvin, S. W., "A C Compiler for HPS I, A Highly Parallel Execution Engine," Proceedings, 19th Hawaii International Conference on System Sciences, Honolulu, HI, January 1986.
[14]
Smith, M. D., Johnson, M., Horowitz, M. A., "Limits on Multiple Instruction Issue," Proceedings, Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, April 3-6, 1989, pp. 290-302.
[15]
Smith, M. D., Lam, M. S., and Horowitz, M. A., "Boosting Beyond Static Scheduling in a Superscalar Processor," Proceedings, 17th Annual International Symposium on Computer Architecture, Seattle, WA, May 28-31, 1990, pp. 344-353.
[16]
Taub, A. H., editor, "Collected Works of John von Neumann," vol. 5, pp. 34-79, The Macmillan Company, New York, 1963 (excerpt {BuGv46} reproduced in {BeNe71}).
[17]
Tomasulo, R. M., "An Efficient Algorithm for Exploiting Multiple Arithmetic Units," IBM Journal of Research and Development, Vol. 11, 1967, pp. 25-33.

Cited By

View all

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
ISCA '91: Proceedings of the 18th annual international symposium on Computer architecture
April 1991
399 pages
ISBN:0897913949
DOI:10.1145/115952
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 19, Issue 3
    Special Issue: Proceedings of the 18th annual international symposium on Computer architecture (ISCA '91)
    May 1991
    375 pages
    ISSN:0163-5964
    DOI:10.1145/115953
    Issue’s Table of Contents

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 April 1991

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Article

Conference

ISCA91
Sponsor:
ISCA91: 18th International Symposium on Computer Architecture
May 27 - 30, 1991
Ontario, Toronto, Canada

Acceptance Rates

Overall Acceptance Rate 543 of 3,203 submissions, 17%

Upcoming Conference

ISCA '25

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)97
  • Downloads (Last 6 weeks)17
Reflects downloads up to 28 Nov 2024

Other Metrics

Citations

Cited By

View all

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media