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Locality-Aware Process Scheduling for Embedded MPSoCs

Published: 07 March 2005 Publication History

Abstract

Utilizing on-chip caches in embedded multiprocessor-system-on-a-chip (MPSoC) basedsystems is critical from both performance and power perspectives. While most of the prior work that targets at optimizing cache behavior are performed at hardware and compilation levels, operating system (OS) can also play major role as it sees the global access pattern information across applications. This paper proposes a cache-conscious OS process scheduling strategy based on data reuse. The proposed scheduler implements two complementary approaches. First, the processes that do not share any data between them are scheduled at different cores if it is possible to do so. Second, the processes that could not be executed at the same time (due to dependences) but share data among each other are mapped to the same processor core so that they share the cache contents. Our experimental results using this new data locality aware OS scheduling strategy are promising, and show significant improvements in task completion times.

References

[1]
{1} B. N. Bershad, D. Lee, T. H. Romer, J. B. Chen. Avoiding Conflict Misses Dynamically in Large Direct-Mapped Caches. In Proc. the 6th International Conference on Architectural Support for Programming Languages and Operating Systems, 1994.
[2]
{2} S. Carr, K. S. McKinley, and C. Tseng. Compiler optimizations for improving data locality. In Proc. the 6th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, October 1994.
[3]
{3} I. Kadayif, M. Kandemir, I. Kolcu, and G. Chen. Locality-conscious process scheduling in embedded systems. In Proc. 10th Symposium on Hardware-Software Codesign, CO, USA, May 2002.
[4]
{4} M. Kandemir, G. Chen, W. Zhang, and I. Kolcu. Data space oriented scheduling in embedded systems. In Proc. 6th Design Automation and Test in Europe Conference, Munich, Germany, March 2003.
[5]
{5} M. Kharbutli, K. Irwin, Y. Solihin, and J. Lee. Using prime numbers for cache indexing to eliminate conflict misses. In Proc. 10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004.
[6]
{6} C.-G. Lee et al. Analysis of cache related preemption delay in fixed-priority preemptive scheduling. In IEEE Transactions on Computers, 47(6), June 1998.
[7]
{7} Y. Li and W. Wolf. A task-level hierarchical memory model for system synthesis of multiprocessors. In IEEE Transactions on CAD, 18(10), pp. 1405-1417, October 1999.
[8]
{8} G. Rivera and C. Tseng. Data transformations for eliminating conflict misses. In Proc. the ACM SIGPLAN conference on Programming language design and implementation, 1998, Montreal, Quebec, Canada.
[9]
{9} Virtutech Simics: a full system simulator. http://www.virtutech.com/products/simics.html.
[10]
{10} A. Wolfe. Software-based cache partitioning for real-time applications. In Proc. 3rd International Workshop on Responsive Computer Systems, September 1993.

Cited By

View all
  • (2010)Abstraction of RTL IPs into embedded softwareProceedings of the 47th Design Automation Conference10.1145/1837274.1837283(24-29)Online publication date: 13-Jun-2010
  • (2008)Assessing task migration impact on embedded soft real-time streaming multimedia applicationsEURASIP Journal on Embedded Systems10.1155/2008/5189042008(1-15)Online publication date: 15-Jan-2008
  • (2007)A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCsProceedings of the 20th annual conference on Integrated circuits and systems design10.1145/1284480.1284557(282-287)Online publication date: 3-Sep-2007
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cover image ACM Conferences
DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
March 2005
630 pages
ISBN:0769522882

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IEEE Computer Society

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Published: 07 March 2005

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View all
  • (2010)Abstraction of RTL IPs into embedded softwareProceedings of the 47th Design Automation Conference10.1145/1837274.1837283(24-29)Online publication date: 13-Jun-2010
  • (2008)Assessing task migration impact on embedded soft real-time streaming multimedia applicationsEURASIP Journal on Embedded Systems10.1155/2008/5189042008(1-15)Online publication date: 15-Jan-2008
  • (2007)A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCsProceedings of the 20th annual conference on Integrated circuits and systems design10.1145/1284480.1284557(282-287)Online publication date: 3-Sep-2007
  • (2006)Supporting task migration in multi-processor systems-on-chipProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131488(15-20)Online publication date: 6-Mar-2006

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