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Using write caches to improve performance of cache coherence protocols in shared-memory multiprocessors

Authors:

Fredrik Dahlgren,

Per StenströmAuthors Info & Claims

Journal of Parallel and Distributed Computing, Volume 26, Issue 2

Pages 193 - 210

https://doi.org/10.1006/jpdc.1995.1059

Published: 15 April 1995 Publication History

Abstract

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Cain HLipasti MBlack AD'Hondt TKimelman DRinard MUngar D(2012)Edge chasing delayed consistencyProceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability10.1145/2414729.2414733(15-24)Online publication date: 21-Oct-2012
https://dl.acm.org/doi/10.1145/2414729.2414733
He XZhang M(Ken) Yang Q(2004)STICSJournal of Parallel and Distributed Computing10.1016/j.jpdc.2004.05.00564:9(1069-1085)Online publication date: 1-Sep-2004
https://dl.acm.org/doi/10.1016/j.jpdc.2004.05.005
Dahlgren FDubois MStenström P(1998)Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory MultiprocessorsIEEE Transactions on Computers10.1109/12.72978547:10(1041-1055)Online publication date: 1-Oct-1998
https://dl.acm.org/doi/10.1109/12.729785
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Using write caches to improve performance of cache coherence protocols in shared-memory multiprocessors

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Cache memory design and performance issues in shared-memory multiprocessors
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In this paper, we propose a novel on-chip L2 cache organization for chip multiprocessors (CMPs) with private L2 caches. The proposed approach, called reusability-aware cache sharing (RACS), combines the advantages of both a private L2 cache and a shared ...
Design and Analysis of Update-Based Cache Coherence Protocols for Scalable Shared-Memory Multiprocessors

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Published In

cover image Journal of Parallel and Distributed Computing

Journal of Parallel and Distributed Computing Volume 26, Issue 2

April 15, 1995

133 pages

ISSN:0743-7315

Editors:
Allan Gottlieb
New York Univ., New York, NY
,
Kai Hwang
Univ. of Southern California, Los Angeles
,
Sartaj Sahni
Univ. of Florida, Gainesville

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Academic Press, Inc.

United States

Publication History

Published: 15 April 1995

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Cain HLipasti MBlack AD'Hondt TKimelman DRinard MUngar D(2012)Edge chasing delayed consistencyProceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability10.1145/2414729.2414733(15-24)Online publication date: 21-Oct-2012
https://dl.acm.org/doi/10.1145/2414729.2414733
He XZhang M(Ken) Yang Q(2004)STICSJournal of Parallel and Distributed Computing10.1016/j.jpdc.2004.05.00564:9(1069-1085)Online publication date: 1-Sep-2004
https://dl.acm.org/doi/10.1016/j.jpdc.2004.05.005
Dahlgren FDubois MStenström P(1998)Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory MultiprocessorsIEEE Transactions on Computers10.1109/12.72978547:10(1041-1055)Online publication date: 1-Oct-1998
https://dl.acm.org/doi/10.1109/12.729785
Kim JVaidya NWallach SZima H(1997)Adaptive migratory scheme for distributed shared memoryProceedings of the 11th international conference on Supercomputing10.1145/263580.263659(325-332)Online publication date: 11-Jul-1997
https://dl.acm.org/doi/10.1145/263580.263659
Stenström PBrorsson MDahlgren FGrahn HDubois M(1997)Boosting the Performance of Shared Memory MultiprocessorsComputer10.1109/2.59663030:7(63-70)Online publication date: 1-Jul-1997
https://dl.acm.org/doi/10.1109/2.596630
Pong FDubois M(1996)Formal Verification of Delayed Consistency ProtocolsProceedings of the 10th International Parallel Processing Symposium10.5555/645606.661039(124-131)Online publication date: 15-Apr-1996
https://dl.acm.org/doi/10.5555/645606.661039
Raynaud AZhang ZTorrellas J(1996)Distance-Adaptive Update Protocols for Scalable Shared-Memory MultiprocessorsProceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture10.5555/525424.822638Online publication date: 3-Feb-1996
https://dl.acm.org/doi/10.5555/525424.822638
Kim JVaidya NYew P(1996)A cost-comparison approach for adaptive distributed shared memoryProceedings of the 10th international conference on Supercomputing10.1145/237578.237584(44-51)Online publication date: 1-Jan-1996
https://dl.acm.org/doi/10.1145/237578.237584
Skeppstedt JStenström PBic LEvripidou PBöhm WGaudiot J(1995)A compiler algorithm that reduces read latency in ownership-based cache coherence protocolsProceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques10.5555/224659.224690(69-78)Online publication date: 27-Jun-1995
https://dl.acm.org/doi/10.5555/224659.224690
Dahlgren F(1995)Boosting the performance of hybrid snooping cache protocolsACM SIGARCH Computer Architecture News10.1145/225830.22399823:2(60-69)Online publication date: 1-May-1995
https://dl.acm.org/doi/10.1145/225830.223998
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Cache memory design and performance issues in shared-memory multiprocessors

Reusability-aware cache memory sharing for chip multiprocessors with private L2 caches

Design and Analysis of Update-Based Cache Coherence Protocols for Scalable Shared-Memory Multiprocessors

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