research-article

An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture

Authors:

Farhat Thabet,

Yves Lhuillier,

Caaliph Andriamisaina,

Jean-Marc Philippe,

Raphaël DavidAuthors Info & Claims

DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

Pages 531 - 534

Published: 18 March 2013 Publication History

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Abstract

The current trend in embedded computing consists in increasing the number of processing resources on a chip. Following this paradigm, the STMicroelectronics/CEA Platform 2012 (P2012) project designed an area- and power-efficient many-core accelerator as an answer to the needs of computing power of next-generation data-intensive embedded applications. Synchronization handling on this architecture was critical since speed-ups of parallel implementations of embedded applications strongly depend on the ability to exploit the largest possible number of cores while limiting task management overhead. This paper presents the HardWare Synchronizer (HWS), a flexible hardware accelerator for synchronization operations in the P2012 architecture. Experiments on a multi-core test chip showed that the HWS has less than 1% area overhead while reducing synchronization latencies (up to 2.8 times) and contentions.

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Cited By

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Bechara CChehida KThabet F(2015)Towards an Automatic Co-generator for Manycores Architecture and RuntimeProcedia Computer Science10.1016/j.procs.2015.05.43951:C(2809-2813)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1016/j.procs.2015.05.439
Lhuillier YOjail MGuerre APhilippe JChehida KThabet FAndriamisaina CJaber CDavid R(2014)HARSACM Transactions on Embedded Computing Systems10.1145/251731113:3s(1-25)Online publication date: 28-Mar-2014
https://dl.acm.org/doi/10.1145/2517311
Ojail MDavid RLhuillier YGuerre AMacii E(2013)ARTMProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485646(1510-1515)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485646

Index Terms

An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture

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Information & Contributors

Information

Published In

DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

March 2013

1944 pages

ISBN:9781450321532

General Chair:
Enrico Macii
Politecnico di Torino, IT

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 18 March 2013

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DATE 13

Sponsor:

EDAA
EDAC
SIGDA
The Russian Academy of Sciences

DATE 13: Design, Automation and Test in Europe

March 18 - 22, 2013

Grenoble, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

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Bechara CChehida KThabet F(2015)Towards an Automatic Co-generator for Manycores Architecture and RuntimeProcedia Computer Science10.1016/j.procs.2015.05.43951:C(2809-2813)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1016/j.procs.2015.05.439
Lhuillier YOjail MGuerre APhilippe JChehida KThabet FAndriamisaina CJaber CDavid R(2014)HARSACM Transactions on Embedded Computing Systems10.1145/251731113:3s(1-25)Online publication date: 28-Mar-2014
https://dl.acm.org/doi/10.1145/2517311
Ojail MDavid RLhuillier YGuerre AMacii E(2013)ARTMProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485646(1510-1515)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485646

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Index Terms

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