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Reviewer: Radu State

For most of us, routers and switches are just small boxes that have some small diodes on the front, and one to several network ports on the back. For those that attend a networking class, the functionality of these devices will become familiar, while still maintaining a certain veil over the underlying technology, computing paradigms, and specific development constraints related to their manufacturing. The high-speed networking environment of today requires network appliances to work at wire speed, while still severely limiting the underlying system resources: available flash memory, power consumption, and processor power. The interested reader might find relevant background material in the conference proceedings of some major events from the Association for Computing Machinery (ACM) Special Interest Group on Data Communications (SIGCOMM) and the Institute of Electrical and Electronics Engineers (IEEE) InfoCom, but important individual investigation and research is required. This book fills an important gap in existing computer science literature, and addresses exactly these items. It contains an extremely valuable overview on all-important ideas and results related to the system design of routers, switches, and packet processing network appliances (for example, firewalls). The book is structured into two main logical parts. The first part is dedicated to the algorithms and data structures needed for fast Internet protocol (IP) layer packet processing. The best illustration for this is the per packet address lookup that is completed by a router, where fast data lookup algorithms coupled with compact data representations are essential. Research in the past years addressed this topic, and this book does an outstanding job in reviewing the relevant previous work, and describing in a comprehensive way the major approaches. The second part of the book addresses the major architectural patterns for designing efficient switches. In this part, which outweighs by a factor of three the first part, the reader is introduced to the conceptual models for switches—the addressed scope is huge, and ranges from dated models up to the most recent ones, which are the core building blocks of modern high-performance network backbones. The work of the two authors is impressive: the presentation is complete, and the illustrations and comments make the reading easy. The only negative point is that sometimes the authors should have included more mathematical material, and addressed the associated proofs for some of the key results. The target audience of this book remains a niche one: engineers working in this domain and advanced graduate students in computer science. For this category of readers, this book is necessary; the overall reading experience is highly rewarding. The book can also serve as a course book for an advanced class in computer networks. Unique in its approach and scope, and written in an easy-to-follow manner, I strongly recommend it to the interested reading community. Online Computing Reviews Service

Reviewer: Charles Kenneth Davis

Internet traffic is growing dramatically. This is due to the increasing load of voice, audio, video, TV, and gaming that is transmitted using the robust and reliable Internet protocol (IP). The range of rapidly growing Internet-based services (including wireless applications) is becoming ubiquitous. All of this will translate into increasingly higher volumes of Internet traffic. This book is targeted at advanced students in electrical engineering, computer engineering, or computer science. The book is a readable, and mostly clear, presentation of complex, highly technical subject matter. It discusses the design and operation of the next generation of packet processing network switches and routers. For those with a technical understanding of networking, and an interest in the state of the art in routing and switching, this is a must-read book. The text is dense with technically sophisticated, conceptual material, and is supplemented with numerous diagrams and figures. It is a fascinating and informative read for those with a technical background. This book begins with a general discussion of present and future IP network architectures and IP address handling. Next comes a review of packet traffic management, and of the basics of traffic management. The following ten chapters are on various types of packet switch designs for network switches. Each of these chapters explains the organization, architecture, and switching logic of a key family of switches (including shared-memory switches, input-buffered switches, banyan-based switches, knockout-based switches, the abacus switch, crosspoint buffered switches, Clos-network switches, multiplane multistage buffered switches, load-balanced switches, and optical packet switches). These chapters provide a rich overview of approaches to network switching. The final chapter discusses high-speed router chip sets, focusing on traffic management chips and switching fabric chips. A principle theme throughout the book is sustaining quality of service (QoS) in network performance as a part of switch design. In recent decades, there has been a build-out of optical fiber transmission facilities, leaving that part of IP networks with virtually unlimited, mostly untapped capacity. Simultaneously, the demand for Internet services has surged, which has increased network traffic loads dramatically. Thus, the critical issues for the next generation of networking must be to develop and deploy a fabric of new switches that can handle this growing workload with acceptable QoS, and to begin to realize the potential of the transmission speeds inherent with fiber optics. Given the prescribed agenda, this book is a welcome treatment of key conceptual and design approaches to network packet switching, especially in a time when developing faster, more advanced switching capabilities for the Internet is increasingly of paramount importance. Online Computing Reviews Service