Article

Free access

A new built-in self-test approach for digital-to-analog and analog-to-digital converters

Authors:

Karim Arabi,

Bozena Kaminska,

Janusz RzeszutAuthors Info & Claims

ICCAD '94: Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design

Pages 491 - 494

Published: 06 November 1994 Publication History

PDF eReader

Abstract

This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters. Offset, gain, linearity and differential linearity errors are tested without using test equipment. The proposed BIST structure decreases the test cost and test time. The BIST circuitry has been designed to D/A and A/D converters using CMOS 1.2 μm technology. By only a minor modification the test structure would be able to localize the fail situation. The small value of area overhead (AOH), the simplicity and efficiency of the proposed BIST architecture seem to be promising for manufacturing.

References

[1]

B.G.Heriques and J.E.Francu, "High-Speed D/A Conversion with Linear Phase Sinx/x Compensation," ISCAS 1993, Vol. 2, pp. 1204-1207.

Google Scholar

[2]

S.Max, "Fast, Accurate and Complete ADC Testing," Proc. IEEE ITC 1989, pp. 598-640.

Google Scholar

[3]

L.Milor et al., "Optimal Test Set Design for Analog Circuits," Proc. IEEE ICCAD 1990, pp. 294-297.

Google Scholar

[4]

J.R.Naylor, "Testing Digital/Analog and Analog/ Digital Converters" IEEE Trans. on Circuits and Systems, Vol. CAS-25, No. 7. Jul. 1978, pp. 526-538.

Google Scholar

[5]

M.Slamani and B.Kaminska, "Analog Circuit Fault Diagnosis Based on Sensitivity Computation and Functional testing," IEEE Design&Test of Computers, Mar. 1992, pp. 30-39.

Digital Library

Google Scholar

[6]

M.Soma, "A Design-for-Test Methodology for Active Analog Filters," Proc. IEEE ITC 1990, pp. 183-192.

Google Scholar

[7]

D.K.Su and B.A.Wooley, "A CMOS Oversampling D/A Converter with a Current-Mode Semidigital Reconstruction Filter," IEEE J. of Solid-State Circuits, Vol. 28, No. 12, Dec. 1993, pp. 1224-1233.

Crossref

Google Scholar

[8]

K.D.Wagner and T.W.Wiliams, "Design for Testability of Mixed Signal Integrated Circuits," Proc. IEEE ITC 1988, pp. 823-829.

Google Scholar

Cited By

View all

Zjajo AAsian Mde Gyvez JLauwereins RMadsen J(2007)Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuitsProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266650(1301-1306)Online publication date: 16-Apr-2007
https://dl.acm.org/doi/10.5555/1266366.1266650
Kerzerho VCauvet PBernard SAzais FComte MRenovell M(2006)A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPsIEEE Design & Test10.1109/MDT.2006.5923:3(234-243)Online publication date: 1-May-2006
https://dl.acm.org/doi/10.1109/MDT.2006.59
Chun JYu HAbraham JGarrett DLach JZukowski C(2004)An efficient linearity test for on-chip high speed ADC and DAC using loop-backProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989031(328-331)Online publication date: 26-Apr-2004
https://dl.acm.org/doi/10.1145/988952.989031
Show More Cited By

Index Terms

A new built-in self-test approach for digital-to-analog and analog-to-digital converters
1. Applied computing
  1. Physical sciences and engineering
2. Hardware
  1. Hardware test
    1. Design for testability
      1. Built-in self-test

Recommendations

A new digital test approach for analog-to-digital converter testing
VTS '96: Proceedings of the 14th IEEE VLSI Test Symposium

A fully digital built-in self-test (BIST) for analog-to-digital converters is presented in this paper. This test circuit is capable of measuring the DNL, INL, offset error and gain error, and mainly consists of several registers and some digital ...
An Embedded Built-in-Self-Test Approach for Digital-to-Analog Converters
ATS '01: Proceedings of the 10th Asian Test Symposium

Without a large number of precision reference voltages and with the consideration of matching problems, a built-in-self-test approach is proposed to test the parameters of digital-to-analog converter (DAC), which includes offset error (VOSE,gain error (...
Efficient and accurate testing of analog-to-digital converters using oscillation-test method
EDTC '97: Proceedings of the 1997 European conference on Design and Test

This paper describes a practical test approach for analog-to-digital converters (ADCs) based on the oscillation-test strategy. The oscillation-test is applied to convert the ADC under test to an oscillator. The oscillation frequencies are able to ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

ICCAD '94: Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design

November 1994

771 pages

ISBN:0897916905

Chairmen:
Jochen A. G. Jess
Eindhoven Univ. of Technology, Eindhoven, The Netherlands
,
Richard Rudell
Synopsys, Inc., Mountain View, CA

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 06 November 1994

Check for updates

Qualifiers

Article

Conference

ICCAD '94

Sponsor:

SIGDA
IEEE-CS

ICCAD '94: International Conference on Computer Aided Design

November 6 - 10, 1994

California, San Jose, USA

Acceptance Rates

Overall Acceptance Rate 457 of 1,762 submissions, 26%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

13
Total Citations
View Citations
377
Total Downloads

Downloads (Last 12 months)11
Downloads (Last 6 weeks)0

Reflects downloads up to 28 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Zjajo AAsian Mde Gyvez JLauwereins RMadsen J(2007)Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuitsProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266650(1301-1306)Online publication date: 16-Apr-2007
https://dl.acm.org/doi/10.5555/1266366.1266650
Kerzerho VCauvet PBernard SAzais FComte MRenovell M(2006)A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPsIEEE Design & Test10.1109/MDT.2006.5923:3(234-243)Online publication date: 1-May-2006
https://dl.acm.org/doi/10.1109/MDT.2006.59
Chun JYu HAbraham JGarrett DLach JZukowski C(2004)An efficient linearity test for on-chip high speed ADC and DAC using loop-backProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989031(328-331)Online publication date: 26-Apr-2004
https://dl.acm.org/doi/10.1145/988952.989031
Ong CCheng KWang LYasuura H(2003)Delta-sigma modulator based mixed-signal BIST architecture for SoCProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119922(669-674)Online publication date: 21-Jan-2003
https://dl.acm.org/doi/10.1145/1119772.1119922
Peralías ERueda AHuertas J(2001)New BIST Schemes for Structural Testing of Pipelined Analog to Digital ConvertersJournal of Electronic Testing: Theory and Applications10.1023/A:101274701783817:5(373-383)Online publication date: 1-Oct-2001
https://dl.acm.org/doi/10.1023/A%3A1012747017838
Huang JOng CCheng KBolsens I(2000)A BIST scheme for on-chip ADC and DAC testingProceedings of the conference on Design, automation and test in Europe10.1145/343647.343762(216-220)Online publication date: 1-Jan-2000
https://dl.acm.org/doi/10.1145/343647.343762
Variyam PChatterjee A(2000)Digital-Compatible BIST for Analog Circuits Using Transient Response SamplingIEEE Design & Test10.1109/54.86790117:3(106-115)Online publication date: 1-Jul-2000
https://dl.acm.org/doi/10.1109/54.867901
Peralías ERueda APrieto JHuertas J(1998)DfT and on-line test of high-performance data convertersProceedings of the 1998 IEEE International Test Conference10.5555/648020.745941Online publication date: 18-Oct-1998
https://dl.acm.org/doi/10.5555/648020.745941
Sunter SNagi N(1997)A Simplified Polynomial-Fitting Algorithm for DAC and ADC BISTProceedings of the 1997 IEEE International Test Conference10.5555/844384.845868Online publication date: 1-Nov-1997
https://dl.acm.org/doi/10.5555/844384.845868
de Vries RZwemstra TBruls ERegtien P(1997)Built-in self-test methodology for A/D convertersProceedings of the 1997 European conference on Design and Test10.5555/787260.787689Online publication date: 17-Mar-1997
https://dl.acm.org/doi/10.5555/787260.787689
Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

A new digital test approach for analog-to-digital converter testing

An Embedded Built-in-Self-Test Approach for Digital-to-Analog Converters

Efficient and accurate testing of analog-to-digital converters using oscillation-test method