research-article

Early evaluation of IBM BlueGene/P

Authors:

W. YuAuthors Info & Claims

SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing

Article No.: 23, Pages 1 - 12

Published: 15 November 2008 Publication History

Abstract

BlueGene/P (BG/P) is the second generation BlueGene architecture from IBM, succeeding BlueGene/L (BG/L). BG/P is a system-on-a-chip (SoC) design that uses four PowerPC 450 cores operating at 850 MHz with a double precision, dual pipe floating point unit per core. These chips are connected with multiple interconnection networks including a 3-D torus, a global collective network, and a global barrier network. The design is intended to provide a highly scalable, physically dense system with relatively low power requirements per flop. In this paper, we report on our examination of BG/P, presented in the context of a set of important scientific applications, and as compared to other major large scale supercomputers in use today. Our investigation confirms that BG/P has good scalability with an expected lower performance per processor when compared to the Cray XT4's Opteron. We also find that BG/P uses very low power per floating point operation for certain kernels, yet it has less of a power advantage when considering science-driven metrics for mission applications.

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Rajovic NRico AMantovani FRuiz DVilarrubi JGomez CBackes LNieto DServat HMartorell XLabarta JAyguade EAdeniyi-Jones CDerradji SGloaguen HLanucara PSanna NMehaut JPouget KVideau BBoyer EAllalen MAuweter ABrayford DTafani DWeinberg VBrömmel DHalver RMeinke JBeivide RBenito MVallejo EValero MRamirez AWest J(2016)The mont-blanc prototypeProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.5555/3014904.3014955(1-12)Online publication date: 13-Nov-2016
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Early evaluation of IBM BlueGene/P

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Information & Contributors

Information

Published In

cover image ACM Conferences

SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing

November 2008

739 pages

ISBN:9781424428359

Conference Chair:
Patricia Teller

Sponsors

SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE-CS: Computer Society

Publisher

IEEE Press

Publication History

Published: 15 November 2008

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Research-article

Funding Sources

U.S. Department of Energy

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SC '08

Sponsor:

SIGARCH
IEEE-CS

SC '08: International Conference for High Performance Computing, Networking, Storage and Analysis

November 15 - 21, 2008

Texas, Austin

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SC '08 Paper Acceptance Rate 59 of 277 submissions, 21%;

Overall Acceptance Rate 1,516 of 6,373 submissions, 24%

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Cited By

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https://dl.acm.org/doi/10.5555/3014904.3014955
Smith CGranzow BIbanez DSahni OJansen KShephard MGaither K(2016)In-memory Integration of Existing Software Components for Parallel Adaptive Unstructured Mesh WorkflowsProceedings of the XSEDE16 Conference on Diversity, Big Data, and Science at Scale10.1145/2949550.2949650(1-6)Online publication date: 17-Jul-2016
https://dl.acm.org/doi/10.1145/2949550.2949650
Navaridas JLuján MPlana LTemple SFurber STrancoso PFranklin DMcKee S(2014)On generating multicast routes for SpiNNakerProceedings of the 11th ACM Conference on Computing Frontiers10.1145/2597917.2597938(1-10)Online publication date: 20-May-2014
https://dl.acm.org/doi/10.1145/2597917.2597938
Stark DBarrett RGrant ROlivier SPedretti KVaughan C(2014)Early experiences co-scheduling work and communication tasks for hybrid MPI+X applicationsProceedings of the 2014 Workshop on Exascale MPI10.1109/ExaMPI.2014.6(9-19)Online publication date: 16-Nov-2014
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Silva GCorrea JBentes CGuedes SGabioux M(2014)The Experience in Designing and Evaluating the High Performance Cluster NetunoInternational Journal of Parallel Programming10.1007/s10766-012-0224-742:2(265-286)Online publication date: 1-Apr-2014
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