research-article

CacheCompress: a novel approach for test data compression with cache for IP embedded cores

Authors:

Hao Fang,

Chenguang Tong,

Bo Yao,

Xiaodi Song,

Xu ChengAuthors Info & Claims

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

Pages 509 - 512

Published: 05 November 2007 Publication History

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Abstract

In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending on the number of specified bits, a test data word is either encoded in a single code word or as a lookup in the dictionary. Explicit dictionary initialization is not required since the content of the dictionary is updated during testing. The dictionary itself only contains the most recently used patterns, thus it exhibits a behaviour similar to a cache. Experiments show that our technique achieves higher compression ratio than other recent compression schemes while the dictionary size has been dramatically reduced.

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Cited By

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Vishnoi APanda PBalakrishnan MBenini LDe Micheli GAl-Hashimi BMueller W(2009)Cache aware compression for processor debug supportProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874670(208-213)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874670
Vishnoi APanda PBalakrishnan M(2009)Online cache state dumping for processor debugProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630007(358-363)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630007

CacheCompress: a novel approach for test data compression with cache for IP embedded cores
1. Information systems
  1. Data management systems
    1. Data structures
      1. Data layout
2. Mathematics of computing
  1. Information theory

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Published In

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

November 2007

933 pages

ISBN:1424413826

General Chair:
Georges Gielen
ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium

Publisher

IEEE Press

Publication History

Published: 05 November 2007

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Research-article

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ICCAD07

Sponsor:

CEDA
SIGDA
IEEE-CS\DATC

ICCAD07: The International Conference on Computer-Aided Design 2007

November 5 - 8, 2007

California, San Jose

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ICCAD '07 Paper Acceptance Rate 139 of 510 submissions, 27%;

Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Vishnoi APanda PBalakrishnan MBenini LDe Micheli GAl-Hashimi BMueller W(2009)Cache aware compression for processor debug supportProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874670(208-213)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874670
Vishnoi APanda PBalakrishnan M(2009)Online cache state dumping for processor debugProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630007(358-363)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630007

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