We present a review on stencil lithography and focus on the particular interest and challenges when applying it to the scalable fabrication of nm-size devices. We first describe the basic technique with its main advantages and challenges. Then we review ...

The challenging fabrication of sub-100-nm structures with high aspect ratio by UV-nanoimprint lithography (NIL) is addressed in this work. Thermal shrinkage is induced by cooling the structures below room temperature to avoid the issues commonly arising ...

Benzene, toluene, p-xylene, m-xylene and o-xylene are harmful to human body seriously, moreover, p-xylene, m-xylene and o-xylene are isomers, which are difficult to distinguish by commonly used spectrum analysis techniques, such as mass spectrometry. In ...

Toxic Volatile Organic Compound (VOC) pollutants have seriously affected public health. FAIMS is a quick and high sensitive gas-phase ion detection technique. In this paper, a FAIMS system has been built and various VOCs detections are performed to ...

We demonstrate the feasibility of fabrication method combining classic and stencil lithography for producing simple organic rectifying circuits for use in radio frequency range. Two stencil lithography steps are crucial because pentacene, once deposited ...

Graphical abstractDisplay Omitted Highlights A novel technological approach combining IJP and micro-transfer moulding is studied. Heterogeneous material pattern transfer is achieved in a two step process. The proposed process is optimized and ...

Graphical abstractDisplay Omitted Highlights The negative photoresist Epocore is doped by three commercially-available with the purpose to obtain a selective absorbance filters. The structures of dye-doped Epocore are fabricated by a standard ...

Graphical abstractDisplay Omitted Highlights The first results of tensile stress tests of thin film Au wires on a PI substrate. The test structures were fabricated by stencil lithography using SiN stencils. Within the limit of elastic deformation, the ...

Graphical abstractDisplay Omitted Highlights Titania sol-gel films up to 1µm micro- and nano- imprinted at low pressure (<40MPa). Imprinted structures transformed in inorganic TiO2 (TiO2>90%w/w) by UV curing. High refractive index of the structures up ...

Graphical abstractDisplay Omitted Highlights Stencils are used to fabricate pentacene thin film transistors on polyimide. Transistors are stretched to maximum 2.6% strain up to 28,000 times. Results reveal that first stretching cycle affects the ...

Graphical abstractDisplay Omitted Highlights Gate-all-around vertically-stacked polySiNW FETs with gate lengths down to 100nm. ION/IOFF ratio up to 10 4 , subthreshold swings (SS) up to 300 mV/dec. Excellent step coverage on either finFETs and ...

We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nanostencil is used to form ...

This paper describes the fabrication of sub micrometer silicon oxycarbide (SiCO) ceramic structures. The method consists in replicating silicon micro/nanostructures in polydimethylsiloxane (PDMS), followed by a micro/nano molding of liquid polymer ...

In this paper a nano-molding process using a nature-created master is demonstrated. The eye of night moth Agotis exclamationis having 100nm-scale structures on a curved surface is used as biomimetic master mold from which nanostructures are replicated ...

A method is presented that allows the definition of micrometer- and submicrometer-sized implanted structures in silicon without using photoresist patterning. The process is based on the use of stencils as masks in a conventional ion implanter, and is ...

In this work a high-k double-gate pentacene field-effect transistor architecture is presented. The devices are fabricated on a flexible polyimide substrate by three aligned levels of stencil lithography combined with standard photolithography. ALD-...

We report on a fully CMOS compatible fabrication method for ambipolar silicon nanowire FinFETs. The low thermal budget processing, compatible with monolithic 3D device integration, makes use of low pressure chemical vapor deposition (LPCVD) of amorphous ...

The advent of cell phone cameras extensively pushed market needs for micro lenses and supported developments like the Wafer-Level-Camera Technology [1]. Different optical applications and patterning methods for micro lenses require different sets of ...

Stencil lithography (SL) is a shadow mask technique which allows parallel, resistless, micro- and nano-patterning of material through apertures created in a membrane (stencil) onto a substrate. The stencils are usually made of LPCVD low-stress SiN due ...