POWER-CONSUMPTION-ORIENTED CHECKABILITY FOR FPGA-BASED COMPONENTS OF SAFETY-RELATED SYSTEMS
DOI:
https://doi.org/10.47839/ijc.18.2.1410Keywords:
safety-related system, logical checkability, hidden fault, common signal, FPGA, power checkability.Abstract
This paper is dedicated to the problem of the circuit checkability of components in the safety-related systems, which operate objects of the increased risk and are aimed at ensuring safety of both a system and a control object for accident prevention and a decrease in their consequences. Importance of the checkability of the circuits for ensuring safety in critical applications is emphasized as safety is based on the use of fault tolerant circuitry decisions and their efficiency is defined by the circuit checkability. Development of a logical checkability from testability to structurally functional and dual-mode model which formalizes a problem of the hidden faults and defines ways of its solution is shown. The limitation of a logical checkability in detection of faults in chains of the common signals and the need for development of checkability out of the limits of a logical form, including suitability to checking the circuits on the basis of their power consumption is considered. Power-consumption-oriented checkability (Power-checkability) allowing detection of faults in chains of the common signals is defined. Its analytical assessment for the circuits implemented in FPGA is offered. Experiments providing estimation of power-checkability for FPGA-implementation of iterative array multipliers with various activities of input signals are carried out.References
IEC 61508:2010, “Functional Safety of Electrical / Electronic / Programmable Electronic Safety-related Systems,” 2010.
Core Knowledge on Instrumentation and Control Systems in Nuclear Power Plants, Technical Reports, IAEA Nuclear energy series no. NP-T-3.12, International Atomic Energy Agency, Vienna, 2011, 141 p. [Online]. Available: https://www-pub.iaea.org/MTCD/Publications/PDF/Pub1495_web.pdf
R.E. Hiromoto, A. Sachenko, V. Kochan, V. Koval, V. Turchenko, O. Roshchupkin, V. Yatskiv, K. Kovalok, “Mobile ad hoc wireless network for pre- and post-emergency situations in nuclear power plant,” Proceedings of the 2nd IEEE International Symposium on Wireless Systems within the Conferences on Intelligent Data Acquisition and Advanced Computing Systems, Offenburg, Germany, 2014, pp. 92–96.
A.V. Palagin, and V.N. Opanasenko, “Design and application of the PLD-based reconfigurable devices,” in book: Design of Digital Systems and Devices, Lecture Notes in Electrical Engineering, M. Adamski, A. Barkalov, M. Wegrzyn (Eds.), Springer, Verlag Berlin Heidelberg, vol. 79, pp. 59–91, 2011. DOI: https://doi.org/10.1007/978-3-642-17545-9_3.
R. Kochan, K. Lee, V. Kochan, A. Sachenko, “Development of a dynamically reprogrammable NCAP,” Proceedings of the IMTC 2004 – Instrumentation and Measurement Technology Conference, Como, Italy, 2004, pp. 1188–1193.
V.V. Sklyar, V.S. Kharchenko, “Fault-tolerant computer-aided control systems with multiversion threshold adaptation: Adaptation methods, reliability estimation, and choice of an architecture,” Automation and Remote Control, vol. 63, no. 6, pp. 991–1003, 2002. DOI: https://doi.org/10.1023/A:1016130108770.
R. Seinauskas, R. Cvirka, G. Rudzioniene, “Acceleration of fault simulation based on a separate list of faults for each test pattern,” Elektronika ir Elektrotechnika, vol. 21, no. 3, pp. 62–65, 2015. DOI: http://dx.doi.org/10.5755/j01.eee.21.3.5774
F. Sellers, M. Hsiao and L. Beamson, Error Detecting Logic for Digital Computers, New-York: Mc GRAW-HILL, 1968.
V. Hahanov, E. Litvinova, V. Obrizan, W. Gharibi, “Embedded method of SoC diagnosis,” Elektronika ir Elektrotechnika, vol. 88, no. 8, pp. 3–8, 2008.
M. Nicolaidis, Y. Zorian, “On-line testing for VLSI – a compendium of approaches,” Journal of Electronic Testing: Theory and Applications – Special Issue on On-line testing, vol. 12, pp. 7–20, 1998. DOI: 10.1023/A:1008244815697.
M. Abramovichi, C. Stroud, C. Hamiliton, S. Wijesuriya, V. Verma, “Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications,” Proceedings of the IEEE International Test Conference, 1999, pp. 973–982. DOI: 10.1109/TEST.1999.805830.
ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating-Point Arithmetic, 1985.
IEEE Std 754™-2008 (Revision of IEEE Std 754-1985) IEEE Standard for Floating-Point Arithmetic, USA, 2008.
H. Park, Truncated Multiplications and Divisions for the Negative Two's Complement Number System, Ph.D. Dissertation, The University of Texas at Austin, Austin, USA, 2007.
V. Garofalo, Truncated Binary Multipliers with Minimum Mean Square Error: Analytical Characterization, Circuit Implementation and Applications, Ph.D. Dissertation, University of Studies of Naples “Federico II”, Naples, Italy, 2008.
V. Hema, M. Ganaga Durga, “Data integrity checking based on residue number system and chinese remainder theorem in cloud,” International Journal of Innovative Research in Science, Engineering and Technology, vol. 3, special issue 3, pp. 2584-2588, 2014.
A. Drozd, M. Lobachev, W. Hassonah, “Hardware check of arithmetic devices with abridged execution of operations,” Proceedings of the European Design and Test Conference, Paris, France, 1996, pp. 611, 1996. DOI: 10.1109/EDTC.1996.494375.
D. Efanov, V. Sapozhnikov, Vl. Sapozhnikov, “Applications of modular summation codes to concurrent error detection systems for combinational Boolean circuits,” Automation and Remote Control, vol. 76, issue 10, pp. 1834–1848, 2015. DOI: 10.1134/S0005117915100112.
V.A. Romankevich, “Self-testing of multiprocessor systems with regular diagnostic connections,” Automation and Remote Control, vol. 78, issue 2, pp. 289–299, 2017. DOI: 10.1134/S0005117917020084
M. Drozd, A. Drozd, “Safety-related instrumentation and control systems and a problem of the hidden faults,” Proceedings of the 10th International Conference on Digital Technologies 2014, Zhilina, Slovak Republic, pp. 137–140, 2014. DOI: 10.1109/DT.2014.6868692
D. Gillis, “The Apocalypses that Might Have Been,” [Online]. Available: https://www.damninteresting.com/the-apocalypses-that-might-have-been/
Department of Energy, DOE Guideline Root Cause Analysis Guidance Document, Office of Nuclear Energy and Office of Nuclear Safety Policy and Standards, Department of Energy, Washington DC, USA, 1992. http://tis.eh.doe.gov/techstds/standard/nst1004/nst1004.pdf
J. Jung, I. Ahmed, “Development of field programmable gate array-based reactor trip functions using systems engineering approach,” Nuclear Engineering and Technology, March 2016, pp. 2–11. DOI: 10.1016/j.net.2016.02.011.
C. Metra, M. Favalli, B. Ricco, “Concurrent checking of clock signal correctness,” Proceedings of the IEEE Design & Test, vol. 15, issue 4, pp. 42–48, 1998. DOI: 10.1109/54.735926.
Intel Quartus Prime Standard Edition User Guide: Getting Started, [Online]. Available: https://www.intel.com/content/www/us/en/programmable/documentation/yoq1529444104707.html
Intel Quartus Prime Standard Edition User Guide: Power Analysis and Optimization, [Online]. Available: https://www.intel.com/content/www/us/en/programmable/documentation/xhv1529966780595.html
Xilinx ISE Design Suite, [Online]. Available: https://www.xilinx.com/products/design-tools/ise-design-suite.html
List of FPGA Companies, [Online]. Available: http://hardwarebee.com/list-fpga-companies/
MAX 10 FPGA Device Architecture, [Online]. Available: https://www.intel.com/content/www/us/en/programmable/documentation /sss1397439908414.html
Intel FPGA Integer Arithmetic IP Cores User Guide, [Online]. Available: https://www.intel.com/content/www/us/en/programmable/documentation/sam1395330298052.html
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