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Versal: The Xilinx Adaptive Compute Acceleration Platform (ACAP)

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Kees VissersAuthors Info & Claims

FPGA '19: Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Page 83

https://doi.org/10.1145/3289602.3294007

Published: 20 February 2019 Publication History

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Abstract

In this presentation I will present the new Adaptive Compute Acceleration Platform. I will show the overall system architecture of the family of devices including the Arm cores (scalar engines), the programmable logic (Adaptable Engines) and the new vector processor cores (AI engines). I will focus on the new AI engines in more detail and show the architecture, the integration in the total device, the programming environment and some applications, including Machine Learning and 5G wireless applications.

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Zhang WLiu YZang TBao Z(2024)EA4RCA: Efficient AIE accelerator design framework for regular Communication-Avoiding AlgorithmACM Transactions on Architecture and Code Optimization10.1145/367801021:4(1-24)Online publication date: 15-Jul-2024
https://dl.acm.org/doi/10.1145/3678010
Elsaid KEl-Kharashi MSafar M(2024)An optimized FPGA architecture for machine learning applicationsAEU - International Journal of Electronics and Communications10.1016/j.aeue.2023.155011174(155011)Online publication date: Jan-2024
https://doi.org/10.1016/j.aeue.2023.155011
Zhang HXing MWu YZhao C(2023)Compiler Technologies in Deep Learning Co-Design: A SurveyIntelligent Computing10.34133/icomputing.00402Online publication date: 19-Jun-2023
https://doi.org/10.34133/icomputing.0040
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Index Terms

Versal: The Xilinx Adaptive Compute Acceleration Platform (ACAP)
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Multicore architectures
      2. Very long instruction word
2. Hardware
  1. Integrated circuits
    1. Reconfigurable logic and FPGAs

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Information & Contributors

Information

Published In

FPGA '19: Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 2019

360 pages

ISBN:9781450361378

DOI:10.1145/3289602

General Chair:
Kia Bazargan
Univ. of Minnesota, USA
,
Program Chair:
Stephen Neuendorffer
Xilinx, USA

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 20 February 2019

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Keynote

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FPGA '19

Sponsor:

SIGDA

FPGA '19: The 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 24 - 26, 2019

CA, Seaside, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

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Zhang WLiu YZang TBao Z(2024)EA4RCA: Efficient AIE accelerator design framework for regular Communication-Avoiding AlgorithmACM Transactions on Architecture and Code Optimization10.1145/367801021:4(1-24)Online publication date: 15-Jul-2024
https://dl.acm.org/doi/10.1145/3678010
Elsaid KEl-Kharashi MSafar M(2024)An optimized FPGA architecture for machine learning applicationsAEU - International Journal of Electronics and Communications10.1016/j.aeue.2023.155011174(155011)Online publication date: Jan-2024
https://doi.org/10.1016/j.aeue.2023.155011
Zhang HXing MWu YZhao C(2023)Compiler Technologies in Deep Learning Co-Design: A SurveyIntelligent Computing10.34133/icomputing.00402Online publication date: 19-Jun-2023
https://doi.org/10.34133/icomputing.0040
Onwuchekwa DDasandhi MAlshaer SObermaisser R(2023)Evaluation of AI-based Meta-scheduling Approaches for Adaptive Time-triggered System2023 International Conference on Smart Computing and Application (ICSCA)10.1109/ICSCA57840.2023.10087446(1-8)Online publication date: 5-Feb-2023
https://doi.org/10.1109/ICSCA57840.2023.10087446
Passaretti DPionteck T(2023)A Control Data Acquisition System Architecture for MPSoC-FPGAs in Computed TomographyApplied Reconfigurable Computing. Architectures, Tools, and Applications10.1007/978-3-031-42921-7_25(361-365)Online publication date: 16-Sep-2023
https://doi.org/10.1007/978-3-031-42921-7_25
Scrugli MMeloni PSau CRaffo L(2021)Runtime Adaptive IoMT Node on Multi-Core Processor PlatformElectronics10.3390/electronics1021257210:21(2572)Online publication date: 21-Oct-2021
https://doi.org/10.3390/electronics10212572
Przybył A(2021)Fixed-Point Arithmetic Unit with a Scaling Mechanism for FPGA-Based Embedded SystemsElectronics10.3390/electronics1010116410:10(1164)Online publication date: 13-May-2021
https://doi.org/10.3390/electronics10101164
XU HSHIOMI JONODERA H(2021)Evaluation Metrics for the Cost of Data Movement in Deep Neural Network AccelerationIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.2020KEP0003E104.A:11(1488-1498)Online publication date: 1-Nov-2021
https://doi.org/10.1587/transfun.2020KEP0003
Rucker AVilim MZhao TZhang YPrabhakar ROlukotun K(2021)Capstan: A Vector RDA for SparsityMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480047(1022-1035)Online publication date: 18-Oct-2021
https://dl.acm.org/doi/10.1145/3466752.3480047
Mihali CHangan ASebestyen GIstván ZWassermann BMalka MChidambaram VRaz D(2021)The case for adding privacy-related offloading to smart storageProceedings of the 14th ACM International Conference on Systems and Storage10.1145/3456727.3463769(1-11)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1145/3456727.3463769
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