research-article

Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling

Authors:

Dimitrios Serpanos,

Vijaykrishnan Narayanan,

Yuan XieAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 11, Issue 3

Article No.: 62, Pages 1 - 16

https://doi.org/10.1145/2345770.2345774

Published: 01 September 2012 Publication History

Abstract

This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.

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Cited By

Knechtel JAshraf TFernengel NPatnaik SNabeel MAshraf MSinanoglu OAmrouch H(2022)Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technologyIntegration, the VLSI Journal10.1016/j.vlsi.2022.02.00685:C(27-34)Online publication date: 1-Jul-2022
https://dl.acm.org/doi/10.1016/j.vlsi.2022.02.006
Pothukuchi RPothukuchi SVoulgaris PSchwing ATorrellas JMartínez JDuato JJohn L(2021)MayaProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00074(888-901)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00074
Yang HJung EKim C(2021)Synchronous Real-Time Sampling Technique for Side-Channel Analysis Against Randomly Varying Clock-Based CountermeasuresIEEE Access10.1109/ACCESS.2021.31031839(112516-112527)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3103183
Show More Cited By

Index Terms

Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Security and privacy

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 11, Issue 3

September 2012

274 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2345770

Issue’s Table of Contents

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 September 2012

Accepted: 01 July 2010

Revised: 01 May 2010

Received: 01 June 2009

Published in TECS Volume 11, Issue 3

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Program for Professor of Special Appointment (Eastern Scholar) at Shanghai Institutions of Higher Learning

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Cited By

Knechtel JAshraf TFernengel NPatnaik SNabeel MAshraf MSinanoglu OAmrouch H(2022)Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technologyIntegration, the VLSI Journal10.1016/j.vlsi.2022.02.00685:C(27-34)Online publication date: 1-Jul-2022
https://dl.acm.org/doi/10.1016/j.vlsi.2022.02.006
Pothukuchi RPothukuchi SVoulgaris PSchwing ATorrellas JMartínez JDuato JJohn L(2021)MayaProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00074(888-901)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00074
Yang HJung EKim C(2021)Synchronous Real-Time Sampling Technique for Side-Channel Analysis Against Randomly Varying Clock-Based CountermeasuresIEEE Access10.1109/ACCESS.2021.31031839(112516-112527)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3103183
Chai FKang K(2018)A New Power Analysis Attack and a Countermeasure in Embedded Systems2018 9th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON)10.1109/UEMCON.2018.8796806(645-652)Online publication date: Nov-2018
https://doi.org/10.1109/UEMCON.2018.8796806
Wolf MMukhopodhyay SYu TYang S(2014)Information theoretic models for signatures in VLSI power delivery systemsProceedings of the 9th Workshop on Embedded Systems Security10.1145/2668322.2668324(1-5)Online publication date: 12-Oct-2014
https://dl.acm.org/doi/10.1145/2668322.2668324
O’Flynn CChen Z(2014)Synchronous sampling and clock recovery of internal oscillators for side channel analysis and fault injectionJournal of Cryptographic Engineering10.1007/s13389-014-0087-55:1(53-69)Online publication date: 12-Nov-2014
https://doi.org/10.1007/s13389-014-0087-5

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